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Article

Neural Network-Based Submodule Capacitance Monitoring in Modular Multilevel Converters for Renewable Energy Conversion Systems

1
L2CSP Laboratory, Mouloud Mammeri University of Tizi-Ouzou, BP 17 RP, Tizi-Ouzou 15000, Algeria
2
Preparatory Classes Department, Ecole Nationale Supérieure des Travaux Publics, Rue Sidi Garidi BP 32 Vieux Kouba, Algiers 16051, Algeria
3
G2Elab, Grenoble INP, Université de Grenoble Alpes, CNRS, 38000 Grenoble, France
4
Espace-Dev, Université de Guyane, UMR 228, 97300 Cayenne, France
*
Author to whom correspondence should be addressed.
Electronics 2026, 15(7), 1486; https://doi.org/10.3390/electronics15071486
Submission received: 1 March 2026 / Revised: 28 March 2026 / Accepted: 31 March 2026 / Published: 2 April 2026

Abstract

The widespread development of medium-voltage and high-voltage direct current transmission systems has highlighted the modular multilevel converter (MMC) as a crucial enabling technology. However, the overall performance and lifetime of the MMC strongly depend on the integrity of its submodules (SMs), making online capacitance condition monitoring a critical requirement. Unlike recent related studies that rely on computationally heavy matrix-based algorithms or “black-box” artificial neural networks requiring massive offline training datasets, this paper proposes a parametric, adaptive linear neuron network. Mapped directly to the physical equations of the MMC, the method simultaneously exploits the arm current, SM switching state, and capacitor voltage to identify online parametric variations caused by aging or harsh conditions. The proposed scheme is fully non-intrusive, requiring no additional hardware sensors or signal injections, thereby reducing implementation complexity. The simulation results obtained in MATLAB/Simulink (vR2024b) demonstrate the method’s fast convergence and a quantified steady-state estimation error within ±1%. Furthermore, the estimator exhibits strong robustness under severe operating conditions, successfully maintaining accuracy during a 20% capacitance reduction, a 100% active power step variation, dc-link voltage fluctuations, measurement noise, grid unbalances, and harmonic perturbations.

1. Introduction

The massive integration of intermittent renewable energy sources (RESs) and the development of high-voltage direct current (HVDC) and medium-voltage direct current grids demand high-performance power conversion systems [1,2,3,4].
Among high-voltage converter topologies, the modular multilevel converter (MMC) has emerged as the benchmark topology due to its superior waveform quality, low losses, and modularity [5,6,7]. Nevertheless, its overall reliability is strongly challenged by a massive component count. While semiconductor fault diagnosis is well-established [8,9,10], the aging of submodule (SM) capacitors remains a major concern, since thermal stress and electrolyte evaporation progressively reduce capacitance and thereby increase voltage ripple and semiconductor overvoltage stress [11,12]. As a result, continuous monitoring of SM capacitance is essential to ensure reliable operation. Existing approaches can be broadly grouped into three categories: invasive methods based on signal injection or dedicated operating stages, hardware-assisted solutions requiring additional sensors, and algorithmic techniques relying available electrical measurements.
In conventional power converters, mature solutions have already been developed for dc-link capacitance estimation. These approaches typically rely on low-frequency signal injection and analysis of the resulting voltage ripple [13,14]. This principle was subsequently extended to MMCs for SM capacitance estimation [15]. In machine–converter systems, an alternative approach exploits the stator inductances to form a dedicated inductor-capacitor resonant circuit [16], where the capacitance is identified by deliberately inducing resonance. However, such methods require intentional perturbation of the system operation, which may degrade power quality and complicate implementation. Other techniques rely on specific operating phases, such as sequential capacitor discharge [17] or analysis of the start-up precharge phase [18]. Although these methods enable capacitance evaluation, they require dedicated operating procedures, making the monitoring process non-continuous and dependent on specific operating conditions.
To improve the capacitance estimation accuracy, several hardware-assisted approaches have been proposed. While some methods rely on measuring voltage steps during switching transitions to estimate the equivalent series resistance (ESR) [19], others incorporate advanced components, such as tunnel magnetoresistance current sensors, for high-precision online monitoring [20]. Alternatively, reference-based strategies evaluate the capacitance by correlating the measurements with a healthy, redundant SM excluded from normal power processing [21,22]. Although these solutions improve estimation accuracy, they inevitably introduce structural redundancy and functional complexity, which become particularly restrictive in large-scale MMCs.
Beyond invasive and hardware-assisted solutions, recent research has increasingly focused on purely algorithmic and non-intrusive monitoring strategies. The particle swarm optimization-based approach in [23] enables capacitance estimation without additional hardware, but it may converge to local optima and imposes a relatively high computational burden. In [24], the capacitance is derived from the capacitor state equation using SM voltage fluctuations, yet the method neglects circulating-current harmonics and is sensitive to measurement noise. Similarly, the approach in [25] exploits second-order SM voltage ripple components, but the low amplitude of these signatures makes them difficult to extract reliably in noisy environments. To improve noise immunity, the method presented in [26] incorporates the fundamental components of capacitor voltage and current; however, its performance degrades at very low switching frequencies and under strong dynamic load variations.
To achieve higher estimation accuracy, more advanced adaptive identification techniques have been widely explored. For example, Kalman filter (KF)-based approaches [27,28], provide excellent precision, but their effectiveness remains highly dependent on the proper initialization, careful tuning and measurement noise covariance matrices. Other studies have investigated techniques such as the fast affine projection algorithm [29], which enables simultaneous estimation of capacitance and ESR, or recursive least squares (RLS) methods [12,30,31] for highly accurate parametric identification. Nevertheless, while effective, the inherent matrix-based computational structure of these advanced methods creates a significant computational burden, complicating real-time embedded implementation for large-scale MMCs.
More recently, machine-learning-based approaches have been introduced to avoid explicit analytical modeling. Methods based on wavelet transform combined with convolutional neural networks [32], recurrent neural networks with long short-term memory [33], and deep-learning-based neural networks [34,35] have shown promising estimation capability under complex operating conditions. Nevertheless, these approaches generally require extensive offline training data, significant computational resources, and suffer from a black-box nature that limits physical interpretability. These limitations restrict their practical deployment for embedded real-time implementation in MMCs comprising hundreds of SMs.
To address the limitations of existing approaches, this paper proposes an online SM capacitance estimation method based on an adaptive linear neuron (ADALINE) trained using the least mean squares (LMS) algorithm. By directly exploiting electrical quantities already available within the MMC, the proposed solution dynamically identifies capacitance variations caused by aging, thermal stress, and manufacturing tolerances. Specifically, the main contributions of this paper are summarized as follows:
  • Non-invasive estimation without additional hardware: The proposed method does not require high-frequency signal injection, dedicated diagnostic sensors, or offline identification procedures. It relies solely on the standard electrical measurements already available within the MMC.
  • Low computational burden and perfect suitability for MMC topology: Given that a typical MMC incorporates a massive number of SMs, the use of the LMS algorithm proves to be a highly suitable approach. Its simplicity and low computational complexity enable direct and simultaneous embedded implementation for hundreds of SMs, ensuring large-scale scalability without overloading the digital controller.
  • Parametric interpretability: Unlike traditional black-box neural network architectures, the ADALINE structure preserves direct physical insight into the estimated capacitance, bridging the gap between machine learning and physical system modeling.
  • High accuracy and robustness: Extensive MATLAB/Simulink simulations validate the estimator’s fast convergence, high precision, and strong robustness against measurement noise, dynamic load variations, and non-ideal grid conditions.
The remainder of this paper is organized as follows. Section 2 presents the mathematical modeling of the MMC. Section 3 describes the voltage-oriented control (VOC) strategy along with the SM voltage balancing algorithm. Section 4 details the development of the ADALINE-based neural estimator. Section 5 provides a theoretical comparison with other existing methods. Section 6 presents and discusses the simulation results, and Section 7 concludes the paper.

2. MMC Modeling

Large-scale RES integration heavily relies on the deployment of HVDC transmission links. Figure 1 depicts the simplified schematic of the investigated conversion architecture, which encompasses RES, a step-up transformer (TF), a renewable energy source-side MMC (RESS-MMC), and the HVDC link. However, to eliminate the influence of the wind generator’s electromechanical dynamics and to isolate the SM diagnostic procedure, this study focuses exclusively on the grid-side MMC (GS-MMC), indicated by the dashed region.
The topology of this converter is depicted in Figure 2. It consists of a GS-MMC interfaced with the ac main grid through an inductive filter characterized by a series resistance R f and inductance L f . The three-phase grid is represented by the voltage sources e g a , e g b , and e g c .
Although the MMC has a highly distributed multilevel topology, its terminal ac-side dynamics can be formulated in a manner analogous to those of a conventional two-level voltage source converter (2L-VSC), while preserving internal MMC-specific dynamics such as circulating currents and arm-energy redistribution [36,37]. The converter output voltage is synthesized by controlling the number of inserted SMs in each arm. Hence, the number of SMs, N , defines the voltage resolution and enables a staircase waveform with reduced harmonic distortion [38]. For control-oriented analysis, the MMC is described using a unified model that separates the ac-side and internal circulating-current dynamics [39]. Assuming identical SM capacitors within each arm, the arm can be represented by an equivalent capacitance C Σ = C s m / N , and the corresponding voltage v c Σ u , l is defined as the sum of the individual capacitor voltages. Under this representation, the upper and lower arm voltages v m i u and v m i l along with their corresponding currents i m i u and i m i l are expressed as [10,24]:
v m i u = m i u v c u i ;   v m i l = m i l v c l i
i i u = i m i u / m i u ;   i i l = i m i l / m i l
where m i u and m i l are the modulation indices.
Applying Kirchhoff’s laws to the upper and lower arms of the MMC yields the following three equations:
i g i = i i u i i l
V d c 2 v m i u R a r m i i u L a r m d i i u d t = e g i + R f i g i + L f d i g i d t
V d c 2 + v m i l + R a r m i i l + L a r m d i i l d t = e g i + R f i g i + L f d i g i d t
where i g i   is the AC-side phase current, V d c is the dc-link voltage, and e g i represents the grid phase voltage. Rarm and Larm denote the internal resistance and inductance of the MMC arms, respectively, while Rf and Lf represent the resistance and inductance of the grid-side filter.
By manipulating these fundamental relationships, the dynamic behavior of the MMC can be evaluated through its ac and dc continuous-time equivalents. First, the AC-side model of the converter is derived by summing the upper and lower arm equations, yielding the following expression [40]:
v m i l v m i u + R a r m ( i i l i i u ) + L a r m d d t ( i i l i i u ) = 2 e g i + L f d i g i d t + R f i g i .
By applying the same mathematical rationale used for the ac- side, the sum of Equations (4) and (5) provides the dc-side model of the MMC [41]:
V d c ( v m i u + v m i l ) R a r m ( i i u + i i l ) L a r m d d t ( i i u + i i l ) = 0 .
A change in variables is then performed to highlight the influence of the MMC’s internal parameters on the power exchange between the ac grid and the dc link, thereby clarifying their role in the system’s energy transfer.
i d i f f   i = ( i i u + i i l ) / 2
v m i a c = ( v m i l v m i u ) / 2
v m i d c = v m i u + v m i l
where idiff i represents the inner difference current of phase i that circulates between the MMC legs, v m i d c   denotes the inner unbalanced voltage driving this circulating current, and v m i a c designates the inner ac voltage of the corresponding phase.
Drawing upon (6) and (7), the system can be expressed in a decoupled format, whereupon a further variable transformation is introduced to simplify the governing equations.
R e q a c = R f + R a r m / 2 ; R e q d c = 2 R a r m L e q a c = L f + L a r m / 2 ; L e q d c = 2 L a r m .
The resulting system defines the final mathematical model of the MMC. By utilizing the aforementioned equivalent parameters, the governing dynamics are established based on the following two fundamental equations:
v m i a c e g i = R e q a c i g i + L e q a c d i g i d t
v d c v m i d c = R e q d c i d i f f   i + L m i d c d i d i f f   i d t .

3. MMC Control

The overall control structure of the MMC is depicted in Figure 3. It consists of three main parts: the standard MMC control blocks, including ac current control and circulating current suppression control (CCSC); the modulation and balancing stage, composed of phase-shifted carrier pulse-width modulation (PSC-PWM) and balancing control algorithm (BCA) which generates the switching signals to drive the physical converter; and the proposed ADALINE estimator, which passively exploits the available measurements to continuously estimate the SM capacitance. In the following subsections, the detailed mathematical models of these blocks are presented.

3.1. AC-Side Current Control

As in conventional 2L-VSCs, the MMC ac currents are regulated in a synchronous dq reference frame [41]. Applying the Park transformation aligned with the grid voltage via a phase-locked loop to the AC-side circuit Equation (12) yields the following dynamic equations:
d i d d t = 1 L e q a c ( v m d a c e g d R e q a c i g d + ω L e q a c i g q )
d i q d t = 1 L e q a c ( v m q a c e g q R e q a c i g q + ω L e q a c i g d )
where i g d and i g q are the dq-axis components of the grid current, v m d a c and v m q a c denote the converter output voltages in the synchronous reference frame, and e g d , e g q are the dq-axis components of the grid voltage, and ω represents the ac grid angular frequency.
To address the inherent cross-coupling terms in the dq frame, a decoupling control strategy with two independent proportional-integral (PI) controllers is employed. The resulting ac current control laws that generate the reference voltages v m d a c * and v m q a c * are:
v m d a c * = e d + ( i g d * i g d ) C i a c s ω L e q a c i g q
v m q a c * = e q + ( i g q * i g q ) C i a c s + ω L e q a c i g d
where Ciac(s) = Kpac + Kiac/s is the PI controller transfer function, i g d * and i g q *   denote the dq axis reference values of the grid ac currents, v m d a c * and v m q a c * represent the dq axis reference components of the internal ac voltage generated by the grid current controller.
The gains Kpac and Kiac are tuned based on the closed-loop transfer function given by:
i g d i g d * = 1 + K p a c K i a c s L e q a c K i a c s 2 + K p a c + R e q a c K i a c s + 1 .
The closed-loop dynamics of the system are intrinsically governed by the denominator of its transfer function. The synthesis of the controller parameters relies on the pole-placement method while imposing a natural frequency ( ω n a c = 3 / t r a c ) and an optimal damping ratio (ζ = 0.707). Since the primary objective of the PI controller is to ensure steady-state reference tracking with zero steady-state error, the closed-loop transfer function (18) can be approximated by that of a pure second-order system. This simplification is justified by neglecting the effect of the zero introduced in the numerator, as its influence manifests exclusively during the transient state and vanishes completely in the steady state. By identification, the proportional and integral gains, K p a c and K i a c respectively, are then determined by the following expressions:
K p a c = 2 ζ ω n a c L e q a c R e q a c
K i a c = ω n a c 2 L e q a c .

3.2. Circulating Current Suppression Control

Circulating currents, arising from voltage differences between MMC arms, appear as a negative-sequence ac component oscillating at twice the fundamental frequency 2ω [42]. These currents distort arm currents and significantly increase the SM capacitor voltage ripples [41]. To mitigate these effects, CCSC strategy is employed [43]. By applying a Park transformation at twice the negative fundamental frequency for (13), the 2ω components are converted into dc quantities:
v m d d c = L e q d c d i d i f f   d d t + R e q d c   i d i f f   d 2 L e q d c ω i d i f f   q
v m q d c = L e q d c d i d i f f   q d t + R e q d c   i d i f f   q + 2 L e q d c ω i d i f f   d .
where idiff d and idiff q denote the dq axis components of the circulating current, and v m d d c , v m q d c   are the corresponding driving voltages.
The circulating currents are regulated using PI controllers:
v m d d c * = ( i d i f f   d * i d i f f   d ) C i d c ( s ) 2 ω L e q d c i d i f f   q
v m q d c * = ( i d i f f   q * i d i f f   q ) C i d c ( s ) + 2 ω L e q d c i d i f f   d
where Cidc(s) = Kpdc + Kidc/s and i d i f f   d * ,   i d i f f   q * , v m d d c * , v m q d c * are the reference values.
The controller gains are tuned following the same pole-placement methodology adopted for the ac current control. Since the closed-loop dynamics exhibit a similar structure, the parameters Kpdc and Kidc are derived accordingly to ensure stable and well-damped system behavior.

3.3. Balancing Control Algorithm

The voltage evolution across an SM capacitor is strictly governed by its insertion state and the current direction, resulting in its charging, discharging, or voltage maintenance (bypass). In the literature, BCAs leverage this inherent behavior to ensure uniform and efficient voltage distribution among the SMs [44]. The primary distinction between these methods lies in the determination of the number of SMs inserted at each iteration; this selection strategy directly impacts the switching frequency, which in turn influences the power losses within the MMC.
The method presented in [45] is referred to herein as the basic BCA (see Figure 4). In each BCA execution cycle, the number of active SMs to be inserted, Non, is determined via PSC-PWM. Concurrently, SM voltages are measured and sorted in descending order. The actual SM selection is then performed based on the current arm polarity, prioritizing either the lowest or highest voltage SM to maintain the target equilibrium.

3.4. Overall MMC Control Strategy

As illustrated in Figure 3, the implemented strategy integrates VOC and BCA via two parallel, decoupled loops. The ac-side loop regulates grid-injected currents by employing independent PI controllers in the synchronous dq frame for the igd and igq components. Concurrently, the CCSC calculates the differential voltage to explicitly filter out double-frequency 2ω ac components from the arm currents. The final arm voltage references are ultimately synthesized by superimposing these decoupled control variables onto the static dc-link voltage, as expressed in Equations (25) and (26) for the upper and lower arms:
v m i u * = V d c 2 v m i a c * v m i d c *
v m i l * = V d c 2 + v m i a c * v m i d c * .
To complete the modulation, a static dc offset component is added to generate the final SM reference voltages. Concurrently, the SM Voltage BCA maintains internal capacitor energy balance by sorting SM voltages and selectively inserting or bypassing them based on the arm current direction. This algorithm is designed to minimize the deviation between individual SM voltages, maintaining them within a strict ripple band (typically <5%) to ensure even stress distribution across the semiconductor devices. The total number of active SMs is governed by a PSC-PWM. Regarding digital implementation constraints, real-world microcontrollers (e.g., digital signal processor (DSP)/field-programmable gate array) suffer from finite analog-to-digital converter resolution and computational delays. Because the ADALINE structure imposes a very low computational burden, execution delays are virtually negligible and are effectively compensated within this control loop, preserving real-time stability. Furthermore, to address Dead-Times and SM Nonlinearities where physical parameters drift due to temperature and inverter dead-times create voltage distortions, the adaptive nature of our proposed algorithm inherently mitigates the impact of these unmodeled dynamics and slow parameter drifts. Ultimately, this completely decoupled architecture ensures that ac grid regulation and internal circulating current suppression operate without mutual interference, guaranteeing optimal converter stability, power quality, and robustness.

4. ADALINE-Based Capacitance Estimation

4.1. Theoretical Framework of ADALINE and System Identification

ADALINE is one of the simplest neural network structures. It consists of a single linear processing unit whose output is formed as the weighted sum of an input vector. Owing to its linear-in-parameters structure, ADALINE is particularly suitable for real-time applications where low computational burden and direct interpretability of the adapted parameters are required. In system identification, the ADALINE operates in parallel with the unknown plant, receives the same input signals, and continuously adjusts its weights so that its output reproduces the measured response of the real system. For a general discrete-time linear-in-parameters system, the desired response can be expressed as follows [46]:
y d ( k ) = W * T X ( k ) + v ( k )
where k is the discrete time index, yd(k) is the actual output of the real system, W* is the unknown optimal parameter vector to be identified, X(k) is the regressor (input) vector, and v(k) represents measurement noise or unmodeled perturbations.
The output generated by the ADALINE is defined as:
y e s t ( k ) = W T ( k ) X ( k )
where yest(k) is the estimated output and W(k) denotes the adaptive weight vector.
The identification error between the real system and the ADALINE model is then defined by:
δ k = y d k y e s t k .
The adaptation mechanism aims at minimizing this error in the mean-square sense. Accordingly, the global cost function is defined as:
J ( k ) = 1 2 E [ δ 2 ( k ) ]
where E[.] is the mathematical expectation (statistical mean).
Since the exact evaluation of the expectation is not practical in real-time recursive implementation, the global criterion is replaced by its instantaneous approximation Ĵ, given by:
J ^ = 1 2 δ 2 ( k ) .
Using the steepest-descent principle, the weight vector is updated in the negative direction of the gradient of J ^ ( k ) with respect to W ( k ) . This leads to the conventional least LMS) adaptation law:
W ( k + 1 ) = W ( k ) + η δ ( k ) X T ( k )
where the learning rate η is a positive scalar, which controls the speed and stability of the algorithm’s convergence.
Although the LMS algorithm is attractive for its simplicity and low computational cost, its convergence speed strongly depends on the instantaneous power of the regressor vector X ( k ) . In other words, when the input amplitude varies significantly, the effective adaptation step also varies, which may slow down convergence or deteriorate numerical robustness. To reduce this sensitivity and improve convergence behavior under variable operating conditions, the normalized LMS (NLMS) algorithm is adopted. In the NLMS formulation, the adaptation step is normalized by the squared Euclidean norm of the input vector. The corresponding update law is given by [46]:
W ( k + 1 ) = W ( k ) + η δ ( k ) X T ( k ) ε + X T ( k ) X ( k )
where ε is a very small positive constant added to prevent division by zero when the input is zero and XT(k) X(k) is the Euclidean norm of the input vector X(k).

4.2. Application to Online Capacitance Estimation of MMC SMs

During long-term MMC operation, SM capacitance can deviate from its nominal value due to aging, thermal variations, or manufacturing tolerances. Such variations directly affect the internal energy distribution of the converter and may degrade the effectiveness of conventional balancing and control strategies. To overcome this, an ADALINE-based online capacitance estimator is proposed for its low computational complexity and real-time adaptability [47]. The proposed estimator is derived directly from the physical dynamic model of the SM capacitor. For a given SM, the capacitor-voltage dynamics can be written as follows [48,49]:
d v s m ( t ) d t = i a r m ( t ) × m i u , l ( t ) C s m .
By applying the Forward Euler discretization method, the discrete-time representation of (34) is expressed as follows:
v s m k = v s m k 1 + T s C s m   i a r m k 1 × m i u , l k 1
where T s represents the sampling period.
By defining X ( k 1 ) = i a r m ( k 1 ) m i u , l ( k 1 ) and W * = T s / C s m , (34) can be rewritten in the linear-in-parameters form:
v s m k = v s m k 1 + W * X k 1 .
This reformulation shows that the online capacitance estimation problem can be reduced to the identification of a single unknown parameter W * = T s / C s m . This coefficient can be estimated using an ADALINE with inputs v s m ( k ) , i a r m ( k ) , and m i u , l ( k ) . To directly map this physical model to the theoretical ADALINE framework established in Section 4.1, the actual measured voltage vsm(k) acts as the desired target response yd(k). The estimated SM voltage v ^ s m ( k ) (corresponding to the theoretical network output yest(k)) can then be computed as follows:
v ^ s m k = v s m ( k 1 ) + W ( k ) × X ( k 1 )
where W ( k ) denotes the ADALINE weight vector updated online.
The estimation error driving the learning rule given in (33) is defined as δ k = v s m k v ^ s m k . In this way, the estimator continuously minimizes the mismatch between the measured capacitor voltage vsm(k) and its model-based reconstruction v ^ s m   ( k ) . Since only one scalar parameter is adjusted for each SM, the resulting estimator remains very simple and well-suited to real-time embedded implementation in MMCs containing a large number of submodules.
Once the adaptive weight converges toward the optimal value W * , the SM capacitance can be directly reconstructed from the identified parameter as:
C ^ s m = T s / W ( k ) .
The diagram in Figure 5 illustrates the identification process of C s m using the ADALINE-based strategy.

4.3. Stability Analysis of the ADALINE Estimator

Since the ADALINE adapts automatically online without offline training or initialization, the learning rate η is the only parameter requiring tuning. The main criterion for adjusting η is the stability of the estimator. Consequently, a precise range of values for η is established based on Lyapunov’s convergence theory [46]. Thus, a Lyapunov candidate function is defined as:
V ( k ) = W ˜ T ( k ) W ˜ ( k )
where W ˜ ( k )   = W * ( k )   W ( k ) represents the estimation error between the actual capacitance parameter of the SM W * ( k ) and its estimation by the network W(k).
The variation in the Lyapunov function is established as follows:
Δ V ( k ) = V ( k + 1 ) V ( k ) < 0 .
The Lyapunov convergence criterion must be satisfied, such that:
V ( k ) Δ V ( k ) < 0 .
Since V(k) is a positive definite function, the stability criterion is satisfied when ΔV(k) < 0. By introducing the estimation error W ˜ k into the NLMS update law of the ADALINE, the variation ΔV(k) can be expanded as follows:
Δ V ( k ) = W ˜ ( k ) η X 2 ( k 1 ) W ˜ ( k ) ε + X 2 ( k 1 ) 2 W ˜ 2 ( k ) .
After simplification, we obtain:
Δ V ( k ) = η W ˜ 2 ( k ) X 2 ( k 1 ) ε + X 2 ( k 1 ) 2 + η X 2 ( k 1 ) ε + X 2 ( k 1 ) .
The stability condition ΔV(k) < 0 is satisfied if the second bracketed term in (43) is strictly positive. This is achieved if η is chosen in the interval:
0 < η < 2 .
Tuning the learning rate η, which governs the stability of the ADALINE estimator, dictates a tradeoff: a low η favors accuracy at the expense of convergence speed, whereas a high η accelerates the tracking of sudden variations but risks causing oscillations and overshoots. In practice, η is initialized to a small value and then adjusted empirically to strike the right balance between the desired convergence speed and disturbance rejection capability. Furthermore, regarding noise robustness, measurement noise introduces high-frequency variance into the estimated weights. As demonstrated in [46], the learning rate parameter η provides a mathematically defined trade-off: a properly selected η acts as a filter on the instantaneous error signal δ(k). This effectively smooths the estimated parameters and suppresses high-frequency noise while maintaining the fundamental dynamics.

5. Comparison with Other Methods

The proposed approach is compared with the RLS [12,30] and KF [27] algorithms, as summarized in Table 1. Regarding initialization dependency, the proposed method exhibits low dependency, whereas RLS and KF show high and very high dependencies, respectively. Unlike RLS and KF, which require matrix operations, including matrix inversion for KF, the proposed method requires no matrix operations. Furthermore, the proposed approach achieves high numerical stability, compared to the medium stability of both RLS and KF. While RLS and KF offer fast convergence speeds, the proposed method provides a medium to fast convergence. In terms of accuracy, the proposed method and RLS achieve high accuracy, while KF reaches very high accuracy. Finally, the proposed method demonstrates superior computational efficiency. For an MMC comprising 24 SMs in total, it achieves an execution time of just 5.95 µs, effectively reducing the computational burden by 27.9% compared to the RLS (8.25 µs) and 32% compared to the KF (8.75 µs). These execution times were validated through a rigorous real-time implementation of the estimators on a C2000 F28379D DSP (Texas Instruments Inc., Dallas, TX, USA).

6. Simulations Results

The simulation was conducted in the MATLAB/Simulink environment based on the state-space model of the converter. The simulation parameters are summarized in Table 2. Initially, the closed-loop simulation results are presented to validate the converter model. Subsequently, the performance of the capacitance estimator is analyzed through various robustness tests.
Figure 6 presents the simulation results obtained during system startup under ideal grid conditions. In this scenario, the active power reference, Pref, is imposed externally and initially set to 0 kW. At t = 0.5 s, an active power step of 100 kW is applied to evaluate the system dynamics and the performance of the control loops. As illustrated in Figure 6a, the active power accurately tracks its reference, exhibiting a fast response without significant overshoot, which reflects excellent regulation. Furthermore, the reactive power remains close to zero, confirming the effective decoupling between active and reactive power.
The current waveforms, shown in Figure 6b, demonstrate that the phase currents iabc remain strictly sinusoidal. This highlights the MMC’s ability to ensure high current quality despite a relatively low switching frequency of 2 kHz. This result underscores the effectiveness of the multilevel topology and the adopted control strategy in mitigating harmonic components, thereby yielding a near-ideal waveform without resorting to high switching frequencies. Consequently, switching losses are minimized while maintaining excellent power quality, constituting a major advantage for high-power applications.
Finally, the differential currents in the synchronous reference frame, idiff d and idiff q, depicted in Figure 6c, are maintained around zero regardless of the power level injected into the grid. This characteristic confirms the effectiveness of the control strategy in suppressing internal current ripples, thereby contributing to the reduction in power losses and the enhancement of the converter’s overall efficiency.
Figure 7a,b depict the upper and lower arm currents, alongside the circulating current and the SM capacitor voltages for phase a of the MMC, respectively. These quantities serve as crucial indicators for analyzing the energy distribution among the SMs and evaluating their dynamic management within the converter.
As illustrated in Figure 7a, the upper and lower arm currents exhibit a balanced sinusoidal waveform, while the circulating current is tightly regulated. This behavior attests to the efficacy of the control strategy in limiting internal currents, thereby mitigating thermal stress and reducing conduction losses. Figure 7b displays the superimposed SM capacitor voltages for phase a. This comprehensive representation highlights the effectiveness of the SM selection algorithm, which ensures robust voltage balancing around the nominal reference value. The minimal dispersion and tight convergence observed among the individual SM voltages confirm the proposed strategy’s ability to guarantee uniform energy distribution, a fundamental prerequisite for the safe, reliable, and high-performance operation of the MMC.
Figure 8 evaluates the influence of the learning rate η on both convergence speed and robustness to measurement noise of the capacitance estimation algorithm. At t = 0.8   s , a 20% reduction is applied to the capacitance of SM1 in order to assess the transient tracking capability of the estimator. At t = 1.0   s , additive Gaussian noise n ( k ) N ( 0 , σ 2 )   is superimposed on the measured upper-arm current to evaluate the estimator against measurement noise. This disturbance is generated in the MATLAB/Simulink environment using a stochastic noise generator characterized by a zero mean and a variance equal to 2, which is commonly used to emulate measurement disturbances in power electronic systems.
As shown in Figure 8b, the convergence speed depends strongly on the learning rate η . The 5% convergence time t c is defined as the time required for the estimated capacitance to settle within a ± 5 % band around the new capacitance value. The obtained values are =6.27 ms for η = 0.008 , =10.69 ms for η = 0.004 , and =14.64 ms for η = 0.002 . These results confirm that increasing η accelerates adaptation. However, Figure 8c shows that the improved transient response is accompanied by greater sensitivity to measurement noise. During the interval t 1.0   s , the steady-state estimation error Δ C = ( C s m 1 C ^ s m 1 ) / C s m 1 , fluctuates within approximately ± 10 % for η = 0.008 , ± 5 % for η = 0.004 , and ± 2 % for η = 0.002 . Hence, the estimator exhibits the expected NLMS tradeoff: large learning rates favor rapid tracking, while smaller learning rates improve disturbance rejection. Based on these observations, the value η = 0.004   is retained for the remainder of this study.
Figure 9 presents the results of the online capacitance estimation for the upper arm SMs of the MMC, along with the associated electrical quantities, namely the upper arm current and the SM capacitor voltages.
Figure 9c depicts the time evolution of the estimated SM capacitances. During the initial phase t < 0.5   s , no significant convergence is observed. This behavior is explained by the fact that the estimator relies directly on the upper arm current measurement, which is zero during this time interval. The absence of current thus prevents sufficient excitation of the estimation model, rendering the effective updating of parameters impossible. At t = 0.5   s , a current step is applied, providing the necessary excitation for the algorithm’s operation. From this instant onward, the estimated capacitances gradually converge towards a common value close to the nominal capacitance, with minimal dispersion among the SMs. This convergence attests to the stability and robustness of the proposed method, even in the presence of dynamic current variations. Figure 9a illustrates the evolution of the upper arm current, which becomes sinusoidal in steady state. The variations in this current do not affect the stability of the estimation, highlighting the algorithm’s ability to operate under varying load conditions while ensuring reliable parameter identification. Figure 9b displays the capacitor voltages of the upper arm SMs. These voltages remain properly balanced around their average value, with controlled ripple, demonstrating that the online capacitance estimation introduces no adverse perturbations into the MMC’s operation. Finally, Figure 9d depicts the estimation error of the four upper-arm SM capacitances in phase a. Before startup, the absence of current excitation leads to an initial error of about + 20 % . Once the current step is applied at t = 0.5   s , the estimator responds promptly, and the error converges within approximately 15 ms. During steady state, the error remains strictly bounded within a negligible margin of ±1% for all four considered capacitances.
Overall, the obtained results validate the suitability of the proposed method for the online estimation of SM capacitances, provided there is sufficient system excitation while preserving the dynamic performance and voltage balancing of the MMC’s upper arm.
Figure 10 illustrates a supplementary robustness test of the proposed estimation algorithm under a dc link voltage dip. Figure 10a depicts the time-domain waveform of the DC link voltage, Vdc, where a deliberate variation is introduced to assess its impact on both the MMC’s dynamic behavior and the estimator’s performance. This variation in Vdc consequently induces fluctuations in the SM capacitor voltages, as illustrated in Figure 10b. Despite these transients, the SM voltages remain properly balanced, further attesting to the efficacy of the control strategy and the SM selection algorithm. Figure 10c presents the estimated capacitances for the SMs of the considered arm. The results demonstrate that, even in the presence of significant SM voltage variations induced by the dc link disturbance, the estimated values remain stable and closely track the nominal capacitance. No noticeable drift or degradation in estimation accuracy is observed. Figure 10d highlights the capacitance estimation error for the upper SMs of phase a. A quantitative analysis reveals the exceptional immunity of the estimator to dc side disturbances. When Vdc drops abruptly from 3000 V to 2800 V at exactly t = 1.2 s, the estimation error ΔC experiences an almost imperceptible transient deviation. Throughout the entire voltage sag event and its subsequent steady state, the error remains strictly bounded within a minimal and negligible margin of ±1% for all four considered capacitances. This behavior demonstrates the high robustness of the estimator against dc link variations and its capability to maintain precise capacitance estimation, irrespective of the energy perturbations imposed on the system. Overall, these results confirm the robustness of the estimation algorithm against Vdc variations and demonstrate that SM voltage fluctuations do not compromise the reliability of the estimation. This property is of paramount importance for the practical deployment of MMCs, where dc link variations can frequently occur during real-world operations.
To provide a solid foundation for evaluating the estimator’s robustness, it is essential to analyze its behavior under severe grid abnormalities. These disturbances are generally categorized into symmetrical faults (e.g., balanced three-phase voltage sags) and asymmetrical faults (e.g., single-phase or two-phase grid dips). While symmetrical disturbances typically cause a uniform reduction in active power transfer, asymmetrical faults present a significantly harsher operating environment for MMCs. Specifically, asymmetrical faults introduce negative-sequence voltage components. The coupling of these negative-sequence voltages with the positive-sequence grid currents generates detrimental double-line-frequency (2ω) oscillations in the output active and reactive power. For an MMC, these ac-side power oscillations are particularly critical because they inevitably propagate into the converter’s internal dynamics. They induce severe low-frequency fluctuations in the arm energies, leading to highly unbalanced and amplified voltage ripples across the internal SM capacitors. Because these massive internal energy variations can easily destabilize conventional control and tracking loops, asymmetrical faults represent a much more rigorous benchmark for testing the dynamic stability of parameter estimation algorithms. Based on this classification, to evaluate the robustness of the proposed estimation algorithm against severe asymmetrical grid disturbances, a two-phase unbalance fault causing a 25% voltage dip on phases a and b is introduced at t = 2.5 s, as shown in Figure 11a. As expected, this asymmetry causes an imbalance in the line currents (Figure 11c) and generates low-frequency power oscillations, which are particularly pronounced in the reactive power (Figure 11b). The impact of this fault propagates to the internal variables of the converter, resulting in a perturbation of the upper arm current (Figure 11e) and a visible amplification of the voltage ripples across the SM capacitors (Figure 11f). However, despite the severity of these electrical disturbances and the increased dynamics of the internal voltages, the algorithm maintains remarkable performance. The estimated capacitance values (Figure 11g) remain perfectly stable and track the nominal value accurately, without any transient deviation. A quantitative analysis of the estimation error, depicted in Figure 11h, reveals the exceptional immunity of the estimator to ac-side faults. At the exact moment of the fault (t = 2.5 s), the estimation error ΔC exhibits virtually no transient peak. The error remains strictly bounded within a minimal and steady-state margin of ±1% for all considered SMs, completely unaffected by the amplified ripples in the capacitor voltages. This thereby demonstrates the excellent immunity and strong robustness of the proposed estimation method under unbalanced and degraded grid conditions.
To complement the previous analysis of structural asymmetries, the estimator’s resilience is further challenged by the second class of grid abnormalities: high-frequency spectral pollution. Unlike unbalanced faults, harmonic distortion introduces high-frequency periodic perturbations that distort the sinusoidal nature of the electrical variables. This evaluation, conducted via a severe harmonic distortion test, aims to verify the algorithm’s selective filtering capabilities and its intrinsic ability to distinguish the fundamental SM dynamics from the superimposed harmonic noise. In an MMC, the presence of low-order harmonics, specifically the 5th and 7th, is particularly problematic, as their interaction through the converter’s non-linear switching functions generates complex inter-harmonic components. These components penetrate the arm current and create high-frequency ripples in the capacitor voltages, which can easily be misinterpreted by an estimator as a change in the physical parameter Csm. Therefore, maintaining a stable estimation under such spectral pollution is a critical proof of the algorithm’s robustness.
Following this classification, to further evaluate the robustness of the proposed approach against highly polluted grid conditions, a harmonic distortion test was conducted. At t = 2.8 s, 5th and 7th harmonics, each with an amplitude of 10% relative to the fundamental, are injected into the grid voltages Figure 12a. This severe distortion inevitably affects the line currents Figure 12c and generates high-frequency ripples in the power responses, which are particularly visible in the reactive power Figure 12b. On the internal side of the converter, these harmonic components propagate into the upper arm current Figure 12e and alter the voltage ripple profile across the SM capacitors by superimposing high-frequency components Figure 12f. Despite the presence of these significant perturbations that severely degrade the quality of the system’s electrical signals, the estimation algorithm demonstrates exceptional stability. The estimated capacitances in Figure 12g continue to accurately track their nominal values without being affected by the harmonic distortions. A quantitative analysis of the estimation error, shown in Figure 12h, further underscores the estimator’s resilience. At the exact moment the harmonic distortion is introduced (t = 2.8 s), the estimation error ΔC exhibits no noticeable transient deviation. Throughout the duration of the polluted grid conditions, the error remains extremely stable and strictly confined within a negligible band of ±1% for all SMs in the upper arm. These results confirm the ability of the proposed method to effectively reject harmonic disturbances and guarantee continuous, high-precision estimation, even in industrial environments subjected to severe electrical pollution.

7. Conclusions

This paper presents a method for estimating the degradation of the SM capacitor capacitance in an MMC. The proposed approach is based on an ADALINE trained using the LMS algorithm. The method is fully non-intrusive, as it relies exclusively on electrical quantities already available within the converter, without requiring additional sensors or signal injections. Furthermore, the estimator is implemented independently of the VOC strategy and the SM voltage balancing algorithm, thereby ensuring no impact on the dynamic performance or output waveform quality of the MMC. The effectiveness of the proposed method was validated through detailed MATLAB/Simulink simulations. The results demonstrate fast convergence, a steady-state estimation error within ±1%, and strong robustness under a 20% capacitance reduction, a 100% power step variation, dc link voltage fluctuations, measurement noise, grid unbalances, and harmonic perturbations. Appropriate tuning of the learning rate further ensures a satisfactory trade-off between convergence speed and numerical stability. Overall, the proposed method provides an efficient real-time solution for SM capacitor capacitance estimation. It establishes a suitable framework for implementing predictive maintenance strategies in MMC systems and contributes to enhancing the reliability of modern HVDC applications.

Author Contributions

Conceptualization, M.A. and A.R.; formal analysis, M.A. and A.R.; methodology, B.B., A.R. and K.M.; software, M.A., A.R. and K.M.; validation M.A., D.F., I.S. and S.B.; investigation, M.A., B.B., A.R. and K.M.; resources, S.B., I.S. and D.F.; writing—original draft M.A.; writing—review and editing, D.F., I.S. and B.B.; supervision, S.B. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Data Availability Statement

The data are available on request from the corresponding author.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. General topology of the MMC-based transmission system for RES integration.
Figure 1. General topology of the MMC-based transmission system for RES integration.
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Figure 2. Architecture of the grid-connected MMC.
Figure 2. Architecture of the grid-connected MMC.
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Figure 3. Overall control structure of the MMC.
Figure 3. Overall control structure of the MMC.
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Figure 4. Principle of the balancing control algorithm (BCA).
Figure 4. Principle of the balancing control algorithm (BCA).
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Figure 5. Operating principle of the proposed ADALINE capacitor estimation algorithm.
Figure 5. Operating principle of the proposed ADALINE capacitor estimation algorithm.
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Figure 6. Dynamic response of the MMC: (a) active and reactive powers; (b) grid currents and (c) differential currents.
Figure 6. Dynamic response of the MMC: (a) active and reactive powers; (b) grid currents and (c) differential currents.
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Figure 7. Arm current and capacitor voltage waveforms in the MMC: (a) upper, lower, and differential currents; and (b) upper and lower SM voltages.
Figure 7. Arm current and capacitor voltage waveforms in the MMC: (a) upper, lower, and differential currents; and (b) upper and lower SM voltages.
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Figure 8. Performance of the ADALINE estimator under arm current disturbances for various learning rates: (a) upper arm current; (b) estimated capacitance; and (c) estimation error.
Figure 8. Performance of the ADALINE estimator under arm current disturbances for various learning rates: (a) upper arm current; (b) estimated capacitance; and (c) estimation error.
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Figure 9. Startup performance of the ADALINE-based estimator: (a) upper arm current; (b) phase a SM voltage; (c) estimated capacitance; and (d) estimation error.
Figure 9. Startup performance of the ADALINE-based estimator: (a) upper arm current; (b) phase a SM voltage; (c) estimated capacitance; and (d) estimation error.
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Figure 10. Dynamic response of the ADALINE estimator subject to dc-link variations: (a) dc-link voltage; (b) SM voltage; (c) estimated capacitance; and (d) estimation error.
Figure 10. Dynamic response of the ADALINE estimator subject to dc-link variations: (a) dc-link voltage; (b) SM voltage; (c) estimated capacitance; and (d) estimation error.
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Figure 11. Dynamic performance of the ADALINE estimator under unbalanced grid conditions: (a) grid voltage; (b) active and reactive power; (c) grid current; (d) differential current; (e) upper arm current; (f) SM voltage; (g) estimated capacitance; and (h) estimation error.
Figure 11. Dynamic performance of the ADALINE estimator under unbalanced grid conditions: (a) grid voltage; (b) active and reactive power; (c) grid current; (d) differential current; (e) upper arm current; (f) SM voltage; (g) estimated capacitance; and (h) estimation error.
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Figure 12. Dynamic performance of the ADALINE estimator under distorted grid conditions: (a) grid voltage; (b) active and reactive power; (c) grid current; (d) differential current; (e) upper arm current; (f) SM voltage; (g) estimated capacitance; and (h) estimation error.
Figure 12. Dynamic performance of the ADALINE estimator under distorted grid conditions: (a) grid voltage; (b) active and reactive power; (c) grid current; (d) differential current; (e) upper arm current; (f) SM voltage; (g) estimated capacitance; and (h) estimation error.
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Table 1. Comparison of different capacitance monitoring algorithm methods.
Table 1. Comparison of different capacitance monitoring algorithm methods.
Items MethodsRLS [12,30]KF [27] Proposed
Initialization dependencyHighVery HighLow
Matrix operationsYesYes (inversion)No
Numerical stabilityMediumMediumHigh
Convergence speedFastFastMedium to fast
AccuracyHighVery HighHigh
Execution time for 24 SMs (µs)8.258.755.95
Table 2. Simulation parameters.
Table 2. Simulation parameters.
ItemsSymbolsValues
Grid voltageeg400 V
DC Link voltageVdc3 kV
Ac inductorInductanceLf15 mH
ResistanceRf0.2 Ω
Arm inductorInductanceLarm30 mH
ResistanceRarm1 Ω
Carrier frequency-2 kHz
SM number per armN4
CapacitorCsm5 mF
SolverTs1 µs
AC Times requesttrac15 ms
DC Times requesttrdc17 ms
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Asnoun, M.; Rahoui, A.; Mesbah, K.; Boukais, B.; Frey, D.; Sadli, I.; Bacha, S. Neural Network-Based Submodule Capacitance Monitoring in Modular Multilevel Converters for Renewable Energy Conversion Systems. Electronics 2026, 15, 1486. https://doi.org/10.3390/electronics15071486

AMA Style

Asnoun M, Rahoui A, Mesbah K, Boukais B, Frey D, Sadli I, Bacha S. Neural Network-Based Submodule Capacitance Monitoring in Modular Multilevel Converters for Renewable Energy Conversion Systems. Electronics. 2026; 15(7):1486. https://doi.org/10.3390/electronics15071486

Chicago/Turabian Style

Asnoun, Mustapha, Adel Rahoui, Koussaila Mesbah, Boussad Boukais, David Frey, Idris Sadli, and Seddik Bacha. 2026. "Neural Network-Based Submodule Capacitance Monitoring in Modular Multilevel Converters for Renewable Energy Conversion Systems" Electronics 15, no. 7: 1486. https://doi.org/10.3390/electronics15071486

APA Style

Asnoun, M., Rahoui, A., Mesbah, K., Boukais, B., Frey, D., Sadli, I., & Bacha, S. (2026). Neural Network-Based Submodule Capacitance Monitoring in Modular Multilevel Converters for Renewable Energy Conversion Systems. Electronics, 15(7), 1486. https://doi.org/10.3390/electronics15071486

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