1. Introduction
Time-interleaved (TI) analog-to-digital converters (ADCs) represent a compelling architecture for high-speed data acquisition systems to achieve very high effective sampling rates [
1]. However, mismatches among sub-ADC channels, particularly timing skew, generate spurious spectral tones and limit the dynamic range performance [
2]. While clock distribution networks are often the primary focus of calibration, timing errors typically arise from composite impairments, including clock skew and analog front-end non-idealities, such as aperture delay mismatches in sampling switches. Such composite impairments are challenging for traditional clock-alignment methods to eliminate completely, as they do not account for the signal-dependent behavior of the actual sampling path.
Recent comprehensive analyses have highlighted the limitations of classical background calibration techniques across diverse TI-ADC architectures [
3]. While conventional digital background calibration approaches address this challenge, they suffer from inherent constraints regarding signal dependency. Notably, autocorrelation-based techniques exhibit dependency on input signal statistics, which leads to blind-spot frequencies where estimation accuracy degrades. Although refinements to correlation-based methods have been proposed such as absolute error-based detection [
4] and other advanced algorithm [
5,
6], the underlying signal-dependency issue remains unresolved. Recent advancements have attempted to address these limitations using advanced digital signal processing. For instance, Kim et al. [
7] proposed a fractional-delay FIR filter-based calibration to overcome the blind-spot problem. However, such approaches typically require high-order taps (e.g., 19 taps), imposing significant computational overhead. Furthermore, while mixed-signal techniques used in ultra-high-speed ADCs [
8] offer robustness, they often involve complex analog circuitry that limits scalability. Furthermore, while reference-based techniques may offer better input independence, they typically require significant analog overhead and complexity to implement auxiliary phase detectors.
To overcome these challenges, several machine-learning and nonlinear model-based calibration approaches have emerged [
9,
10,
11]. Specifically, while neural network-based methods [
9,
10] demonstrate high performance, they often function as “black boxes,” relying on complex models whose global convergence properties are difficult to prove analytically. In contrast, the proposed framework utilizes a closed-form analytical model, offering mathematical interpretability and verifiable stability essential for mission-critical systems. Furthermore, most existing methods rely on indirect estimation rather than directly optimizing the effective sampling instants manifested in the data.
As an alternative to traditional algorithmic or data-driven computing, coupled-oscillator networks have been proposed for solving complex optimization problems. This work proposes solving the timing calibration problem by mapping the timing mismatch to a coupled-oscillator network based on Kuramoto synchronization [
12,
13]. Leveraging the principles of in-phase synchronization by adaptive delayed feedback control established in physics [
14], the proposed framework treats each sub-ADC as an oscillator seeking a global energy minimum. Recent research has demonstrated that Kuramoto-inspired synchronization can be successfully applied to computational tasks beyond physics, such as combinatorial optimization problems [
15,
16].
Building on this progression, this work introduces the first systematic application of Kuramoto-based synchronization principles to the calibration of effective sampling timing in TI-ADCs. Unlike conventional approaches that align clock edges, this method utilizes the ADC digital outputs to estimate and correct the effective sampling instants directly. The total timing mismatch of each channel is mapped to the phase difference of a coupled oscillator network. This framework leverages the intrinsic tendency of coupled oscillators to evolve toward phase alignment. This study demonstrates that the calibration process can be formulated in terms of minimizing a global Lyapunov function, analogous to finding the ground state of a physical system. Each sub-ADC channel is modeled as a discrete-time Kuramoto oscillator closed around the digital data path. Under adaptive coupling control, the system naturally evolves toward a synchronized state. These dynamics inherently minimize the total inter-channel timing error without relying on input-signal statistics.
The main contributions of this paper are summarized as follows:
All-Digital Architecture: A fully digital calibration loop is proposed that utilizes ADC digital outputs directly, eliminating the need for auxiliary analog phase detectors or reference clocks.
Blind-Spot Immunity: By leveraging the gradient dynamics of the Kuramoto model, the proposed method converges robustly even at singular input frequencies (such as one-quarter of the sampling frequency) where conventional correlation-based methods fail.
Rigorous Stability Proof: A mathematical derivation based on a discrete-time Lyapunov function is provided to guarantee global phase convergence.
Power Efficiency: An adaptive coupling strength scheduling is introduced to minimize digital control power once synchronization is achieved.
2. Kuramoto-Based Synchronization Framework
In this section, the effective timing calibration problem is formulated as a phase synchronization task within a coupled-oscillator network. The total timing mismatch of the TI-ADC channels is modeled from the digital output data as a network of interacting phase oscillators, and a global energy function is defined to guarantee convergence.
2.1. Continuous Kuramoto Model—Mapping to TI-ADC
Modeling the calibration dynamics of the parallel sub-ADC channels is accomplished using a network of coupled oscillators. A critical distinction in this framework is the physical definition of the phase variable. Established herein is an isomorphism between the timing mismatch of the TI-ADC and the phase disorder of a coupled oscillator network. Consequently, the phase variable is defined not merely as a clock edge position, but as the effective sampling instant of the -th channel. This abstraction captures the aggregate timing delay contributed by both the clock distribution network and the analog front-end non-idealities such as sampling switch aperture delay.
The dynamics of this system can be modeled using the continuous Kuramoto model:
where
represents the intrinsic frequency offset of the sampling clock.
is the time-dependent global coupling strength which governs the synchronization speed.
In this data-driven framework, the phase difference
encodes the relative effective timing skew
detected directly from the ADC digital outputs. The relationship is given by:
where
and
is the sampling frequency. Consequently, driving
through synchronization inherently minimizes the total system-level timing error and ensures that the digital data streams are perfectly aligned in time. Conventional autocorrelation methods fail at singular frequencies (e.g.,
) because the sampled amplitude values repeat periodically (e.g.,
), causing the statistical variance to vanish. However, the proposed Kuramoto-based synchronization leverages phase information derived from the signal gradient rather than absolute amplitude. Consequently, the phase difference
remains observable even when the amplitude correlation is zero, effectively eliminating the blind spot.
2.2. Order Parameter and Collective Coherence
To quantify the collective synchronization of the effective sampling instants, the complex order parameter is employed [
12]:
where
measures the coherence of the population. In this context, a value of
indicates that the oscillators have spontaneously achieved phase alignment. This corresponds to a fully calibrated state where the effective sampling instants of all channels are synchronized to minimize the spur energy in the reconstructed spectrum.
Standard Kuramoto theory predicts a phase transition at a critical coupling strength
, defined for unimodal symmetric frequency distributions as:
where
is the density of the natural frequencies. This threshold provides a theoretical lower bound for the coupling strength required to initiate calibration. Since the exact distribution
is unknown a priori due to random process variations, the proposed system employs an adaptive coupling strategy to ensure the operational coupling strength consistently exceeds this theoretical lower bound.
2.3. Lyapunov Function from an Energy Perspective
The stability of the calibration scheme is analyzed by defining a global Lyapunov function that represents the aggregate phase dispersion. Following the thermodynamic analysis of the Kuramoto model by [
13], we define the scalar energy function
as:
This function corresponds to the potential energy of an XY ferromagnet model, where the constant term is introduced to ensure
. The time evolution of this energy along the system trajectories is derived by the chain rule and the gradient dynamics:
Equation (6) confirms that the system energy is monotonically non-increasing. As established in [
13], this negative semi-definite derivative ensures that the system trajectory follows the gradient of the potential landscape
, asymptotically approaching the global minimum. This dynamic relaxation inherently minimizes the phase dispersion, thereby driving the effective timing skews to zero. Consequently, the global asymptotic stability of the timing calibration is guaranteed, achieving synchronization solely via the digital feedback loop.
3. Proposed Calibration Model for MATLAB Simulation
In this section, the theoretical framework derived in
Section 2 is bridged to a concrete behavioral model used for validation. The continuous dynamics are mapped to a discrete-time system that mimics the operation of a 4-channel (
) Time-Interleaved ADC, as depicted in
Figure 1. This model captures the closed-loop feedback between the data-driven phase estimation, the digital control unit (DCU), and the actuation of the sampling phases.
3.1. Data-Driven Simulation Architecture and Discrete Dynamics
The overall architecture realizes a closed-loop feedback mechanism entirely within the digital domain. As illustrated in
Figure 1, the system consists of four sub-ADC channels (ADC1 to ADC4), where the sampling instant of each channel is adjustable via variable delay lines.
Unlike conventional architectures that rely on auxiliary analog phase detectors, the proposed scheme utilizes the 12-bit digital outputs of the TI-ADC itself. A digital phase estimator embedded within the DCU continuously monitors the relative timing mismatch between adjacent channels. In this simulation model, the phase variable represents the effective sampling instant of the -th channel at iteration , accounting for the composite delays of the clock path and sampling switches.
To simulate the continuous-time evolution of the system in the digital processor, Euler discretization is applied to the standard Kuramoto model. Since all sub-ADCs are driven by a common reference clock, the intrinsic frequency offset is negligible (
). The phase update equation for the
-th channel at the
-th iteration is given by:
In this formulation, represents the effective sampling instant of the -th channel at the -th iteration. The parameter denotes the discrete simulation time step, which is set to in the behavioral model to ensure high-precision filtering of the quantization noise. The variable signifies the estimated phase value that incorporates measurement noise effects modeled from the hardware derivative estimator. Finally, the sinusoidal term generates the attractive coupling force that spontaneously drives the ensemble toward global synchronization.
3.2. Adaptive Coupling Scheduling
The calibration system employs a dynamic scheduling strategy for the coupling strength to optimize the critical trade-off between convergence speed and steady-state jitter. The initial coupling strength is set to to ensure rapid frequency locking. The decay rate is empirically tuned to match the settling time of the loop filter. The minimum floor is selected to maintain lock against thermal drift while suppressing control loop noise. As the synchronization order parameter approaches unity, indicating coherent alignment, the system transitions into a tracking regime where decays exponentially toward a predefined minimum floor. This reduction effectively narrows the loop bandwidth, thereby suppressing noise modulation in the steady state while minimizing digital control activity. Furthermore, a recovery mechanism is embedded within the control logic to automatically boost the coupling strength should environmental disturbances cause a momentary loss of synchronization, ensuring robust long-term operation.
3.3. Performance Metrics and Baseline
To rigorously quantify the effectiveness of the proposed method, the system performance is evaluated across three distinct dimensions. First, the evolution of the global Lyapunov energy function is monitored to verify the theoretical claim that the system trajectory inherently seeks the minimum-energy ground state. Second, the residual RMS timing skew is computed after convergence to assess the precision of the effective sampling instants against the target requirement of sub-100 fs accuracy. Third, the spectral purity is analyzed by reconstructing the time-interleaved output and calculating the Spurious-Free Dynamic Range (SFDR), specifically focusing on the suppression of interleaving tones at singular input frequencies. For comparative analysis, a standard correlation-based background calibration is simulated under identical conditions, serving as a baseline to highlight the superior blind-spot immunity and power efficiency of the proposed Kuramoto framework.
3.4. Behavioral Modeling of Phase Estimation
The practical feasibility of this all-digital calibration hinges on extracting accurate relative phase information directly from the ADC output codes without auxiliary analog detectors. The estimator operates by correlating the derivative of the sampled data (approximated as ) with the signal itself. Unlike amplitude-based correlation, this method extracts phase information from the signal gradient, maintaining non-zero sensitivity even at blind-spot frequencies. Furthermore, the integration nature of the feedback loop acts as a low-pass filter, effectively averaging out the instantaneous quantization and thermal noise modeled in the simulation.
The accuracy of the derivative-based estimator is intrinsically linked to the input Signal-to-Noise Ratio (SNR), with estimation variance scaling inversely with SNR. However, theoretical analysis and simulations confirm that the integration nature of the feedback loop effectively filters out high-frequency estimation noise. Consequently, the system maintains robust convergence even under varying SNR conditions, as the adaptive coupling strength dynamically adjusts the loop bandwidth to suppress the increased noise floor.
To facilitate efficient behavioral simulation without the computational burden of bit-level statistical accumulation, this estimation process is abstracted by injecting equivalent Gaussian phase noise into the true phase values. Based on hardware characterization of 12-bit derivative estimators, a noise standard deviation of 0.09 rad is applied to the phase variables, faithfully replicating the stochastic nature of the detection loop while allowing for rapid verification of the closed-loop dynamics.
4. Mathematical Proof of Convergence
This section provides the mathematical foundation proving that the proposed discrete Kuramoto-based calibration model guarantees global synchronization. The derivation extends the thermodynamic analysis from [
13] to the discrete-time domain using the stability theorems established in [
17] to establish the convergence of effective timing errors to zero.
4.1. Lyapunov Function Definition
To analyze the collective behavior of the system, we first define a scalar energy function that represents the aggregate phase dispersion at iteration
. Following the thermodynamic analysis of the Kuramoto model by [
13], we define the discrete-time Lyapunov function
as:
This function corresponds to the potential energy of an XY ferromagnet model. The constant term is introduced to ensure that the function is positive definite () and vanishes only when phase alignment is achieved ( if for all ). The normalization factor ensures that the energy value remains bounded regardless of the number of channels.
4.2. Discrete-Time Lyapunov Stability Analysis
To prove stability in the discrete-time domain, we must show that the energy difference
is non-positive along the system trajectories defined by Equation (7). Since the update step size
is sufficiently small, we approximate the energy change using a first-order Taylor series expansion:
where
To evaluate this, we need to obtain an explicit expression for
. First, we compute the gradient of Equation (8) with respect to
yields:
Next, we substitute the phase update rule from Equation (7) for
:
Multiplying these two terms (10) and (11) and summing over all
channels, we obtain the Lyapunov difference equation:
Since , , and the squared summation term is always non-negative, the leading term of is strictly non-positive (). The higher-order term represents the discretization error, which is negligible given the simulation step size ().
4.3. Convergence via LaSalle’s Invariance Principle
According to the Lyapunov stability theorems for discrete-time systems [
16], the condition
ensures that the system is stable and the energy
is monotonically non-increasing. To prove asymptotic convergence, we invoke LaSalle’s Invariance Principle for discrete systems [
16]. The system trajectories must converge to the largest invariant set where the energy change is zero (
). From Equation (12),
implies:
This condition is satisfied when which corresponds to the synchronized equilibrium state. Therefore, the system spontaneously evolves toward the global phase-locked state where the effective timing skews are minimized.
Intuitively, the Lyapunov function can be visualized as a potential energy landscape where the synchronized state corresponds to the global minimum. The update rule in Equation (7) ensures that the system always moves ‘downhill’ along the steepest gradient of this landscape. Therefore, regardless of the initial phase disorder, the system is energetically compelled to relax into the synchronized state, much like a physical system settling into its ground state.
4.4. Global Synchronization Condition
While the Lyapunov analysis guarantees the direction of convergence, we must also ensure the local stability of the discrete update steps to prevent oscillations. To analyze local stability, we linearize the system around the synchronized state where phase differences are small (
). Using the small-angle approximation
, the update Equation (7) simplifies to a linear form. Defining the deviation from the average phase as
, and noting that
, the error dynamics are derived as:
For the error to decay asymptotically, the eigenvalue magnitude must be less than unity:
Thus, provided that the adaptive coupling strength satisfies condition (15), the discrete-time system is guaranteed to converge to the synchronized state.
In a practical hardware implementation, represents the integral loop gain. To ensure stability, the product of the coupling strength and loop gain must strictly satisfy . Exceeding this limit would push the system poles outside the unit circle, leading to oscillatory behavior.
4.5. Theorem and Corollary
Theorem 1 (Global Discrete Synchronization). For the discrete Kuramoto system with adaptive coupling satisfying the condition derived in (15) (), the Lyapunov function is non-increasing and converges to a finite constant. Consequently, all phase differences converge to zero asymptotically:
Corollary 1 (Effective Timing Convergence). Given the mapping between phase and timing in Equation (2), the convergence of phase differences implies . Hence, the total effective timing errors, including clock skew and sampling switch mismatches, vanish asymptotically, guaranteeing system-level synchronization.
5. MATLAB Simulation and Verification
This section presents behavioral MATLAB simulations to validate the analytical model and quantify the performance improvements achieved by the proposed data-driven synchronization method. Specifically, the system’s convergence behavior is investigated under the critical “blind spot” scenario where conventional correlation-based methods historically fail.
5.1. Simulation Setup
Table 1 summarizes the key simulation parameters derived from the behavioral model described in
Section 3. To rigorously test the robustness against blind spots, the input signal frequency was set to 2.5 GHz, which corresponds to exactly one-fourth of the 10 GS/s aggregate sampling rate (
). This frequency represents a singularity point for standard autocorrelation algorithms, as the sampled values repeat periodically (e.g.,
) without providing sufficient statistical variance for skew estimation. The initial timing skews were randomly distributed within a range of
ps.
For comparative analysis, the autocorrelation calibration proposed by Wei et al. [
18] was implemented as a baseline. This method detects timing skew by minimizing the difference in absolute values between adjacent sample steps (i.e., balancing
and
).
In our behavioral simulation, the feedback loop was modeled using an integral controller similar to the proposed method. To ensure stable convergence within the simulation environment, which bridges 12-bit quantized error codes and picosecond-scale timing adjustments, the loop gain (update step size, ) was empirically optimized to . This value serves as a scaling factor to translate the digital error gradients into effective time-delay updates without causing loop instability.
5.2. Convergence Behavior in Blind Spots
The temporal evolution of the system dynamics is visualized in
Figure 2, which plots the synchronization order parameter
and the normalized Lyapunov energy
. Unlike correlation-based methods that stagnate due to the lack of gradient information at
, the proposed Kuramoto-based loop successfully extracts phase mismatch information. The results corroborate the theoretical stability analysis in
Section 4: the Lyapunov energy decays monotonically, driving the order parameter toward unity (
). While the simulation allows for 50,000 iterations to verify stability down to the femtosecond regime, coarse lock is achieved within the first few thousand cycles, demonstrating rapid acquisition.
5.3. Residual Effective Timing Skew Reduction
To quantify the precision of the effective sampling instants, the RMS value of the residual timing errors
was tracked.
Figure 3 compares the convergence trajectory of the proposed method against a conventional autocorrelation baseline [
18] under the identical 2.5 GHz input condition.
The proposed method achieves sub-100 fs residual skew while the baseline stagnates. The baseline method [
18] fails to converge due to the inherent singularity at
. In this blind-spot scenario, the sampled sequence (e.g.,
) produces identical absolute differences between adjacent samples (i.e.,
). As a result, the gradient information vanishes, causing the error detector output to become zero regardless of the actual timing skew.
Consequently, the residual RMS skew remains at approximately 8 ps, which corresponds to the initial uncorrected RMS skew derived from a uniform distribution of ps (peak-to-peak). In stark contrast, the proposed Kuramoto synchronization scheme continuously minimizes the phase dispersion, driving the average residual skew down to 64 fs. This represents a reduction factor of over 99% and serves as empirical evidence that the proposed feedback loop remains fully functional even when the input signal is phase-locked to the sampling clock.
5.4. Spectral Performance
To evaluate the impact of timing alignment on spectral purity, a Fast Fourier Transform (FFT) analysis was performed using a coherent input tone at GHz (). This frequency was chosen to ensure that any timing-skew-induced spurs appear at predictable, non-overlapping locations in the spectrum.
Figure 4 illustrates the reconstructed output spectra. Prior to calibration, prominent interleaving spurs limit the Spurious-Free Dynamic Range (SFDR) to approximately 20.68 dB. After Kuramoto-based calibration, these dominant spurs are suppressed to a level approaching the quantization noise limit. The system achieves an SFDR of 75.80 dB (a 55.12 dB improvement) and an SNDR of 56.78 dB. Based on the achieved SNDR, the Effective Number of Bits (ENOB) is calculated as 9.14 bits using the standard formula
. It is important to note that this performance is primarily limited by the simulation’s injected phase noise, which corresponds to a residual RMS jitter of approximately 65 fs, rather than the quantization noise of the 12-bit core (≈74 dB). The result confirms that the calibration loop successfully suppresses the skew-induced errors down to the theoretical jitter floor.
Table 2 summarizes the quantitative performance comparison between the proposed Kuramoto-based method and the conventional correlation-based baseline [
18] at the critical blind-spot frequency.
5.5. Broadband Performance Consistency
To demonstrate the robustness of the proposed calibration framework across the entire Nyquist bandwidth, the dynamic performance metrics were evaluated by sweeping the input frequency from 0.2 GHz to 4.9 GHz.
Figure 5 presents the simulation results for Signal-to-Noise-and-Distortion Ratio (SNDR) and Spurious-Free Dynamic Range (SFDR) before and after calibration.
As illustrated in the dashed curves, the uncalibrated performance degrades significantly as the input frequency increases. This trend is consistent with the theoretical prediction that timing-skew-induced error power is proportional to the square of the input frequency (). In contrast, the proposed Kuramoto-based calibration (solid curves) effectively mitigates these errors, maintaining a flat performance profile across the full frequency range. The calibrated SNDR remains stable at approximately 56–57 dB, and the SFDR consistently exceeds 65 dB regardless of the input frequency. Notably, at the critical blind-spot frequency of 2.5 GHz (), the system shows no performance dip, confirming that the data-driven phase estimator successfully extracts timing gradients even when signal statistics are singular. This result verifies that the proposed method provides input-independent, broadband correction suitable for high-speed wideband applications.
5.6. Adaptive Coupling and Efficiency
Finally, the efficacy of the adaptive coupling scheduling described in
Section 3.2 is analyzed. As shown in
Figure 6, the coupling strength
is initialized at a high value to ensure robust locking and then decays exponentially as the system settles.
This “decay-and-recovery” profile provides two distinct advantages. First, it minimizes the steady-state jitter by reducing the loop bandwidth once synchronization is achieved. Second, it reduces the effective update magnitude required for the variable delay lines. This analysis indicates that this adaptive scheduling reduces the cumulative digital control activity by approximately 40% compared to a fixed-step implementation, validating the “Power-Efficient” claim of this work.
6. Practical Feasibility and Analytical Discussion
While the behavioral simulations confirm the theoretical convergence, translating this framework into silicon requires addressing practical implementation challenges. This section discusses the feasibility of the proposed all-digital synchronization scheme, focusing on hardware synthesis, power efficiency, and environmental robustness.
6.1. Synthesizable All-Digital Architecture
A distinguishing feature of the proposed framework is its compatibility with standard digital synthesis flows. Unlike prior art [
3,
4,
5,
6] that rely on custom analog macros or complex replica circuits, this scheme closes the calibration loop entirely within the digital domain.
Figure 7 illustrates the detailed hardware implementation of the proposed calibration engine.
To minimize hardware overhead, the computation of the nonlinear sinusoidal coupling term in Equation (7) is implemented using a Coordinate Rotation Digital Computer (CORDIC) processor operating in rotation mode. This approach replaces area-hungry look-up tables (LUTs) or hardware multipliers with a sequence of simple shift-and-add operations. Consequently, the discrete Kuramoto update equation comprises only fixed-point additions and bit-wise shifts, which can be efficiently synthesized using standard CMOS logic cells.
While the iterative nature of the CORDIC algorithm introduces a processing latency of approximately 10–15 clock cycles, this delay is negligible in the context of the calibration loop bandwidth (<1 MHz). Since the timing drift occurs on a millisecond time scale, the loop stability is not compromised by the pipelined latency. This design choice prioritizes the reduction of logic gate count and static power over minimal latency, aligning with the low-power requirements of background calibration.
Furthermore, the statistical phase estimator inherently averages out instantaneous quantization noise and thermal noise, enabling the detection of femtosecond-scale timing gradients that would otherwise be obscured in single-shot analog measurements. As shown in the block diagram, the Gradient Phase Detector extracts timing information directly from the ADC output codes, which is then processed by the CORDIC engine and the adaptive loop filter to generate the VDL control word. This architecture not only reduces the logic gate count but also facilitates easy porting to advanced process nodes.
6.2. Minimal Hardware Overhead via Decimation
To minimize the digital power penalty, the proposed algorithm is designed to operate on a decimated subset of the ADC output stream rather than the full-rate data. For instance, updating the delay lines at a rate of drastically reduces the dynamic switching power of the Digital Control Unit (DCU). Since the timing drift due to temperature variations (<1 Hz) is orders of magnitude slower than the calibration loop bandwidth, this decimation strategy does not compromise tracking performance. Moreover, the adaptive coupling logic further reduces power by freezing the delay control codes once the system reaches the steady-state ground energy ().
Moreover, the architecture incorporates a “Bypass Mode” to further maximize energy efficiency. Once the synchronization order parameter approaches unity (), indicating a locked state, the computationally intensive blocks, specifically the Gradient Phase Detector and CORDIC processor, are clock-gated. The loop effectively enters a sleep state where the delay control codes are frozen, eliminating dynamic power consumption in the calibration engine until a re-lock is triggered by environmental drift.
6.3. Intrinsic Robustness to PVT Variations
The synchronization mechanism inherits intrinsic robustness from its Lyapunov stability foundation. In a physical implementation, Process, Voltage, and Temperature (PVT) variations manifest as slowly varying drifts in the clock distribution network and sampling switch aperture delays. Unlike open-loop or background calibration methods that require recalibration when operating conditions change, the Kuramoto-based loop continuously compensates for these composite errors through the global coupling term. As long as the adaptive coupling strength remains above the critical threshold , the system is mathematically guaranteed to maintain synchronization, providing a “set-and-forget” solution for mission-critical applications.
To quantitatively verify this robustness, we extended the behavioral simulation to include realistic hardware impairments.
Figure 8 presents the convergence behavior under worst-case conditions, including random gain mismatches (
), DC offsets (
of full-scale), and SNR degradation due to high-frequency input attenuation (simulating a 2.5
noise floor). As shown in the comparison, although the convergence speed is slightly reduced due to the gain errors affecting the effective loop bandwidth, the system successfully reaches the target residual skew of <100 fs. This confirms that the adaptive coupling logic effectively compensates for static PVT variations and dynamic environmental drifts.
6.4. Scalability Considerations
For systems with a larger number of channels (e.g., or ), the computational complexity and routing overhead of the all-to-all coupling () can be mitigated by adopting a nearest-neighbor coupling topology. In this configuration, each sub-ADC channel interacts only with its adjacent neighbors, reducing the complexity to . While all-to-all coupling provides the strongest synchronization force, local coupling topologies are a practical alternative for large-scale arrays, ensuring that the calibration architecture remains synthesizable and power-efficient without fundamentally compromising the ability to achieve a phase-locked state.
7. Conclusions
This paper presented a mathematically rigorous, data-driven synchronization framework for calibrating effective sampling timing in Time-Interleaved ADCs. By establishing an isomorphism between the timing mismatch problem and the phase disorder of a coupled oscillator network, the critical “blind spot” singularity often observed in conventional correlation-based methods was successfully overcome.
A discrete-time Lyapunov stability analysis provided a theoretical guarantee that the system trajectory naturally evolves toward a minimum-energy ground state, ensuring global convergence of the effective sampling instants. Behavioral simulations of a 10 GS/s, 12-bit TI-ADC confirmed that the proposed method remains robust even at the singular input frequency of 2.5 GHz (). The Kuramoto-based loop reduced the residual effective timing skew to 64 fs, achieving an SFDR of 75.80 dB and an SNDR of 56.78 dB, which corresponds to a 99% reduction in timing error compared to the baseline.
Furthermore, the proposed adaptive coupling strategy was shown to reduce the digital control activity by approximately 40% in the steady state, validating the energy efficiency of the algorithm. Unlike the fractional-delay FIR filter method [
7], which relies on computationally expensive convolution operations, the proposed Kuramoto-based loop utilizes a lightweight iterative phase update mechanism, thereby minimizing the hardware complexity and dynamic power consumption. This study demonstrates that extracting phase information directly from the ADC data stream allows for precise, input-independent timing correction. The resulting all-digital architecture eliminates the need for auxiliary analog phase detectors, offering a scalable, process-portable solution for next-generation high-speed wireline and wireless receivers.
Future work involves verifying the scalability of this approach in massive channel systems (e.g., >16 channels) and assessing hardware implementation challenges, such as quantization noise effects and layout parasitics, in advanced CMOS processes.
Author Contributions
Conceptualization, D.L. and T.H.L.; Methodology, D.L.; Software, D.L.; Validation, D.L.; Formal Analysis, D.L. and R.L.S.; Investigation, D.L. and R.L.S.; Resources, T.H.L.; Data Curation, D.L.; Writing—Original Draft Preparation, D.L.; Writing—Review and Editing, R.L.S. and T.H.L.; Visualization, D.L.; Supervision, T.H.L.; Project Administration, D.L.; Funding Acquisition, T.H.L. All authors have read and agreed to the published version of the manuscript.
Funding
The work of Richelle L. Smith was supported by the Stanford-Samsung Research Initiative.
Data Availability Statement
The data and simulation code presented in this study are not publicly available due to intellectual property rights and corporate confidentiality restrictions.
Conflicts of Interest
Author Dongsuk Lee was employed by the company Samsung Electronics. The remaining authors declare that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest.
References
- Black, W.C.; Hodges, D.A. Time Interleaved Converter Arrays. IEEE J. Solid-State Circuits 1980, 15, 1022–1029. [Google Scholar] [CrossRef]
- Vogel, C.; Johansson, H. Time-Interleaved Analog-to-Digital Converters: Status and Future Directions. In Proceedings of the 2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006), Kos, Greece, 21–24 May 2006; pp. 4–3389. [Google Scholar] [CrossRef]
- Gu, M.; Tao, Y.; Zhong, Y.; Jie, L.; Sun, N. Timing-Skew Calibration Techniques in Time-Interleaved ADCs. IEEE Open J. Solid-State Circuits Soc. 2025, 5, 1–10. [Google Scholar] [CrossRef]
- Park, J.; Park, J.; Hong, J.; Park, S.; Lee, D.; Lee, S.; Shin, H.; Lee, K.; Koo, B.; Cho, Y.; et al. A 12-bit 10GS/s Time-Interleaved SAR ADC with Even/Odd Channel-Correlated Absolute Error-Based Over-Nyquist Timing-Skew Calibration in 5 nm FinFET. In Proceedings of the 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Honolulu, HI, USA, 16–20 June 2024; pp. 1–2. [Google Scholar] [CrossRef]
- Cao, Y.; Li, X.; Park, S.; Chen, J. A 12-GS/s 12-bit Time-Interleaved ADC Using Input-Independent Timing-Skew Calibration with Global Dither Injection. IEEE J. Solid-State Circuits 2024, 59, 4211–4224. [Google Scholar] [CrossRef]
- Gu, M.; Tao, Y.; He, X.; Zhong, Y.; Jie, L.; Sun, N. A 1-GS/s 11-b Time-Interleaved SAR ADC with Robust, Fast, and Accurate Autocorrelation-Based Background Timing-Skew Calibration. IEEE J. Solid-State Circuits 2025, 60, 421–431. [Google Scholar] [CrossRef]
- Kim, J.; Cho, G.; Song, H.; Kim, H.; Kim, J. A 7b 30 GS/s 0.032 mm2 CI-SAR TIADC in 28-nm CMOS with Fractional-Delay FIR Filter Based Full-Digital Background Timing-Skew Calibration. In Proceedings of the IEEE European Solid-State Electronics Research Conference (ESSERC 2025), Munich, Germany, 15–18 September 2025; pp. 25–28. [Google Scholar] [CrossRef]
- Zhang, Y.; Zhang, M.; Wu, Z.; Zhu, Y.; Martins, R.P.; Chan, C.-H. 24.5 A 72 GS/s 9b Time-Interleaved Pipeline-SAR ADC Achieving 55.3/49.3 dB SFDR at 20 GHz/Nyquist Inputs in 16 nm FinFET. In Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC 2025), San Francisco, CA, USA, 16–20 February 2025; pp. 436–438. [Google Scholar] [CrossRef]
- Peng, X.; Zhang, Y.; Li, H.; Wang, J.; Chen, Y.; Liu, Q. A Neural Network Based Calibration Technique for TI-ADCs with Derivative Information. In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2023), Monterey, CA, USA, 21–25 May 2023; pp. 1–5. [Google Scholar] [CrossRef]
- Zhang, X.; Li, Y.; Chen, W.; Kumar, R. A New Artificial Neural Network-Based Calibration Mechanism for ADCs: A Time-Interleaved ADC Case Study. IEEE Trans. Very Large Scale Integr. VLSI Syst. 2024, 32, 1184–1194. [Google Scholar] [CrossRef]
- Bhanushali, S.P.; Nasrin, S.; Maiti, D.; Sanyal, A. Machine-Learning Based Blind Digital Calibration of Time-Interleaved ADC. In Proceedings of the IEEE 43rd VLSI Test Symposium (VTS 2025), Tempe, AZ, USA, 27–30 April 2025; pp. 1–5. [Google Scholar] [CrossRef]
- Strogatz, S.H. From Kuramoto to Crawford: Exploring the onset of synchronization in populations of coupled oscillators. Phys. D Nonlinear Phenom. 2000, 143, 1–20. [Google Scholar] [CrossRef]
- van Hemmen, J.L.; Wreszinski, W.F. Lyapunov function for the Kuramoto model of nonlinearly coupled oscillators. J. Stat. Phys. 1993, 72, 145–166. [Google Scholar] [CrossRef]
- Novičenko, V.; Ratas, I. In-phase synchronization in complex oscillator networks by adaptive delayed feedback control. Phys. Rev. E 2018, 98, 042302. [Google Scholar] [CrossRef]
- Smith, R.L.; Lee, T.H. Polychronous Oscillatory Cellular Neural Networks for Solving Graph Coloring Problems. IEEE Open J. Circuits Syst. 2023, 4, 156–164. [Google Scholar] [CrossRef]
- Smith, R.L.; Lee, T.H. Computing Max 3-Cut with CMOS Tripolar Oscillatory Cellular Neural Networks. IEEE Trans. Circuits Syst. II Express Briefs 2025, 72, 2032–2036. [Google Scholar] [CrossRef]
- Tan, F.; Wu, Z.; Lü, L. Lyapunov theory for discrete time systems. arXiv 2018, arXiv:1809.05289. [Google Scholar] [CrossRef]
- Wei, H.; Zhang, P.; Sahoo, B.D.; Razavi, B. An 8 Bit 4 GS/s 120 mW CMOS ADC. IEEE J. Solid-State Circuits 2014, 49, 1751–1761. [Google Scholar] [CrossRef]
Figure 1.
Block diagram of the proposed Kuramoto-based TI-ADC calibration architecture. The Digital Control Unit (DCU) receives 12-bit ADC outputs, estimates the relative phase error , and updates the Variable Delay Lines (VDL) to minimize skew.
Figure 1.
Block diagram of the proposed Kuramoto-based TI-ADC calibration architecture. The Digital Control Unit (DCU) receives 12-bit ADC outputs, estimates the relative phase error , and updates the Variable Delay Lines (VDL) to minimize skew.
Figure 2.
Transient evolution of the normalized Lyapunov energy function and synchronization order parameter . The monotonic decay of energy corroborates the theoretical stability analysis, validating global convergence.
Figure 2.
Transient evolution of the normalized Lyapunov energy function and synchronization order parameter . The monotonic decay of energy corroborates the theoretical stability analysis, validating global convergence.
Figure 3.
Comparison of RMS timing skew convergence between the proposed Kuramoto method and a conventional correlation-based baseline at the blind-spot frequency ( GHz).
Figure 3.
Comparison of RMS timing skew convergence between the proposed Kuramoto method and a conventional correlation-based baseline at the blind-spot frequency ( GHz).
Figure 4.
Reconstructed output spectra before (dashed) and after (solid) calibration for a coherent input tone at GHz. The calibration suppresses interleaving spurs to a level comparable to the quantization noise, improving SFDR by 55.12 dB.
Figure 4.
Reconstructed output spectra before (dashed) and after (solid) calibration for a coherent input tone at GHz. The calibration suppresses interleaving spurs to a level comparable to the quantization noise, improving SFDR by 55.12 dB.
Figure 5.
Simulated (a) SNDR and (b) SFDR versus input frequency ranging from 0.2 GHz to 4.9 GHz. The proposed calibration (solid lines) maintains consistent performance across the Nyquist zone, effectively eliminating the frequency-dependent degradation observed in the uncalibrated state (dashed lines).
Figure 5.
Simulated (a) SNDR and (b) SFDR versus input frequency ranging from 0.2 GHz to 4.9 GHz. The proposed calibration (solid lines) maintains consistent performance across the Nyquist zone, effectively eliminating the frequency-dependent degradation observed in the uncalibrated state (dashed lines).
Figure 6.
Evolution of the adaptive coupling strength employing a decay-and-recovery scheduling. This dynamic adjustment minimizes steady-state jitter and reduces digital control activity for power efficiency.
Figure 6.
Evolution of the adaptive coupling strength employing a decay-and-recovery scheduling. This dynamic adjustment minimizes steady-state jitter and reduces digital control activity for power efficiency.
Figure 7.
Detailed hardware architecture of the proposed digital calibration loop. The Gradient Phase Detector extracts timing information directly from the ADC output codes. Subsequently, the CORDIC processor computes the nonlinear sinusoidal coupling term () without hardware multipliers, ensuring efficient digital synthesis.
Figure 7.
Detailed hardware architecture of the proposed digital calibration loop. The Gradient Phase Detector extracts timing information directly from the ADC output codes. Subsequently, the CORDIC processor computes the nonlinear sinusoidal coupling term () without hardware multipliers, ensuring efficient digital synthesis.
Figure 8.
Simulation results demonstrating robustness against hardware non-idealities. The red solid line shows the convergence trajectory under severe conditions, including gain mismatches (), DC offsets ( of full scale), and increased estimation noise (low SNR, 2.5 noise floor), while the grey dashed line represents the ideal case. The calibration loop successfully converges to the target accuracy despite these impairments.
Figure 8.
Simulation results demonstrating robustness against hardware non-idealities. The red solid line shows the convergence trajectory under severe conditions, including gain mismatches (), DC offsets ( of full scale), and increased estimation noise (low SNR, 2.5 noise floor), while the grey dashed line represents the ideal case. The calibration loop successfully converges to the target accuracy despite these impairments.
Table 1.
MATLAB Simulation Parameters.
Table 1.
MATLAB Simulation Parameters.
| Parameter | Symbol | Value |
|---|
| Number of channels | N | 4 |
| Resolution | — | 12 bits |
| Aggregate sampling rate | | 10 GS/s |
| Input frequency | | 2.5 GHz |
| Initial timing skew | | ±20 ps |
| Target Residual Skew | — | <70 fs |
Table 2.
Performance Comparison of Blind-Spot Frequency ().
Table 2.
Performance Comparison of Blind-Spot Frequency ().
| Metric | Conventional Correlation [18] | Proposed Kuramoto Method |
|---|
| Convergence | Fails (Stagnates) | Successful |
| Residual RMS Skew | ~8 ps (Uncorrected) | 64 fs |
| GHz) | 20.68 dB | 75.80 dB |
| Blind-Spot Immunity | No | Yes |
| Input Independence | Low (Signal-Dependent) | High |
| Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content. |