Hardware Accelerator Design for MUSIC-DOA Estimation with Bilateral Jacobi Optimization

Abstract

Real-time Direction of Arrival (DOA) estimation demands high computational throughput and numerical precision. Consequently, dedicated hardware accelerators are essential. This paper presents an architecture to accelerate the MUSIC algorithm using an improved complex bilateral Jacobi eigenvalue decomposition (EVD). First, we design a triangular systolic array for Hermitian matrices. It employs an output-stationary dataflow to enable efficient parallel covariance computation. Second, we propose an enhanced EVD algorithm. It replaces CORDIC approximations with direct analytical rotations. This significantly improves numerical stability and accuracy. Third, we introduce hardware optimizations. These include unit reuse, integrated termination conditions, and pre-stored steering vectors. These measures reduce resource consumption while maintaining full functionality. Experiments on a Xilinx Virtex-6 platform validate the design. The architecture achieves a root mean square error (RMSE) below $0.24°$ with 300 snapshots. Processing latency is only 76.17 µs. The design utilizes 10,775 LUTs and 73 DSP slices. This work balances accuracy, speed, and efficiency. It offers a practical solution for real-time, high-precision DOA systems.

1. Introduction

Array signal processing technology is widely applied in military and civilian fields, including radar, wireless communications, radio astronomy, and sonar. It utilizes spatially distributed sensor arrays to receive and process target signals, thereby enabling the extraction of critical parameters such as Direction of Arrival (DOA). As one of the core technologies in this field, DOA estimation processes the signals received by the array to accurately measure the spatial direction of targets, thereby obtaining their orientation and location information.

Field-Programmable Gate Array (FPGA) is particularly well-suited for high-performance DOA estimation using the Multiple Signal Classification (MUSIC) algorithm. This is due to its parallel processing capability, reconfigurability, and support for real-time operation. Specifically, FPGA employs parallel computing units and pipelined architectures. These features enable real-time construction and eigendecomposition of the received signal covariance matrix. As a result, the spatial spectrum estimation process is accelerated, and system throughput is increased [1]. Moreover, the hardware programmability of FPGA allows flexible implementation of key MUSIC algorithm steps. Examples include signal/noise subspace separation and spectral peak search. It also supports dynamic adjustment and reconfiguration of algorithm parameters. Such adaptability enables rapid response to changes in the signal environment [2,3]. Additionally, FPGA provides deterministic low-latency processing. This meets microsecond-level time constraints for DOA estimation and updates [4]. Finally, hardware–software co-design enables efficient mapping of core MUSIC computational modules onto dedicated hardware logic. This approach achieves a favorable balance among estimation performance, algorithm flexibility, and implementation cost. In this regard, FPGA offers advantages over Application-Specific Integrated Circuit (ASIC) [5,6].

The Classical MUSIC algorithm, proposed by Schmidt in 1979 [7], is a cornerstone of DOA estimation. It offers high resolution, accuracy, and stability [8]. Despite being proposed over four decades ago, MUSIC remains prevalent in real-time FPGA and ASIC systems [9]. Researchers have developed variants to reduce complexity. For example, root-MUSIC [10] solves polynomial equations to avoid spectral searches. Sectorized strategies [11,12] minimize angle evaluations. Recent studies also explore approximate covariance matrices and iterative EVD acceleration [13,14]. However, many simplifications compromise numerical stability. Others rely on inefficient operations like complex divisions or CORDIC iterations. The primary bottleneck remains the EVD of the Hermitian covariance matrix. This process is computationally expensive for resource-limited FPGA. Furthermore, software implementations often lack energy efficiency. To address these issues, this paper proposes a hardware-efficient architecture based on an improved complex bilateral Jacobi method. Our design replaces unstable approximations with precise rotation operations. It employs systolic arrays with resource-reuse strategies. This approach achieves high throughput, low latency, and minimal resource consumption. Consequently, it enables robust MUSIC deployment in real-world applications.

Existing hardware approaches for DOA estimation have rarely explored efficient matrix decomposition. Dey [15] proposed a reconfigurable FPGA framework suitable for modular design but did not implement eigenvalue decomposition. Guo [16] accelerated MUSIC on multi-core DSP, yet general-purpose processors cannot match the throughput of dedicated hardware. Yan [17], Thiripurasundari [18], and Wang [19] built FPGA-based MUSIC systems for specific applications, all still relying on full eigendecomposition. Despite its advantages, the real-valued Capon-like method proposed by Chen [20] relies on matrix inversion, which may suffer from numerical instability under low SNR or limited snapshot conditions, and its applicability is limited to specific array geometries. Shi [21] proposed a parallel Jacobi method that reduces CORDIC cycles per iteration to accelerate eigenvalue decomposition on FPGA, but it still relies on CORDIC-based approximations and is limited to real matrices. Gupta [22] implemented a Jacobi eigenvalue solver on FPGA, which proved too slow and was limited to small matrices. Butt [23] and Kim [24] used unitary transforms to enable real-valued processing yet still required eigendecomposition. The method proposed by Zhang [25] is limited to real symmetric matrices and cannot be directly applied to complex Hermitian matrices commonly encountered in practical array signal processing. Some hardware DOA approaches apply LU, LDL, or Cholesky decomposition to the covariance matrix, then use least squares or eigenvalue decomposition for source estimation. Wang [26] designed a block-pipelined LU decomposer but utilized controller-driven scheduling instead of pure data flow. Feali [27] studied fixed-point errors in sparse LU, which is less relevant because DOA covariance matrices are typically dense. Fang [28] employed CPU-FPGA co-design for LU decomposition, introducing high communication overhead. Ingemarsson [29] applied LDL decomposition, which only works for positive definite matrices. Aslan [30], Desai [31], and Lee [32] implemented QR decomposition; however, QR is more complex than LU and does not map well to regular systolic arrays.Wang [33] presented a truly two-dimensional systolic array for QR decomposition, demonstrating its scalability but also highlighting the inherent complexity of QR for Hermitian structures. Luo [34] and Fu [35] developed Cholesky decomposers, which are structurally similar to LU decomposers but fail when the matrix is not symmetric positive definite. Zou [36] and Chen [37] optimized MUSIC at the system level, leaving the core decomposition module unchanged. In addition, Huang [38] reduced spectral search costs using a coarse-to-fine strategy but did not accelerate the core decomposition. In summary, while systolic arrays have been widely studied for matrix decomposition since the 1980s [39], efficient systolic architectures for covariance matrix computation in real-time DOA estimation have been explored to a lesser extent. To reduce hardware resource consumption, this work proposes a triangular systolic array tailored for this task, which optimizes resource utilization by directly mapping the computation onto the Hermitian data structure.

Based on the aforementioned research directions, this paper presents a hardware-efficient approach for MUSIC-based DOA estimation. First, we design a triangular systolic array. This array efficiently computes the Hermitian covariance matrix. It directly addresses the data preprocessing bottleneck. Second, we tackle the core computational bottleneck, which is the eigenvalue decomposition (EVD) of the covariance matrix. We propose an improved complex bilateral Jacobi algorithm. We also design a dedicated hardware acceleration architecture for this algorithm. To further improve efficiency and reduce resource consumption, we introduce several optimization techniques. These techniques include output-stationary data flow, simplified diagonal processing elements, parallel data injection, and internal timing alignment. Furthermore, we extend the architecture to support nested array configurations. This extension achieves higher source capacity and better estimation performance.

The main contributions of this paper are summarized as follows:

• In the covariance matrix computation stage of the MUSIC algorithm, a triangular systolic array is designed, which exploits the symmetry of Hermitian matrices to reduce computational complexity and memory bandwidth requirements.
• A hardware-efficient architecture is proposed for the EVD of Hermitian matrices, specifically tailored for MUSIC algorithm implementation on FPGA platforms.
• Several hardware-aware optimizations are introduced to improve throughput and resource utilization, including output-stationary data flow and simplified PE design.
• The architecture is extended to support nested arrays, achieving better resolution and higher source capacity compared to conventional methods.

The remainder of this paper is organized as follows. Section 2 introduces the MUSIC algorithm and nested arrays. Section 3 describes the complex-valued Jacobi iterative algorithm. Section 4 presents the hardware architecture design. Section 5 discusses the experimental results, and Section 6 concludes the paper.

2. Signal Models

Nested arrays are a class of sparse linear arrays that achieve enhanced degrees of freedom (DoFs) and aperture extension through non-uniform sensor placement. A typical nested array consists of two uniform linear sub-arrays, as shown in Figure 1, the first contains $N_1$ sensors with spacing d, and the second contains $N_2$ sensors with spacing $(N_1+1)d$. The total number of physical sensors is $N_s=N_1+N_2$. This configuration generates a difference co-array that is fully filled over the range $[-M,M]$, enabling the synthesis of a virtual uniform linear array with significantly larger aperture than the physical array.

To apply the MUSIC algorithm, the array collects T snapshots of received data. Let $X\left(t\right)$$\in {\mathbb{C}}^{N_s\times 1}$ denote the received signal vector at snapshot t. The array output is modeled as

$$X\left(t\right)=A\left(\theta \right)S\left(t\right)+G\left(t\right)$$

(1)

where $X\left(t\right)={[x_1\left(t\right),x_2\left(t\right),\dots ,x_N\left(t\right)]}^T$ is the data received by the array, T stands for transpose, $x_n\left(t\right)$ represents the data received by the n-th array element, and t is the number of times the signal is sampled, also known as snapshot. $A\left(\theta \right)=\left[a\left({\theta }_1\right),a\left({\theta }_2\right),\dots ,a\left({\theta }_M\right)\right]$ is the array manifold matrix, and $a\left({\theta }_M\right)={\left[1,e^{-j{\displaystyle \frac{2\pi d}{\lambda }}\sin {\theta }_M},\dots ,e^{-j{\displaystyle \frac{2\pi d}{\lambda }}(M-1)\sin {\theta }_M}\right]}^T$ represents the M-th steering vector, which is related to the array geometry, where d is the spacing between adjacent array elements, and $\lambda$ is the signal wavelength. $S\left(t\right)={\left[s_1\left(t\right),s_2\left(t\right),\dots ,s_M\left(t\right)\right]}^T$ is the incident signal vector, and $G\left(t\right)={\left[g_1\left(t\right),g_2\left(t\right),\dots ,g_N\left(t\right)\right]}^T$ is the additive Gaussian white noise matrix.

The sample covariance matrix is computed as

$$R_{xx}={\displaystyle \frac{1}{T}}{\displaystyle \sum _{t=1}^T}x\left(t\right)x^H\left(t\right)$$

(2)

To exploit the structure of the nested array, we vectorize $R_{xx}$:

$$\mathrm{z}=\mathrm{vec}\left(R_{xx}\right)$$

(3)

which yields an $N_s^2\times 1$ vector. The elements of z correspond to spatial correlations at all possible lags and virtual sensor positions in the difference co-array. Since multiple entries in z may map to the same virtual position, redundant components are removed, and the remaining elements are sorted according to their virtual indices to form a new vector $z_1$. From $z_1$, a virtual-domain covariance matrix $R_{ss}$ is reconstructed by averaging overlapping estimates across the contiguous virtual array segment $[-M,M]$:

$$R_{ss}={\displaystyle \frac{1}{M^{\prime }+1}}{\displaystyle \sum _{i=1}^{M^{\prime }+1}}{R}_i$$

(4)

Finally, eigenvalue decomposition is performed on $R_{ss}$ to separate the signal and noise subspaces. The DOA of the sources are estimated by searching for peaks in the MUSIC pseudo-spectrum:

$$P_{\mathrm{MUSIC}}\left(\theta \right)={\displaystyle \frac{1}{a^H\left(\theta \right)U_n{U}_n^{H}a\left(\theta \right)}}$$

(5)

where $a\left(\theta \right)$ is the steering vector of the virtual uniform array, and $U_n$ spans the noise subspace. This approach leverages the extended aperture and increased DoFs of the nested array to achieve high-resolution DOA estimation with fewer physical sensors.

3. Parallel Complex Jacobi EVD Algorithm

In subspace-based DOA estimation methods such as MUSIC, the key step is to perform eigenvalue decomposition (EVD) on the covariance matrix of received signals, enabling separation between the signal and noise subspaces. However, conventional EVD algorithms (e.g., QR decomposition) suffer from high computational complexity and are difficult to implement efficiently in real-time systems. To address this challenge, a parallel complex Jacobi algorithm is adopted for EVD computation. The fundamental idea of the Jacobi method is to eliminate a pair of non-zero off-diagonal elements via an orthogonal transformation, thereby reducing the sum of squares of the off-diagonal entries. By iteratively repeating this process, the matrix gradually converges to a diagonal form, yielding all eigenvalues and eigenvectors. This algorithm exhibits excellent numerical stability and high parallelism, making it well-suited for hardware-implementable real-time signal processing applications. This section presents a parallel complex Jacobi algorithm that achieves efficient EVD of complex covariance matrices through careful selection of rotation planes and iteration strategies.

For an n-dimensional real symmetric matrix A, its eigenvalue decomposition can be expressed as the product of three matrices: $A=U\Lambda U^T$. U is an orthogonal matrix and $\Lambda$ is a diagonal matrix containing the eigenvalues of matrix A.

The Jacobi method approximates the eigenvalue decomposition through the iterative process given by Equation (6).

$$A_{k+1}=U_k{A}_k{U}_k^T,k=0,1,2,\dots$$

(6)

where $U_k$ is a standard orthogonal plane rotation matrix that rotates by an angle within the $(i,j)$ plane. The sequence of plane rotations $U_k$ can be executed in different orders to obtain the eigenvalues. The most commonly used order is referred to as the row-wise cyclic order. For an n-dimensional matrix, there are $C_n^2$ possible choices:

$$(i,j)=(1,2),(1,3),\dots ,(1,n),(2,3),\dots ,(2,n),\dots ,(n-1,n)$$

(7)

To facilitate the efficient development of the Two-Pass Rotation (TPR) method for computing bilateral rotations, we first examine the commutativity properties of two special types of 2 × 2 matrices: rotation matrices and reflection matrices.

$$\begin{array}{cc}\hfill {\epsilon }^{rot}& =\left\{\left(\begin{array}{cc}x& y\\ -y& x\end{array}\right){\displaystyle |}x,y\in R\right\}\hfill \end{array}$$

(8)

$$\begin{array}{cc}\hfill {\epsilon }^{ref}& =\left\{\left(\begin{array}{cc}x& y\\ y& -x\end{array}\right)|x,y\in R\right\}\hfill \end{array}$$

(9)

As given by Equations (8) and (9), the former is referred to as the rotation type, as it shares an identical matrix structure with the $2\times 2$ plane rotation matrix. The latter is termed the reflection type, owing to its structural equivalence to the $2\times 2$ Givens reflection matrix. Based on these two matrix structures, the following theorem can be derived:

Theorem 1.

If $A_1\in {\mathcal{E}}^{nd}$ and $A_2\in {\mathcal{E}}^{nd}$, then $A_1{A}_2=A_2{A}_1$, and $A_1{A}_2\in {\mathcal{E}}^{nd}$.

Theorem 2.

If $A_1\in {\mathcal{E}}^{nf}$ and $A_2\in {\mathcal{E}}^{nf}$, then $A_1{A}_2=A_2^T{A}_1$, and $A_1{A}_2\in {\mathcal{E}}^{nf}$.

Theorem 3.

Specifically, considering two plane rotations denoted as $R\left({\theta }_1\right)$ and $R\left({\theta }_2\right)$ defined by:

$$R\left({\theta }_1\right)R\left({\theta }_2\right)=R({\theta }_2+{\theta }_1)$$

(10)

$$R{\left({\theta }_1\right)}^{\mathrm{T}}R\left({\theta }_2\right)=R({\theta }_2-{\theta }_1)$$

(11)

We define a $2\times 2$ matrix $A=\left(\begin{array}{cc}{a}_{11}& a_{12}\\ a_{21}& a_{22}\end{array}\right)$. Algorithm 1 describes the Jacobi algorithm for eigenvalue decomposition of a Hermitian matrix.

Algorithm 1: Complex Jacobi Algorithm with Rotation Parameters

Input: $A=\left(a_{ij}\right)\in {\mathbb{C}}^{n\times n}$ Output: $\mathsf{\Lambda },V$ 1: $V\leftarrow I_n,R\leftarrow A$ 2: while $\mathrm{off}\left(R\right)>\epsilon$ do 3:     $(i,j)\leftarrow \arg \max |r_{pq}|$ 4:     $\alpha \leftarrow \mathrm{Re}\left(r_{ij}\right), \beta \leftarrow \mathrm{Im}\left(r_{ij}\right)$ 5:     $c_1\leftarrow \sqrt{{\displaystyle \frac{{\alpha }^2}{{\alpha }^2+{\beta }^2}}},c_2\leftarrow j\sqrt{{\displaystyle \frac{{\beta }^2}{{\alpha }^2+{\beta }^2}}}$ 6:     $\theta \leftarrow {\displaystyle \frac{1}{2}}{\tan }^{-1}\left({\displaystyle \frac{2|r_{ij}|}{r_{ii}-r_{jj}}}\right)$ 7:     $R^{\prime }\left(\theta \right)\leftarrow \left(\begin{array}{cc}\cos \theta & \sin \theta (c_1+c_2)\\ -\sin \theta (c_1-c_2)& \cos \theta \end{array}\right)$ 8:     $R\leftarrow {\left(R^{\prime }\right)}^{H}R\left(R^{\prime }\right)$ 9:     $V\leftarrow V\left(R^{\prime }\right)$ 10: end while 11: $\mathsf{\Lambda }\leftarrow \mathrm{diag}\left(R\right)$ 12: return $\mathsf{\Lambda },V$

Based on the aforementioned theorem, we can derive the following formula: if a 2 × 2 matrix A and a rotation angle are known, the double-sided rotation can be achieved through two planar rotations, ten additions, and four scaling operations. This approach yields the same result as the CORDIC computation, while the calculation process is simpler and more efficient. To facilitate the subsequent rotation operations, the matrix A can be decomposed into the sum of two structured submatrices, as shown below:

$$\begin{array}{cc}\hfill A& =A_1+A_2=\left(\begin{array}{cc}{U}_1& -V_1\\ V_1& U_1\end{array}\right)+\left(\begin{array}{cc}-U_2& V_2\\ V_2& U_2\end{array}\right)\hfill \end{array}$$

(12)

$$\begin{array}{cc}\hfill B& =R^T\left({\theta }_1\right)AR\left({\theta }_2\right)\hfill \\ \hfill & =R^T\left({\theta }_1\right)A_{1}R\left({\theta }_2\right)+R^T\left({\theta }_1\right)A_{2}R\left({\theta }_2\right)\hfill \\ \hfill & =R^T\left({\theta }_1\right)R\left({\theta }_2\right)A_1+R^T\left({\theta }_1\right)R\left({\theta }_2\right)A_2\hfill \\ \hfill & =R({\theta }_1-{\theta }_2)A_1+R({\theta }_1+{\theta }_2)A_2\hfill \\ \hfill & =R\left(0\right)\left(\begin{array}{cc}{U}_1& -V_1\\ V_1& U_1\end{array}\right)+R\left(2\theta \right)\left(\begin{array}{cc}-U_2& V_2\\ V_2& U_2\end{array}\right)\hfill \\ \hfill & =\left(\begin{array}{cc}{P}_1& -Q_1\\ Q_1& P_1\end{array}\right)+\left(\begin{array}{cc}-P_2& Q_2\\ Q_2& P_2\end{array}\right)\hfill \end{array}$$

(13)

4. Hardware Implementation of the Proposed Design

As illustrated in the overall hardware design framework shown in Figure 2, the proposed hardware acceleration architecture implements a complete DOA estimation pipeline from input signals to output angles. The system is primarily composed of three core modules cascaded in sequence: the Covariance Matrix Computation Module extracts real-time statistical features from the input signals; the Eigenvalue Decomposition Module, based on an improved complex-domain bilateral Jacobi algorithm, achieves high-precision separation of the signal and noise subspaces; and the Spectral Peak Search Module adopts a three-stage coarse-to-fine search strategy to significantly enhance search efficiency while ensuring accuracy. The architecture employs deep pipelining and parallel computing design, with efficient data interfaces and synchronization mechanisms tightly coupling the modules. Ultimately, it outputs high-precision direction-of-arrival estimation results, providing a comprehensive hardware solution for real-time spatial spectrum estimation.

The hardware architecture processes 16-bit fixed-point inputs with 10 fractional bits and outputs source angles at a resolution of $0.01°$. Fixed-point arithmetic employing 10 fractional bits is used throughout the covariance matrix computation and Jacobi eigenvalue decomposition. To enhance angular accuracy, the pseudo-spectrum values in the three-stage spectral peak search retain 20 fractional bits.

4.1. Calculation of the Covariance Matrix

As established previously, the covariance matrix is governed by the summation of outer products defined as $\widehat{R}={\sum }_{t=1}^{T}x\left(t\right)x^H\left(t\right)$. Due to the Hermitian symmetry of $\widehat{R}$, only the lower triangular elements require computation.

In practical scenarios, the number of snapshots T can be substantial, even reaching 1024. In traditional architectures, this process becomes heavily memory-bound due to repetitive loading of snapshot data. To address this, we propose a customized triangular systolic array architecture, as illustrated in Figure 3. The architecture incorporates green delay chain units to facilitate internal delay skewing, blue PE units for complex multiply-accumulate operations, and yellow PE units specifically dedicated to conjugate complex multiply-accumulate operations on the diagonal. The triangular structure is motivated by the Hermitian symmetry of the covariance matrix, which implies that only the lower triangular part needs to be computed. This design is intrinsically suited to the outer-product accumulation pattern. It allows the snapshot stream to flow through the array, where data is efficiently reused to ensure the high-throughput processing.

Regarding data input and timing alignment, the design adopts a strategy of simultaneous external injection with internal delay skewing to minimize the complexity of the external interface. Data vectors corresponding to the same snapshot index are allowed to enter simultaneously through the top and left ports of the array, eliminating the need for external data pre-skewing. The array integrates cascaded delay chains, ensuring that input data is automatically aligned as it propagates through the network, thereby satisfying the timing constraints required for systolic computation. In terms of the internal dataflow strategy, the array employs an Output Stationary mechanism. Each Processing Element is mapped to a specific element within the matrix. As the snapshot data stream propagates through the array, intermediate accumulation results remain resident in the internal registers of the units. This approach obviates the need for repetitive read and write operations of partial sums between the array and the memory, thereby reducing power consumption and bandwidth utilization.

The hardware structure of the Processing Element is illustrated in Figure 4. The PE is structured as a two-stage pipelined architecture, comprising a complex multiplication unit followed by an accumulation module. In the first stage, the real and imaginary components of two input signals are multiplied separately using real multipliers: $R\left(x_i\left(t\right)\right)·R\left(x_j\left(t\right)\right)$ and $I\left(x_i\left(t\right)\right)·I(x_j\left(t\right))$ for the real part, $R\left(x_i\left(t\right)\right)·I(x_j\left(t\right))$ and $I\left(x_i\left(t\right)\right)·R(x_j\left(t\right))$ for the imaginary part. These products are then combined to form the full complex product. The second stage performs the accumulation of intermediate results, with a register-based feedback loop enabling cumulative accumulation over multiple snapshots.

It is crucial to note that the PEs on the diagonal of the systolic array do not require this complete hardware structure. Instead, they utilize only half of the arithmetic logic, specifically the upper datapath shown in Figure 4. For diagonal elements ${\widehat{R}}_{i,i}$, the computation requires multiplying the signal sample $x_i\left(t\right)$ by its conjugate $x_i^{*}\left(t\right)$. Since these operands possess identical real parts and opposite imaginary parts, the standard complex multiplication simplifies to a squared magnitude calculation:

$${\widehat{R}}_{i,i}={\displaystyle \sum _{t=1}^T}{x}_i\left(t\right)x_i^{*}\left(t\right)={\displaystyle \sum _{t=1}^T}\left[R{\left(x_i\left(t\right)\right)}^2+I{\left(x_i\left(t\right)\right)}^2\right]$$

(14)

4.2. The Hardware Structure of the Complex Jacobi Algorithm

The complex-domain Jacobi decomposition flow of this design is shown in Figure 5.

4.2.1. Locating the Maximum Off-Diagonal Element

Given that the input matrix is Hermitian and exhibits conjugate symmetry, identifying the maximum off-diagonal element requires traversing only the upper triangular segment of the matrix, specifically the 28 off-diagonal elements.

4.2.2. Calculation of sin and cos

In [40], it is necessary to use a CORDIC module to solve the arctangent function to compute the angle and then derive $\sin \theta$ and $\cos \theta$. In [41], the calculation is based on the formula $\tan 2\theta ={\displaystyle \frac{2|r_{i,j}|}{r_{i,i}-r_{j,j}}}$ to compute $\tan 2\theta$, from which $\sin 2\theta$ and $\cos 2\theta$ can be obtained. Subsequently, $\sin \theta$ and $\cos \theta$ are calculated using trigonometric identities derived from $\sin 2\theta$ and $\cos 2\theta$; compared to the method in [41], our design introduces a key simplification. The method in [41] uses one-sided Jacobi rotation and relies on CORDIC modules to compute trigonometric functions for the rotation angles. In contrast, our design further omits the step of computing $\cos \theta$ and $\sin \theta$. This not only reduces computational steps but also fundamentally minimizes the potential for error accumulation. As a result, our design achieves a balance between high precision and high efficiency at the algorithmic level, providing a more reliable numerical foundation for subsequent processing.

In the bilateral Jacobi eigenvalue method adopted in this paper, by setting ${\theta }_1=0$ and ${\theta }_2=2\theta$, there is no need to separately compute $\cos \theta$ and $\sin \theta$; instead, $\sin 2\theta$ and $\cos 2\theta$ can be directly solved. Compared to existing methods, this design achieves significant simplification while maintaining high accuracy; compared to the method in [40], it avoids the approximation errors introduced by the CORDIC module, utilizing only precise multiplication, division, and square root operations in the real domain, resulting in superior numerical stability.

$$\begin{array}{cc}\hfill \left|sin2\theta \right|& ={\displaystyle \frac{2|r_{i,j}|}{\sqrt{{\left(2|r_{i,j}|\right)}^2+{\left(r_{i,i}-r_{j,j}\right)}^2}}}\hfill \end{array}$$

(15)

$$\begin{array}{cc}\hfill \left|cos2\theta \right|& ={\displaystyle \frac{2|r_{i,i}-r_{j,j}|}{\sqrt{{\left(2|r_{i,j}|\right)}^2+{\left(r_{i,i}-r_{j,j}\right)}^2}}}\hfill \end{array}$$

(16)

Based on Equations (15) and (16), $\sin 2\theta$ and $\cos 2\theta$ can be calculated. Since we extract a $2\times 2$ matrix sub-block from the Hermitian matrix, where $r_{i,i}$, $r_{j,j}$, and $r_{i,j}$ are the elements at the corresponding positions in the sub-block, $r_{i,i}$, $r_{j,j}$, and $r_{i,j}$ may all be complex numbers. The value of $2\theta$ lies within the interval $\left[-{\displaystyle \frac{\pi }{2}},{\displaystyle \frac{\pi }{2}}\right]$, so $\left|\cos 2\theta \right|=\cos 2\theta$, and the sign of $\sin 2\theta$ is determined by the magnitudes of $r_{i,i}$ and $r_{j,j}$: when $r_{i,i}>r_{j,j}$, $\left|\sin 2\theta \right|=\sin 2\theta$; when $r_{i,i}<r_{j,j}$, $\left|\sin 2\theta \right|=-\sin 2\theta$.

The hardware structure is illustrated in Figure 6. First, the sum of the squares of the real and imaginary parts of $r_{i,j}$ is calculated, and the square root is taken to obtain $|r_{i,j}|$. The value $2|r_{i,j}|$ is derived through a shift operation, and $2|r_{i,j}{|}^2$ is obtained using a multiplier. Simultaneously, for the inputs $r_{i,i}$ and $r_{j,j}$, $r_{i,i}-r_{j,j}$ is computed, and shift and square operations are performed to obtain $2|r_{i,i}-r_{j,j}|$ and $|r_{i,i}-r_{j,j}{|}^2$. A multiplexer is used to determine the sign of $\sin 2\theta$ based on the magnitude comparison between $r_{i,i}$ and $r_{j,j}$.

Subsequently, $\left(2\right|r_{i,j}{\left|\right)}^2$ and ${(r_{i,i}-r_{j,j})}^2$ are summed, and the square root is taken to obtain $\sqrt{\left(2\right|r_{i,j}{\left|\right)}^2+{(r_{i,i}-r_{j,j})}^2}$. Two dividers are then used to calculate $\sin 2\theta$ and $\cos 2\theta$.

4.2.3. Construction of the Rotation Matrix

To construct the rotation matrix, in addition to the values of $\sin \theta$ and $\cos \theta$, we also need to calculate the values of $c_1$ and $c_2$. Since their calculation methods are similar, we only need to design one module to compute their values. The values of $c_1$ and $c_2$ are computed in parallel based on different inputs.

By squaring the input values $\alpha$ and $\beta$, and then summing the results, $c_1$ and $c_2$ can be obtained using a divider and a square root operation. The hardware structure is shown in Figure 7.

Once $c_1$ and $c_2$, $\sin 2\theta$ and $\cos 2\theta$ are obtained, the rotation matrix can be constructed.

4.2.4. Rotation

The rotation part is the core of the complex Jacobi-EVD section in our design. In total, it requires two complex adders and one complex multiplier. Figure 8 briefly illustrates the pipeline process of the matrix rotation part.

First, based on $U_2={\displaystyle \frac{1}{2}}(a_{22}-a_{11})$ and $V_2={\displaystyle \frac{1}{2}}(a_{21}+a_{12})$, the values $a_{11},a_{12},a_{21},a_{22}$ are input into the complex adder to compute $U_2$ and $V_2$. Similarly, in the second cycle, $U_1$ and $V_1$ are computed. Since ${\theta }_1=0$, $\cos {\theta }_1=1$ and $\sin {\theta }_1=0$, it follows that $P_1=U_1,Q_1=V_1$. Thus, $P_1$ and $Q_1$ are obtained directly. In cycles 3 to 6, the results $U_2$ and $V_2$ are sequentially fed into the complex multiplier to perform complex multiplication with the corresponding parts of the rotation matrix. The complex multiplication requires 34 cycles to complete. After the complex multiplication is finished, $P_2$ and $Q_2$ are obtained. According to the formulas $b_{11}=P_1-P_2$, $b_{12}=Q_2-Q_1$, $b_{21}=Q_1+Q_2$, and $b_{22}=P_1+P_2$, first $P_1$ and $P_2$ are input into two complex adders to compute $b_{11}$ and $b_{22}$. Then, $Q_1$ and $Q_2$ are input into two complex adders to compute $b_{12}$ and $b_{21}$. Once this is done, matrix B is obtained, completing the matrix rotation. In this design module, a time-division multiplexing approach is adopted, meaning only two complex adders and one complex multiplier are required. This significantly reduces resource consumption while ensuring precision.

4.2.5. Determination of Iteration Completion

In the complex-domain Jacobi eigenvalue decomposition algorithm, the iteration termination condition is typically determined through two approaches: one is to set a fixed number of iterations, and the other is to evaluate whether the maximum absolute value of the off-diagonal elements falls below a predefined threshold. The former ensures a constant computational latency, making it suitable for scenarios with strict real-time requirements; the latter, however, more effectively guarantees decomposition accuracy. To ensure sufficient numerical precision, this paper adopts the second strategy as the iteration termination criterion.

Specifically, the hardware acceleration architecture proposed in this paper targets $8\times 8$ Hermitian matrices, while its structure also allows for extension to Hermitian matrices of arbitrary order. The overall circuit comprises three core computational units: the maximum off-diagonal element search unit, the covariance calculation unit, and the complex Jacobi rotation unit. The logic for determining iteration completion is ingeniously integrated into the maximum off-diagonal element search unit—that is, after locating the current maximum off-diagonal element in each iteration, it is directly compared with the predefined threshold. If the value is smaller than the threshold, the iteration is deemed convergent. This design effectively reuses the existing search logic, avoiding the need for additional comparison circuits and thereby reducing overall hardware resource consumption. The specific value of the threshold must be comprehensively determined based on system precision requirements and numerical stability considerations.

4.3. Three-Stage Spectral Peak Search

Prior to the spectral peak search step, it is necessary to partition the signal subspace and noise subspace based on the eigenvalues of the covariance matrix. The specific method involves pairwise comparison of all eigenvalues to determine their relative order of magnitude. Initially, each eigenvalue is assigned a sorting variable with an initial value of 1, stored in Random Access Memory (RAM). Subsequently, each eigenvalue is sequentially compared with the others. Whenever an eigenvalue is smaller than another, its corresponding sorting variable is incremented by 1. After all comparisons are completed, the eigenvectors corresponding to eigenvalues whose sorting variables exceed the number of signal sources M are classified as belonging to the noise subspace and stored in a dedicated RAM for the noise subspace.

For example, we assume the number of signal sources M = 2 and the four eigenvalues of the covariance matrix are 120, 150, 2, and 80. After comparison, the sorting results for the eigenvalues are 3, 4, 1, and 2, respectively. Therefore, the eigenvectors corresponding to eigenvalues with sorting values greater than 2, specifically eigenvalues 120 and 150, will be stored in the noise subspace RAM.

Spectral peak search requires the computation of the pseudo-spectrum function, which necessitates knowledge of the steering vector.

$$A\left(\theta \right)=e^{-j\pi \mu sin\left(\phi \right)}$$

(17)

Its value is dependent on the array arrangement $\mu$ and the scanning angle $\varphi$. For given values of $\mu$ and $\varphi$, the value of $A\left(\theta \right)$ remains constant. The computation involves exponential solutions and trigonometric functions, which require substantial computational effort and incur significant latency. Therefore, all $A\left(\theta \right)$ values used in this paper will be pre-stored in ROM and read out when needed. This approach accelerates computation speed and reduces the computational load. The corresponding hardware structure is illustrated in Figure 9.

To accomplish DOA estimation, it is also necessary to locate the positions of the spectral nulls. The search procedure is as follows:

1.

Compute the pseudo-spectrum function at $1°$ intervals and search for nulls. When a null is detected, pause the $1°$-precision search and set the initial search angle for the second stage to the null angle value minus $1°$.

2.

Begin computing the pseudo-spectrum function with a step size of $0.1°$ and search for nulls. After the search is completed, set the initial search angle for the third stage to the null angle value minus $0.1°$.

3.

Start computing the pseudo-spectrum function with a step size of $0.01°$ and search for nulls. Upon completion, output the three search results simultaneously.

4.

Determine whether the number of detected angle values equals the number of signal sources. If so, the DOA estimation is complete and the system returns to the initial state. Otherwise, continue searching for the next null. The final source angle value can be calculated as:

$${\theta }_{source}={\theta }_{first}\times 1°+{\theta }_{second}\times 0.1°+{\theta }_{third}\times 0.01°$$

(18)

where ${\theta }_{\mathrm{first}}$, ${\theta }_{\mathrm{second}}$, and ${\theta }_{\mathrm{third}}$ represent the angular search results from the first, second, and third stages, respectively.

5. Results and Analysis

Having presented the proposed hardware architecture and its algorithmic foundations, we now turn to empirical validation through comprehensive performance evaluation. This section evaluates the DOA estimation module in terms of its practical hardware performance. The assessment focuses on three key aspects: estimation accuracy, computational speed, and hardware resource utilization. By comparing the design with existing hardware implementations and a pre-optimized version of the adaptive algorithm, this work systematically validates the trade-off between performance and efficiency achieved by the proposed approach.

5.1. DOA Estimation Accuracy Analysis

Precision is a key performance metric in the hardware implementation of MUSIC algorithm. Especially under far-field conditions, small angular errors may result in noticeable deviations in the estimated target direction. As shown in

Table 1. DOA estimation results: Comparison between the proposed hardware implementation and MATLAB(R2024b).

Input (°)	Hardware		MATLAB(R2024b)
	Output (°)	Error (°)	Output (°)	Error (°)
−80	−79.82	0.18	−79.87	0.13
−60	−59.88	0.12	−59.93	0.07
−40	−40.05	0.05	−40.08	0.08
−20	−20.02	0.02	−20.04	0.04
−10	−9.98	0.02	−9.98	0.02
0	0.02	0.02	0.02	0.02
10	10.02	0.02	10.03	0.03
20	20.03	0.03	20.05	0.05
40	40.05	0.05	40.12	0.12
60	59.84	0.16	59.84	0.16
80	79.80	0.20	79.81	0.19

, the proposed hardware design achieves accurate estimation of the Direction of Arrival (DOA) source angles.

With an 8-channel input configuration and a signal incident angle of $30°$, we conducted 200 Monte Carlo simulations; the comparative results against references in [42,43,44] are presented in Figure 10 and Figure 11.

As shown in Figure 10, the proposed hardware-accelerated MUSIC algorithm achieves lower RMSE in DOA estimation than the methods in [24,42,43] across all SNR levels. The RMSE of all methods decreases as SNR increases from 5 dB to 30 dB. However, the proposed method shows a faster error reduction and consistently yields the lowest RMSE. At 5 dB, its RMSE is about 0.28 degrees. At 30 dB, it further drops to approximately 0.05 degrees. The other methods improve more slowly and tend to saturate at high SNR. These results indicate that the proposed method provides high estimation accuracy even at low SNR and strong convergence at high SNR. Therefore, it is well suited for real-time signal processing applications that demand high precision.

As shown in Figure 11, the proposed hardware-accelerated MUSIC algorithm achieves lower RMSE in DOA estimation across different snapshot counts compared with [24,42,43]. As snapshots increase from 50 to 300, the RMSE decreases for all methods. The proposed method shows a steeper reduction and maintains the smallest error throughout: with 100 snapshots, its RMSE is about 0.39; at 300 snapshots, it further drops to approximately 0.24. Following the observed trend, the RMSE of the proposed method is projected to decrease below 0.15 at 1000 snapshots. These results indicate that the proposed design offers improved estimation accuracy and stable convergence under larger data volumes, supporting its use in applications requiring both precision and real-time processing.

The aforementioned experimental results fully verify the superiority of the proposed hardware architecture in terms of DOA estimation accuracy. However, the achievement of high precision is often accompanied by an increase in computational complexity, which may become a performance bottleneck in real-time signal processing systems. To comprehensively evaluate the practicality of the algorithm, it is necessary to further analyze its performance in terms of convergence efficiency and computational cost. Therefore, Figure 12 presents a comparison of convergence characteristics between the proposed algorithm and the traditional Jacobi method, while Figure 13 illustrates the comparison of computational complexity. This is to verify whether the proposed method possesses superior computational efficiency while maintaining estimation accuracy. Furthermore, Figure 14 demonstrates the root mean square error (RMSE) performance in the presence of position errors and non-uniform noise, thereby providing a more comprehensive evaluation of the robustness and practical engineering applicability of the proposed architecture under non-ideal conditions.

Figure 12 illustrates the convergence trajectory of the off-diagonal Frobenius norm as a function of the number of iteration sweeps when the matrix dimension is $N=8$. The vertical axis employs a logarithmic scale to intuitively present the dynamic decay process of the residual from the order of ${10}^0$ to ${10}^{-15}$. Simulation results demonstrate that the algorithm possesses significant convergence characteristics. In the initial phase of iteration (the first 5 sweeps), the off-diagonal energy exhibits an exponential decay, indicating that the matrix rapidly tends towards diagonalization. After the number of iterations exceeds 5, the residual curve enters a convergence plateau, stabilizing around $1.20\times {10}^{-15}$. This steady-state error approaches the machine precision limit of double-precision floating-point arithmetic (${ϵ}_{\mathrm{mach}}\approx 2.22\times {10}^{-16}$), indicating that the off-diagonal elements have been effectively eliminated to the level of numerical noise, and the algorithm has achieved the theoretically optimal convergence accuracy.

Figure 13 illustrates the comparison of computational complexity between the proposed algorithm and the traditional Jacobi algorithm. The vertical axis represents the normalized relative computational load (primarily counting floating-point operations). As the matrix dimension N increases, the computational load of both algorithms exhibits a growth trend of $O\left(N^3\right)$. However, the optimized algorithm proposed in this paper consistently remains below the traditional algorithm, and the gap between them gradually widens as the dimension increases. At $N=60$, the relative computational load of the proposed algorithm is significantly lower than that of the traditional method, indicating that the optimization strategy effectively reduces redundant calculations in high-dimensional matrix operations and possesses higher computational efficiency.

Figure 14 illustrates the root mean square error (RMSE) performance of the algorithm under non-ideal conditions. It can be clearly observed that the four curves do not show significant separation. Under harsh conditions with element position errors, element failures and non-uniform noise environments, the estimation accuracy of the algorithm does not deviate excessively from the performance benchmark of the ideal array. This indicates that the algorithm is highly insensitive to hardware calibration errors and perturbations of the noise covariance matrix, and can maintain robust estimation performance comparable to ideal conditions in complex non-ideal environments.

5.2. DOA Estimation Speed Analysis

The DOA estimation hardware system proposed in this paper adopts a heterogeneous dual-clock-domain architecture combined with deep pipeline scheduling. This design enhances real-time performance while maintaining high estimation accuracy. The front-end data acquisition interface operates at 153 $\mathrm{M}$$\mathrm{Hz}$, whereas the core computational modules run at 250 $\mathrm{M}$$\mathrm{Hz}$. The two clock domains are synchronized using asynchronous FIFO, introducing a cross-domain transmission latency of only 0.3 μs.

Under an 8-channel input configuration, the processing time for each stage of the DOA estimation pipeline is as follows: covariance matrix computation takes $7.47$ $\mathsf{\mu }$$\mathrm{s}$, eigenvalue decomposition requires 46 $\mathsf{\mu }$$\mathrm{s}$, and spectral peak search lasts $22.7$ $\mathsf{\mu }$$\mathrm{s}$. The total DOA estimation latency sums to $76.17$ $\mathsf{\mu }$$\mathrm{s}$ (Figure 15).

As shown in

Table 2. Speed of DOA estimation in different hardware implementations.

Implementation	Array Size	Matrix Type	DOA Time	Complex Domain	Full EVD
This work	8	Hermite	76.17 µs	Yes	Yes
Yan [17]	8	Real Symmetric	93.4 µs	No	Yes
Chen [37]	8	Real Symmetric	25.5 µs	No	No
Huang [38]	8	Real Symmetric	1 ms	No	Yes
Li [41]	8	Hermite	101.8 µs	Yes	Yes
Xie [44]	16	Real/Complex	0.19–0.45 s	Partial	Yes

, ref. [17] reported a DOA estimation time of $93.4$ $\mathsf{\mu }$$\mathrm{s}$. The proposed architecture reduces this latency by approximately 18% and simultaneously improves estimation accuracy. Although its approach employs real-domain transformation and a CORDIC-based Jacobi approximation to achieve a reasonable resource-performance balance on resource-constrained platforms, its angular error of 0.6° may be inadequate for high-precision positioning applications.

The proposed DOA estimation hardware uses a dual-clock-domain pipeline architecture. The front-end runs at 153 $\mathrm{M}$$\mathrm{Hz}$ and the core at 250 $\mathrm{M}$$\mathrm{Hz}$, with only $0.3$ $\mathsf{\mu }$$\mathrm{s}$ cross-domain latency via asynchronous FIFOs.

For 8-channel input, total latency is $76.17$ $\mathsf{\mu }$$\mathrm{s}$, including covariance computation ( $7.47$ $\mathsf{\mu }$$\mathrm{s}$), eigenvalue decomposition (EVD, 46 $\mathsf{\mu }$$\mathrm{s}$), matrix inversion ( $36.25$ $\mathsf{\mu }$$\mathrm{s}$), steering vector retrieval ( $8.8$ $\mathsf{\mu }$$\mathrm{s}$), and spectral search ( $22.7$ $\mathsf{\mu }$$\mathrm{s}$).

Unlike [37], which skips EVD for $25.5$ $\mathsf{\mu }$$\mathrm{s}$ latency but lacks robustness and complex-domain support, our design retains full EVD and handles Hermitian matrices. Compared to [38] ( 1 $\mathrm{m}$$\mathrm{s}$), we achieve similar 0.1° accuracy with 13× speedup. Under the same setup as [41] ( $101.8$ $\mathsf{\mu }$$\mathrm{s}$), we cut latency by 25% with higher throughput. In contrast to the multi-chip system in [44] (two FPGA), our single-FPGA implementation is more suitable for embedded deployment.

To provide a comprehensive and practical assessment of the real-time throughput capability of our FPGA-based radar signal processing architecture, we introduce a hardware-centric performance metric termed ADPPS (Amount of Data Processed Per Second), formally defined as $\mathrm{ADPPS}=\left(\mathrm{1,000,000}/\mathrm{ATM}\right)\times \mathrm{snapshot}$, where ATM (Actual Time at Maximum Clock) is the measured end-to-end latency for one complete processing cycle, and snapshot denotes the number of samples processed per cycle. Based on the measured ATM of 76.17 µs with $\mathrm{snapshot}=128$, this yields an ADPPS of approximately $\mathrm{1,680,452}$ groups per second. Furthermore, the corresponding frame rate, defined as the number of complete data frames processed per second, is Frame Rate = 1,000,000/ATM ≈ 13,128 frames per second. Experimental results confirm that under sustained full-load operation, the end-to-end latency remains stable below 76.17 µs, with no pipeline stalls or data overflows, validating the high-throughput and real-time processing capability of the proposed architecture.

In addition to throughput and latency, power efficiency is a critical metric for hardware accelerators, alongside throughput and latency. Our estimation using the Vivado Power Analyzer indicates a total on-chip power consumption of approximately 3.236 W. This low power profile highlights the superior energy efficiency of the proposed accelerator for real-time DOA estimation tasks.

In summary, the proposed architecture demonstrates competitive performance in terms of processing speed, while maintaining high estimation accuracy and full algorithmic functionality.

5.3. Hardware Resources Analysis

The proposed architecture achieves high hardware efficiency on the Xilinx Virtex-6 FPGA through key optimizations. First, the complex Jacobi rotation module reuses arithmetic units: only four adders and one complex multiplier are used, reducing adder and multiplier counts by 75% and 87.5% compared to a fully pipelined design (Figure 16).

Second, steering vectors $A\left(\theta \right)$ are pre-stored in ROM, replacing real-time trigonometric computations with memory lookups. Matrix data are stored in dual-port BRAM; for an 8-element array, only 8 BRAM blocks (1.8% of total) are needed. The iteration termination condition is merged into the off-diagonal search unit, eliminating extra comparison logic and easing timing constraints.

The full DOA module uses 10,775 LUTs, 11,693 FF, 8 BRAM, and 73 DSP. As shown in

Table 3. Hardware resource consumption of DOA estimation in different hardware implementations.

Implementation	Platform	LUTs	FF	DSP	BRAM
This work	Virtex-6	10,775	11,693	73	8
Yan [17]	Virtex-6	54,100	92,200	64	-
Chen [37]	Virtex-6	48,060	30,216	96	512 KB
Huang [38]	Virtex-6	45,374	-	241	60
Li [41]	Virtex-6	28,305	-	-	-
Xie [44]	2×Altera EP3C120F780 + 2×TI C6713B	-	-	-	-

, it reduces LUTs by 80% and FF by 89% versus [17] (54,100 LUTs, 92,200 FF, 64 DSP), whose fully pipelined CORDIC consumes excessive registers.

Compared to [37] (48,060 LUTs, 30,216 FF, 96 DSP, 512 kB BRAM), our design cuts LUTs by 77.6%, FF by 67.9%, and DSP by 24%, using only 8 BRAM. It also uses 76% fewer LUTs, 70% fewer DSP, and 87% less BRAM than [38] (45,374 LUTs, 241 DSP, 60 BRAM).

Versus [41] (28,305 LUTs), LUT usage is reduced by 62%. Unlike the multi-chip system in [44] (two FPGA), which increases complexity and power, our implementation runs entirely on a single FPGA.

Overall, efficiency stems from arithmetic unit reuse, systolic-array-based covariance computation, and integrated control logic—enabling full complex Hermitian processing in a compact footprint suitable for resource-constrained embedded systems.

5.4. Comprehensive Performance Summary

The hardware architecture proposed in this work performs well in several aspects. These include algorithmic applicability, processing speed, estimation accuracy, and hardware resource efficiency. Compared with existing designs, it achieves microsecond-level latency. It also supports complex-domain signal processing and can scale to larger antenna arrays. This performance results from multiple optimizations. We improved the complex Jacobi algorithm. We reused computation units. We optimized memory access. We adopted a multi-clock-domain architecture. Although the proposed architecture achieves efficient processing for an 8-element array, significant challenges arise when scaling up to 32- or 64-element arrays. First, the dimension of the covariance matrix increases from $8\times 8$ to $32\times 32$, raising the computational complexity of the Jacobi EVD rotation operations from $O\left(N^2\right)$ to $O\left(N^4\right)$, and BRAM requirement may increase. Second, the size of the steering vector table in the spectrum search stage grows linearly with the virtual array aperture, potentially becoming a throughput bottleneck. To address these issues, future work will explore a partitioned Jacobi EVD architecture: the Hermitian covariance matrix will be divided into sub-blocks, processed in parallel using a pipelined dataflow. Additionally, we plan to introduce a dynamic precision control mechanism that reduces the EVD convergence threshold under high-SNR conditions, thereby balancing computational overhead and DOA estimation accuracy. Such optimizations are expected to support real-time processing of larger-scale arrays while maintaining microsecond-level latency.

6. Conclusions

This paper has presented a high-performance, FPGA-based hardware acceleration architecture for MUSIC algorithm-driven DOA estimation. The core of the design lies in three key contributions: first, a custom triangular systolic array optimized for the Hermitian covariance matrix calculation, employing output-stationary dataflow for efficient high-throughput processing; second, an improved complex-domain Jacobi EVD algorithm that replaces CORDIC-based approximations with direct analytical rotation operations, enhancing numerical stability and accuracy while simplifying the hardware datapath; third, a highly optimized hardware implementation that leverages computational unit reuse, integrated control logic, and memory-based pre-computation to minimize resource consumption.

Experimental results validate the effectiveness of the proposed design. The system achieves a DOA estimation accuracy with RMSE below $0.25°$ (300 snapshots), a total processing latency of 76.17 µs for complete DOA estimation, and efficient resource utilization. This performance profile—combining microsecond-level speed, high precision, and a compact footprint—demonstrates a balanced and practical design suitable for demanding real-time applications such as radar, wireless communications, and electronic warfare systems.

Future work will focus on extending the architecture’s scalability to handle larger array sizes and more signal sources, further exploring low-power design techniques for energy-constrained platforms, and integrating the processor within a complete system-on-chip (SoC) framework for seamless deployment in next-generation smart antenna and spatial signal processing systems.