An Isolated Resonant Voltage Balancing Charger of Series-Connected Lithium-Ion Batteries Based on Multi-Port Transformer

Abstract

The inconsistency of individual lithium-ion batteries causes the voltage imbalance of the batteries. An effective voltage-balancing circuit is essential to improve the inconsistency of series-connected batteries. This paper presents an isolated resonant voltage-balancing circuit for series-connected lithium-ion batteries based on a multi-port transformer. This circuit utilizes the multi-port transformer to enable free energy flow among the batteries. Without any direct transmission path between the capacitor and the battery string, it achieves full isolation between them. The resonant circuit is adopted to realize the soft-switching operation. Compared with other active balancing circuits, the proposed circuit requires only half a winding and one transistor per individual battery. Consequently, the proposed circuit enhances power density and further improves efficiency and reliability. Additionally, a fixed-group-number control strategy is introduced to enhance the circuit’s equalization voltage capabilities. Finally, a prototype of the voltage-balancing circuit for 24 series-connected lithium-ion batteries is established to verify the effectiveness and feasibility of the proposed circuit.

1. Introduction

Lithium-ion batteries, featuring strong endurance, high energy density, low weight, low self-discharge, and short charging time, are widely applied in electric vehicles, renewable energies, and uninterruptible power supplies [1,2]. Given the low voltage of a single battery, series and parallel connections are common for high voltage and large power requirements [3,4]. Inherent manufacturing inconsistencies cause variations in key cell parameters (capacity, internal resistance, inductance, etc.), leading to long-term voltage mismatch among batteries [5,6]. Thus, an effective voltage-balancing circuit is crucial for optimizing lithium-ion battery performance [7].

Traditional voltage-balancing circuits are classified as passive and active types based on operating principles [8,9]. Passive circuits, simple and reliable, balance voltage by resistor-dissipated energy, but their low efficiency restricts use in high-performance systems [10,11]. Active circuits, using inductors, capacitors, etc., redistribute energy among batteries, offering higher efficiency and stronger balancing ability and becoming the focus of battery management research [12,13,14,15].

Among active circuits, capacitor-based topologies suit small series-connected batteries, providing large balancing currents but suffering from operation-time current spikes that reduce reliability [16]. Inductor-based circuits avoid spikes with better reliability but limited balancing current [17]. Both are simple but have difficulties achieving soft switching [18]. Resonant voltage balancing topologies, using inductors and capacitors to form resonant cavities, enable soft switching and boost operating frequency and efficiency [19]. However, existing topologies are used to balance multiple batteries simultaneously, each battery requires a relatively large number of components, and the charging speed is slow, which restricts their application [20].

To address these issues, multi-port transformer-based voltage-balancing circuits have emerged. Adjusting the turns ratio n allows these circuits to adapt a balancing current for faster balancing [21,22]. The distributed transformer-based topology in [23] uses a transformer matrix to balance multiple battery packs, but more batteries mean more transformers, increasing costs and size. The multi-transformer-based topology in [24], with two transistors and one transformer per battery, allows free energy flow but has low power density due to excessive components. The circuit in [25] boosts balancing current and speed but cannot balance non-adjacent batteries. The circuit in [26] enables direct energy exchange but needs many transistors. The resonant circuit in [27] achieves soft switching without extra circuitry, but the extensive use of transistors and isolated gate drivers leads to high costs and large sizes, restricting its applications. The modular equalizer circuit in [28] based on phase-shift modulation enables soft switching and any-cells-to-any-cells equalization, but with three transformers and multiple components per battery, it significantly increases transformer size and cost.

This paper proposes an isolated resonant voltage-balancing circuit for long series-connected batteries. It has fewer transistors per battery, a large balancing current, and a fast balancing speed. The charging and discharging of the series-connected batteries are achieved through the multi-port transformer, which achieves full isolation between the capacitor and the battery string without any direct transmission path. Additionally, a fixed-group-number control strategy is introduced to further increase the balancing current and enhance the overall balancing speed. The LC series resonant tank ensures soft-switching operation, improving efficiency. Additionally, the proposed converter is mainly based on the LLC converter and it is controlled by pulse frequency modulation (PFM). To validate the proposed circuit and control strategy, a 100 kHz voltage balancing prototype for 24 series-connected batteries is developed. Experimental results from static, charging, and discharging balancing tests demonstrate the effectiveness and feasibility of the proposed circuit.

2. Proposed Voltage-Balancing Circuit

2.1. Circuit Configuration

As illustrated in Figure 1, the proposed voltage-balancing circuit demonstrates two crucial features that enhance its isolation capabilities. Firstly, no direct transmission bus is present between the capacitor and the battery string. Secondly, there is a single connection path between the primary and secondary sides, which is established via a multi-port transformer. The combination of these characteristics substantially improves the isolation effect. The circuit consists of six parts: a multi-port transformer, a half-bridge circuit, a resonant circuit, a rectifier circuit, a battery pack, and the load. Among them, C₁ and C₂ denote support capacitors, and S_A and S_B represent the transistors of the half-bridge. The resonant circuit is composed of a resonant inductance L_p, a resonant capacitor C_p, and a magnetizing inductance L_m. The transistors S₁₁~S_m2 form m modules in groups of two. The charging and discharging of 2 m series-connected batteries are achieved through the transformer T.

2.2. Balancing Principle Analysis

Figure 2 illustrates the voltage-balancing circuit schematic among batteries. Batteries and their corresponding transistors are connected in series in sequence. As illustrated in Figure 2a, when diodes do not meet conduction conditions, the high-voltage battery’s charging path is cut off. When the switches in Module i are conducted, the voltage V_TS across the magnetizing inductance is clamped by the voltage V_Bi1 corresponding to battery B_i1. At this moment, if V_TS is less than the sum of V_Bi1 and the diode drop voltage V_D, then Module i can remain off. Otherwise, it is forced on, affecting control reliability.

Figure 2b shows the relationship between V_TS and V_Bi. A control coefficient k_ij is introduced, where i ∈ {1, 2, …m} represents the module number and j ∈ {1, 2} represents the battery position (j = 1 for upper, j = 2 for lower). When there is a control signal in the transistor S_ij, k_ij = 1, and the battery B_ij is charged; otherwise, k_ij = 0, and the battery B_ij discharges.

Neglecting parasitic parameters, the total battery string voltage V_str within the effectively truncated module must satisfy the following conditions.

$${\displaystyle \frac{1}{2n}}{V}_{\mathrm{str}}-V_{\mathrm{B}i}<V_{\mathrm{D}}$$

(1)

By transformation, the constraint related to the turns ratio n can be derived as

$$n>{\displaystyle \frac{m{V}_{\mathrm{ave}}}{V_{\mathrm{B}ij}+V_{\mathrm{D}}}}$$

(2)

In Equation (2), the most extreme scenario occurs when the average voltage V_ave approaches the maximum single-battery voltage V_Bmax and the target battery voltage V_Bij nears the minimum voltage V_Bmin.

3. Analysis of Equalizing Current

3.1. Analysis of Equalizing Current Characteristics

When the battery voltage V_Bij is lower than the average voltage V_ave, the corresponding transistor conducts to charge the corresponding battery. The current i_{B_i1} flowing into the battery B_i1 mainly consists of two parts: one is the charging current i_{rect_i1}, showing at most a half-cycle of sine wave per period, and the other is the discharging current i_str, as depicted in Figure 3.

For a single battery, the charging current i_{rect_i1} is actually a simplified representation of the current i_Lsi1 within a half-cycle. Therefore, the study of i_{rect_i1} can be transformed into the study of i_Lsi1. After introducing the control coefficient k_ij, the single-battery charging current i_Lsi1 can be rewritten as

$$i_{L\mathrm{s}i1}=k_{i1}\ast n\ast e^{-{\displaystyle \frac{R_{\mathrm{eq}}}{2L_{\mathrm{p}}}}t}\ast \left({\displaystyle \frac{2m{V}_{\mathrm{ave}}-2V_{C\mathrm{p}i10}-2n{V}_{\mathrm{B}i1}}{\sqrt{{4Z_0}^2-{R_{\mathrm{eq}}}^2}}}\mathit{sin}\sqrt{{\displaystyle \frac{1}{L_{\mathrm{p}}{C}_{\mathrm{p}}}}-{\displaystyle \frac{{R_{\mathrm{eq}}}^2}{{4L_{\mathrm{p}}}^2}}}t\right)$$

(3)

According to Equation (3), apart from the control coefficient k_i1, the main hardware parameters that affect the current i_Lsi1 include the damping resistance R_eq, the resonant Inductance L_p, the characteristic impedance Z₀, and the turns ratio n. The voltage parameters include the initial capacitor voltage V_Cpi10 as well as the distribution of V_ave and V_Bi1. Here, V_Cpi10 represents the initial value of the voltage V_Cp corresponding to the resonant capacitor C_p, i denotes the module number, 1 represents the upper position, and 0 represents the initial value.

3.1.1. Influence of Damping Resistance R_eq on i_Lsi1

Taking time t as the independent variable, the curves of current i_Lsi1 for different R_eq are plotted in Figure 4a according to Equation (3). With the same parameters, the simulated current waveforms under various conditions are obtained through Matlab R2022b/Simulink, as illustrated in Figure 4b. Comparison reveals that the peak values of i_Lsi1 under identical equivalent resistance R_eq differ. In the theoretical current waveform, V_ave and V_Bi1 are constant. But in the simulation, capacitor voltage and V_Bi1 change with current during operation. Capacitor C₁ discharges, its voltage drops, battery B_i1 charges, and its voltage rises. Thus, the voltage difference across passive components decreases, reducing the peak values of i_Lsi1. However, the simulation trend agrees with the theoretical analysis.

3.1.2. Influence of Resonant Inductance L_p on i_Lsi1

In Equation (3), besides R_eq, L_p also affects the current. When the undamped resonant frequency is constant, different L_p values change the characteristic impedance Z₀ and the attenuation coefficient. As illustrated in Figure 5a (theoretical waveform) and Figure 5b (simulation waveform), the current curves for different L_p are illustrated. Increasing L_p raises Z₀, which seems to reduce current. But the attenuation coefficient is inversely related to L_p, so lower L_p causes more significant current amplitude decay. Also, higher L_p makes the circuit’s resonant frequency closer to the undamped one, and the current is closer to a sine wave. Below a certain L_p threshold, the root-criterion interval of the equation shifts, and the solution form becomes an exponential superposition.

3.1.3. Influence of Transformer Turns Ratio n on i_Lsi1

The transformer turns ratio n significantly impacts the equalizing current. Figure 6 depicts the impact of n on current i_Lsi1, and Figure 6a,b show theoretical and simulation current curves for different n. With constant battery voltage, increasing n decreases the current i_Lsi1. Beyond a certain threshold, further n increases reverse the voltage difference sign and current direction.

When n > 12, a current reversal occurs. At n = 13, the magnetizing inductance voltage is constant. The magnetizing current i_Lm flows from negative to positive, while the primary-side resonant current i_Lp reverses and rises slowly, increasing the difference between i_Lm and i_Lp. Initially, i_Lsi1 = 0, and then its negative absolute value grows. The resonant circuit voltage difference is small, with only a resonance tendency (point A), and the peak value of i_Lsi1 is at the switch-over point. When n = 14, the reverse voltage difference increases, and the resonance is stronger than at n = 13, with the minimum current at the resonance peak.

3.1.4. Influence of the Average Voltage V_ave and the Target Battery Voltage V_Bi1 on i_Lsi1

When n is between two turns ratio boundary values of n_dn and n_up, the sign of i_Lsi1 depends on the distribution of V_ave and V_Bi1. Taking n = 12 as an example, the i_Lsi1 curves against V_ave and V_Bi1 can be drawn, as illustrated in Figure 7. Based on their relationship, the XOY plane can be divided into three regions: V_Bi1 < V_ave, V_Bi1 = V_ave, and V_Bi1 > V_ave. When n equals the module number m, if V_Bi1 = V_ave, then nV_Bi1 = mV_ave, the resonant-cavity voltage is zero, the peak value of i_Lsi1 is zero, and no energy transfer occurs. If V_Bi1 < V_ave, then nV_Bi1 < mV_ave, the battery-pack voltage is larger, and the peak value of i_Lsi1 is positive. If V_Bi1 > V_ave, the peak value of i_Lsi1 is negative.

During energy transfer, the peak value of i_Lsi1 is affected by the resonant-cavity voltage difference. With the positive direction from the battery packs to the single battery, the peak value of i_Lsi1 is maximized when V_ave nears its maximum and V_Bi1 nears its minimum and minimized when V_ave is at its minimum and V_Bi1 is at its maximum. The peak value of i_Lsi1 is directly proportional to V_ave and inversely proportional to V_Bi1.

3.2. Influence of Parasitic Parameter on Voltage-Equalizing Current i_Lsi

In practical circuits, parasitic parameters can affect circuit characteristics, degrade performance, interfere with control, or cause circuit failure. Figure 8 shows the secondary-side equivalent circuit considering parasitic inductance.

After transformation, the total resonant inductance can be calculated as L_ps = L_{p_now} + n²*L_s. To keep the original undamped resonant frequency and characteristic impedance, L_p must be reduced to equal the previous L_{p_former}. The current i_Lsi1 can be derived as

$$i_{L\mathrm{s}i1\text{\_}\mathrm{edit}}=k_{i1}\ast n\ast e^{-{\displaystyle \frac{R_{\mathrm{eq}}}{2L_{\mathrm{ps}}}}t}\ast \left({\displaystyle \frac{V_{\mathrm{str}}-2V_{C\mathrm{p}i10}-2n{V}_{\mathrm{B}i1}}{\sqrt{{4Z_{0\_\mathrm{ps}}}^2-{R_{\mathrm{eq}}}^2}}}\mathit{sin}\sqrt{{\displaystyle \frac{1}{L_{\mathrm{ps}}{C}_{\mathrm{p}}}}-{\displaystyle \frac{{R_{\mathrm{eq}}}^2}{{4L_{\mathrm{ps}}}^2}}}t\right)$$

(4)

The secondary-side voltage expression can be written as

$$\begin{array}{cc}{V}_{\mathrm{TS}}& =L_{\mathrm{s}i}{\displaystyle \frac{d{i}_{L\mathrm{s}i1\text{\_}\mathrm{edit}}}{dt}}+i_{L\mathrm{s}i1\text{\_}\mathrm{edit}}{R}_{\mathrm{s}i}+V_{\mathrm{B}i1}\hfill \\ & =V_{\mathrm{B}i1}+L_{\mathrm{s}i}{k}_{i1}n{\displaystyle \frac{V_{\mathrm{str}}-2V_{C\mathrm{p}i10}-2n{V}_{\mathrm{B}i1}}{\sqrt{{4Z_0}^2-{R_{\mathrm{eq}}}^2}}}{e}^{-{\displaystyle \frac{R_{\mathrm{eq}}}{2L_{\mathrm{ps}}}}t}\hfill \\ & \ast \left(-{\displaystyle \frac{R_{\mathrm{eq}}}{2L_{\mathrm{ps}}}}\mathit{sin}\sqrt{{\displaystyle \frac{1}{L_{\mathrm{ps}}{C}_{\mathrm{p}}}}-{\displaystyle \frac{{R_{\mathrm{eq}}}^2}{{4L_{\mathrm{ps}}}^2}}}t+\sqrt{{\displaystyle \frac{1}{L_{\mathrm{ps}}{C}_{\mathrm{p}}}}-{\displaystyle \frac{{R_{\mathrm{eq}}}^2}{{4L_{\mathrm{ps}}}^2}}}\mathit{cos}\sqrt{{\displaystyle \frac{1}{L_{\mathrm{ps}}{C}_{\mathrm{p}}}}-{\displaystyle \frac{{R_{\mathrm{eq}}}^2}{{4L_{\mathrm{ps}}}^2}}}t\right)\hfill \\ & +R_{\mathrm{s}i}{k}_{i1}n{e}^{-{\displaystyle \frac{R_{\mathrm{eq}}}{2L_{\mathrm{ps}}}}t}\left({\displaystyle \frac{V_{\mathrm{str}}-2V_{C\mathrm{p}i10}-2n{V}_{\mathrm{B}i1}}{\sqrt{{4Z_0}^2-{R_{\mathrm{eq}}}^2}}}\mathit{sin}\sqrt{{\displaystyle \frac{1}{L_{\mathrm{ps}}{C}_{\mathrm{p}}}}-{\displaystyle \frac{{R_{\mathrm{eq}}}^2}{{4L_{\mathrm{ps}}}^2}}}t\right)\hfill \end{array}$$

(5)

From Equation (5), V_TS is a superposition of multiple voltages. Ignoring the small resistance voltage, compared with V_TS without parasitic inductance, the main change is in the inductance voltage. With fixed frequency, the inductance voltage mainly depends on the current amplitude and inductance value.

Based on Equation (5), using V_Bi1 and L_si as independent variables, V_TS is plotted in Figure 9a,b. In Figure 9a, sine V_Bi1 affects the resonant-cavity voltage difference, a smaller V_Bi1 leads to a larger current peak value and faster current-change rate, resulting in more severe voltage distortion.

The inductance voltage also depends on L_si. Figure 9b illustrates the influence of L_si on V_TS. As L_si is in-series in the circuit, if L_p and C_p are fixed, changing L_si affects the characteristic impedance Z₀ and frequency. For decoupling, when L_si changes, L_p should be adjusted synchronously to keep L_ps stable and the current unchanged.

When the distortion causes the peak value of V_TS to exceed V_Bi1 + V_D in module i, the module conducts in uncontrolled rectification, disrupting reliable control, as depicted in Figure 9c. Under a fixed voltage-equalizing current, the V_TS distortion degree is proportional to L_s, and a larger L_s leads to more obvious distortion. Thus, optimizing parasitic parameters and designing hardware parameters to meet reliable control requirements is crucial for better voltage-equalizing performance.

3.3. Design of Key Parameters

In the circuit, the voltage-equalizing current is crucial. At the rated operating frequency, its amplitude is affected by hardware parameters R_eq, n, L_p, and the distribution of V_ave and V_Bi1.

3.3.1. Transformer Turns Ratio n

Lithium-ion batteries operate at 1.9 V–2.5 V during normal operation. As n changes within this range, the current amplitude can be constantly positive or negative, meaning for a certain n, the circuit’s energy-transfer direction is fixed regardless of battery voltages.

After the battery with an initial energy storage of 0 is disconnected, the upper half-cycle current of a single module is calculated as

$$i_{L\mathrm{s}i1}=n{e}^{-{\displaystyle \frac{R_{\mathrm{eq}}}{2L_{\mathrm{p}}}}t}\left({\displaystyle \frac{V_{\mathrm{str}}-2n{V}_{\mathrm{B}i2}}{\sqrt{{4Z_0}^2-{R_{\mathrm{eq}}}^2}}}\mathit{sin}\sqrt{{\displaystyle \frac{1}{L_{\mathrm{p}}{C}_{\mathrm{p}}}}-{\displaystyle \frac{{R_{\mathrm{eq}}}^2}{{4L_{\mathrm{p}}}^2}}}t\right)$$

(6)

At high frequencies, the short switching period makes the exponential term negligible. Substituting V_str with mV_ave and simplifying, the current amplitude can be obtained as

$$I_{L\mathrm{s}i1}=n{\displaystyle \frac{2m{V}_{\mathrm{ave}}-2n{V}_{\mathrm{B}i1}}{\sqrt{{4Z_0}^2-{R_{\mathrm{eq}}}^2}}}$$

(7)

By solving Equation (7), two boundary values of the turns ratio, namely n_dn and n_up, are obtained as

$$\left\{\begin{array}{l}{n}_{\mathrm{dn}}<m{\displaystyle \frac{V_{\mathrm{ave}\text{\_}\min }}{V_{\mathrm{B}i1\text{\_}\max }}}=9.12\\ n_{\mathrm{up}}>m{\displaystyle \frac{V_{\mathrm{ave}\text{\_}\max }}{V_{\mathrm{B}i1\text{\_}\min }}}=15.79\end{array}\right.$$

(8)

With a certain margin reserved, the turns ratio n is designed to be 10.

3.3.2. Resonant Capacitor C_p

The resonant circuit consists of C_p, L_p, and L_m. For a fixed-frequency converter, once L_p is set, C_p can be deduced from the undamped frequency f_r.

$$C_{\mathrm{p}}={\displaystyle \frac{1}{{\left(2\pi f_{\mathrm{r}}\right)}^2{L}_{\mathrm{p}}}}$$

(9)

At an operating frequency of 100 kHz, the value of C_p is determined to be 140 nF.

3.3.3. Damping Resistance R_eq

R_eq includes primary- and secondary-side line resistances, switch resistance, transformer winding resistance, and battery parasitic resistance. To minimize losses and maximize efficiency, R_eq is fixed once the hardware circuit is set. Its constraint is represented by

$$R_{\mathrm{eq}}<2Z_0$$

(10)

During the multi-module operation, the number of modules participating in energy transfer changes with the control strategy, and the equivalent resistance R_eqm will also change. According to the parallel model, R_eqm < R_eq, so when R_eq meets the constraints, R_eqm does too.

When the frequency is fixed, once L_p is determined, Z₀ will also be determined. Therefore, the design of Z₀ can be transformed into the design of L_p. Consequently, the design of the current peak value can be achieved by adjusting L_p and n with fixed R_eq.

3.3.4. Design of Magnetizing Inductance L_m

To ensure soft switching, the circuit must operate in the inductive region and meet the parasitic capacitance’s charging and discharging conditions during the dead time t_d. The schematic diagram is shown in Figure 10.

As shown in Figure 10a, the discharge time of the magnetizing inductance as a current source is actually the dead time t_d. The constraint expression to ensure the charging and discharging of the parasitic capacitance C_DS can be written as

$$I_{L\mathrm{m}\text{\_}\mathrm{pk}}\cdot t_{\mathrm{d}}\ge 2C_{\mathrm{DS}}{V}_{\mathrm{in}}$$

(11)

In the first half-cycle, when the primary-side transistor is turned on, the magnetizing inductance is connected in parallel with the input voltage V_in. With constant voltage across it, the magnetizing current rises linearly. Starting from t₀, after a quarter of a cycle, the magnetizing current reaches the maximum value. Therefore, the expression for the magnetizing peak value of I_{Lm_pk} can be written as

$$I_{L\mathrm{m}\text{\_}\mathrm{pk}}={\displaystyle \frac{V_{\mathrm{str}}}{2L_{\mathrm{m}}}}\cdot {\displaystyle \frac{T_{\mathrm{s}}}{4}}$$

(12)

By substituting Equation (12) into Equation (11), the constraint for the magnetizing inductance L_m required for soft switching can be obtained as

$$L_{\mathrm{m}}\le {\displaystyle \frac{T_{\mathrm{s}}{t}_{\mathrm{d}}}{16C_{\mathrm{DS}}}}$$

(13)

Based on these factors, EPC9201 is selected as the switch, featuring an output parasitic capacitance of 1100 pF. For a switching frequency of 100 kHz, the period T_s is 10 μs. A dead time of 100 ns is implemented to prevent short-circuiting between the upper and lower switches. Calculations reveal that the maximum magnetizing inductance for achieving soft switching is 56.8 μH. Since a larger magnetizing inductance results in a smaller magnetizing current and reduced losses during dead time, the chosen magnetizing inductance is set at the maximum permissible value to ensure soft-switching capability.

Based on the above-mentioned parameter design scheme, the final hardware parameters are shown in

Table 1. Main parameters of the proposed circuit.

Parameters	Values
Number of modules	12
Number of batteries	24
Single-cell battery voltage	1.9 V~2.5 V
Single-cell battery capacity	15 Ah
Transformer turns ratio	10
Transformer magnetizing inductance	56.8 µH
Secondary-side parasitic inductance	0.1 µH
Resonant capacitance	140 nF
Resonant inductance	18 µH

.

4. The Proposed Control Strategy

To equalize all battery voltages to V_ave, a fixed-group-number control strategy is adopted. Primary-side transistors are driven by square-wave signals with a 180°phase difference, and the secondary-side signals are the same. Signals for specific module transistors are determined by the control strategy, with the number of charging modules (m_on) constant during voltage equalization. A block diagram of the fixed-group-number control strategy is shown in Figure 11.

Step 1: Set the control target. Use voltage standard deviation σ to judge equalization completion. Set control standard deviation target ε and other parameters like total module number (m) and m_on.

Step 2: Set PWM signals: Set primary-side PWM signals S_A and S_B with a 50% duty cycle, the same frequency as the circuit. Block all secondary-side switching-tube signals.

Step 3: Collect data: Collect all battery voltages and group them by module. For the i-th module, the upper-position battery voltage is V_Bi1 and the lower-position is V_Bi2.

Step 4: Process data: Calculate the average voltage V_ave, range R, and actual standard deviation σ based on the collected voltage data.

Step 5: Judge equalization completion: Compare σ with ε. If σ is less than ε, equalization ends; otherwise, proceed.

Step 6: Battery grouping. Divide all batteries into two groups by the label’s last digit. Group A (odd-numbered) has batteries with labels ending in 1, and Group B (even-numbered) has those ending in 2.

Step 7: Battery sorting: Sort batteries into each group by voltage in ascending order to obtain voltage serial numbers.

Step 8: Set voltage control values: Assign the m_on-numbered battery voltage in each group to a register as the control voltage V_mon1 for Group A and V_mon2 for Group B.

Step 9: Compare voltage: Compare each battery voltage in a group with V_ave. In Group A, if V_Bi1 < V_ave, proceed; otherwise, apply a zero-level signal to the corresponding transistor. Do the same for Group B.

Step 10: Control PWM signals: Compare battery voltages meeting Step 9 with the control voltage. In Group A, if V_Bi1 < V_mon1, apply a PWM signal to the corresponding transistor; otherwise, apply a zero-level signal. Do the same for Group B.

After Step 10, continuously check σ. If it meets requirements, block all signals, indicating equalization is complete. If not, repeat steps 3–10.

5. Experimental Verification

To verify the effectiveness and correctness of the proposed circuit and the control strategy, an experimental platform for a 24-series Lithium Titanate Oxide (LTO) batteries was built according to Figure 1 and Table 1, as shown in Figure 12.

As shown in Figure 12a, the experimental platform comprises an LTO battery box, a battery interface board, a voltage equalizer, a BMS signal board, and an FPGA control board. The 24-series LTO battery box is for voltage equalization, with a single-cell voltage of 1.9–2.5 V, 15 Ah capacity, and a 100 A charge–discharge current. The interface board shortens lines and reduces parasitic parameters. The equalizer uses GaN Transistors for high efficiency. The FPGA controls switches for energy regulation.

As depicted in Figure 12b, the designed planar multi-winding transformer has a 10-turn primary of four-layer PCBs and a secondary of double-layer FPCs. With a flat EE core, it can support 32 battery packs with four extra windings at positions 7 and 8. It offers a cost-effective solution by improving the voltage equalization capability and reducing unit cost.

5.1. Soft-Switching Experiment

Figure 13 presents soft-switching experimental waveforms for the complete cycle of a single module (Figure 13a), the half-cycle of two modules (Figure 13b), and the complete cycle of two modules (Figure 13c). V_TS, i_Lp, i_Lsi, and i_Lsj represent the secondary-side voltage, the primary-side equalizing current, and the equalizing current of modules i and j, respectively.

In Figure 13a, when i_Lsi = 0, it indicates that neither battery in module i reaches the equalization condition. i_Lsj presents a complete sine wave, which indicates that both batteries in module j meet the conditions, the upper-positioned battery B_j1 is charged by the positive half-cycle sine wave with a peak value of 4.5 A, and the lower-positioned battery B_j2 is charged by the negative half-cycle sine wave with a peak value of 4.9 A. The peak value of i_Lp reaches 1.6 A. Through calculation, it can be deduced that apart from module j, there are still other modules operating.

In Figure 13b, both modules’ batteries meet the equalization conditions, with each having a half-cycle current per period. The upper-positioned battery in module j is charged by a positive half-cycle sine wave with a peak value of 4.9 A, and the lower-positioned battery in module i is charged by a negative half-cycle sine wave with a peak value of 5.2 A. Although modules i and j are energized for only half a cycle in a single period, the primary-side current still exhibits a complete sinusoidal wave, reaching a peak value of 1.7 A.

In Figure 13c, The peak value of i_Lp reaches 1.8 A. Batteries in both modules meet the equalization conditions, showing the complete sine waves. Each module has a full-cycle current within a single period. The battery in module j has a lower voltage, resulting in a larger equalizing current with a peak value of 8 A, while the battery in module i has a higher voltage, leading to a smaller equalizing current with a peak value of 7 A.

As can be seen from Figure 13, the V_TS waveform is distorted by parasitic parameters, while i_Lp is a complete sinusoidal wave, achieving zero-voltage switching (ZVS) in all tested cycles.

5.2. Parasitic Parameter Experiment

Secondary-side parasitic inductance distorts the transformer’s secondary-side port voltage V_TS. When the V_TS peak exceeds V_Bi1 + V_D, uncontrolled rectification occurs, disrupting reliable control.

Figure 14 depicts the waveforms before and after optimizing the parasitic parameters. Before optimization, in the complete cycle of a single module (Figure 14a) and the half-cycle of two modules (Figure 14c), the parasitic inductance causes the distortion of V_TS. The peak value of V_TS reaches 6.5 V, which triggers uncontrolled rectification. The component-level optimizations primarily focus on minimizing circuit parasitic inductance by reducing the length of transformer windings and the wiring distance from batteries to the equalization circuit. After optimization, in the complete cycle of a single module (Figure 14b) and the half-cycle of two modules(Figure 14d), the distortion degree of V_TS is significantly reduced. The peak value of V_TS drops to 4 V, and the uncontrolled rectification phenomenon almost disappears. Experiments show that by optimizing the parasitic parameters, uncontrolled rectification can be eliminated both in the complete cycle of a single module and the half-cycle of two modules.

5.3. Voltage Equalization Control Experiment

5.3.1. Static Voltage Equalization

The voltage recording graphs and statistical data curves are shown in Figure 15. At 0 s, the control strategy is applied, and the circuit runs with m_on = 3. The initial average battery voltage, range, and standard deviation are 2185 mV, 74 mV, and 19 mV. By 7760 s, they drop to 2177 mV, 3.8 mV, and 1 mV, meeting the end condition (1 mV standard deviation). When the number of modules needing charging (m_need) exceeds m_on, the voltage stays around the voltage V_mon corresponding to the m_on-th battery. Batteries far from V_mon have stable voltage-curve changes, while those near V_mon fluctuate. This is because batteries at a relatively far distance have stable charge–discharge states and current directions, with stable internal resistance voltage. In the experiment, the battery pack transferred a cumulative 857 mV over 7760 s, resulting in an energy transfer rate of 0.11 mV/s. Notably, the highest efficiency reached 98.2%.

In Figure 15a, four batteries have different voltage-rise slopes due to battery module impedance differences. Lower-slope batteries are in high-impedance modules, and higher-slope ones are in low-impedance modules.

5.3.2. Charging Voltage Equalization

The voltage recording graphs and statistical data curves are shown in Figure 16. At 0 s, the control strategy is introduced with m_on = 6. Initial average battery voltage, range, and standard deviation are 2119 mV, 89 mV, and 29 mV. At 11,420 s, the average voltage and range are 2292 mV and 3 mV, and the standard deviation is 0.8 mV, meeting the end condition. Batteries charge until 11,560 s when the power is cut, with the average voltage reaching 2311 mV. Then, it enters the static stage, and the voltage stabilizes.

5.3.3. Discharging Voltage Equalization

Figure 17 shows voltage recording graphs and statistical data curves. At 0 s, the control strategy starts with m_on = 6. The initial average battery voltage, range, and standard deviation are 2353 mV, 147 mV, and 46 mV. At 3950 s, they drop to 2208 mV, 4 mV, and 0.7 mV, meeting the end condition. Batteries discharge until 4370 s, with the average voltage at 2201 mV. Then the discharge power is removed, and the system enters the static stage. By 5000 s, the voltage stabilizes.

5.4. Charging and Voltage Equalization Experiment of the Charger

Figure 18 shows the voltage recording graphs and statistical data curves of the charging and equalization experiment of the charger, which consists of five stages. The first stage is the static stage, which lasts 1020 s and has an initial voltage range of 121 mV and a standard deviation of 35 mV. This is followed by the charging and voltage equalization stage, lasting 9470 s with a 3 A current and the number of equalization modules m_on = 6. In this stage, all batteries charge initially, and then high-voltage batteries stop charging at 2080 s while low-voltage ones continue. By 10,490 s, the range drops to 4 mV and the standard deviation drops to 0.8 mV, achieving equalization. Next is the maintenance stage, lasting 910 s, during which the voltage, range, and standard deviation are maintained within the target range. After that, the further charging and voltage equalization stage begins. At 11,400 s, a new target voltage is set, and all batteries charge. At 12,830 s, the power is cut when the target voltage is reached. Finally, the last stage is the static stage again, and at 14,000 s, the standard deviation shrinks to 0.4 mV and the range drops to 2 mV.

The comparison of different voltage-balancing circuits is listed in

Table 2. Comparison of different voltage-balancing circuits.

References	Components				Frequency	ZVS	Num. of Batt	Balancing Current	Efficiency	Isolation	Size
	T	M	C	L
[6]	1	0.5N	2	1	200 kHz	Partial	4	0.505 A	88.1%	Partial	medium
[9]	2	4 + 2N	3	2	100 kHz	Partial	12	1.8 A	96%	Partial	Big
[12]	0.5N	0.5N	N	N	100 kHz	None	4	0.6 A	86%	Partial	Big
[19]	1	2N + 2	2N + 2	N	50 kHz	Full	7	0.6 A	96.3%	Partial	medium
[21]	1	0.5N	2	1	120 kHz	None	4	-	94.2%	Partial	medium
[24]	N	2N	2N	N	29 kHz	None	4	5 A	90.6%	Partial	Big
[23]	1	4	4	1	100 kHz	Partial	12	0.3 A	92.8%	Partial	Small
[25]	1	N	1	2	100 kHz	Partial	6	0.312 A	-	Partial	medium
[27]	1	4 + 2N	2	2	16 kHz	Partial	4	0.5 A	90.1%	Partial	Big
[28]	3	2N	2N	N + 6	75 kHz	Partial	9	-	89–91%	Partial	Big
Proposed	1	2 + N	1	2	100 kHz	Full	24	3 A	98.2%	Full	Small

Components: T (transformers), M (MOSFET), C (capacitors), L (inductors).

. The proposed circuit and control strategy have full soft-switching operation, high equalization efficiency, large equalization current, the capability to equalize a large number of batteries, and a relatively small number of transistors. Using high-frequency wide-band-gap devices reduces circuit volume and improves overall power density.

6. Conclusions

This paper presents an isolated resonant voltage-balancing circuit based on a multi-port transformer for series-connected lithium-ion batteries. In the proposed circuit, each single battery only requires half a winding and one transistor. The resonant circuit is utilized to ensure that all switching devices can achieve soft switching. The multi-port transformer is employed to increase the equalization current and enable the arbitrary flow of energy among batteries. Notably, there is no direct transmission path between the capacitor and the battery string. As a result, the need for extra switches and control logic is removed, and full isolation is achieved. Additionally, the proposed fixed-group-number control strategy can increase the equalization current, further improving the equalization speed and efficiency. Finally, the designed equalization prototype of a 24-series-connected lithium-ion battery pack verifies the soft-switching performance. The equalization capabilities of the proposed circuit under different working conditions are verified through static equalization, charging equalization, and discharging equalization, with the highest efficiency reaching 98.2%.