Next Article in Journal
An Experimental Review of Step-Down Converter Topologies with Wide Input Voltage Range for Modern Vehicle Low-Power Systems
Previous Article in Journal
Ultra-Lightweight and Highly Efficient Pruned Binarised Neural Networks for Intrusion Detection in In-Vehicle Networks
Previous Article in Special Issue
Robust Sensorless PMSM Control with Improved Back-EMF Observer and Adaptive Parameter Estimation
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

A Novel Modified Delta-Connected CHB Multilevel Inverter with Improved Line–Line Voltage Levels

by
Abdullah M. Noman
Electrical Engineering Department, College of Engineering, Prince Sattam Bin Abdulaziz University, Al-Kharj 16278, Saudi Arabia
Electronics 2025, 14(9), 1711; https://doi.org/10.3390/electronics14091711
Submission received: 20 March 2025 / Revised: 18 April 2025 / Accepted: 20 April 2025 / Published: 23 April 2025
(This article belongs to the Special Issue Power Electronics in Renewable Systems)

Abstract

:
Numerous cascaded inverter configurations have been developed to generate higher voltage levels, thereby improving performance and lowering costs. Comparing conventional delta-connected cascaded H-bridge (CHB) multilevel inverters to star-connected CHB multilevel inverters reveals a disadvantage. In conventional delta-connected CHB multilevel inverters, more switches are unavoidably needed to achieve the same line-to-line grid voltage, since more H-bridges cascaded in series are required than in a star-connected CHB. This paper presents a modified topology based on the delta-connected CHB multilevel configuration to provide the same number of line-to-line voltage levels as a star-connected CHB, using an equivalent number of switches. The number of switches in the proposed multilevel inverter is decreased compared to conventional delta-connected CHB MLIs at the same voltage levels. The mathematical modeling of the proposed topology and the simulation results using a fixed load and a PV-grid connection are provided to validate the efficacy and dependability of the proposed topology. To validate the usefulness of the proposed configuration, it was practically implemented in the laboratory. Data acquisition and generation of gating signals to fire the switches were implemented using a MicroLabBox real-time controller. The prototype was examined under a resistive–inductive load and tested under different modulation indices. To demonstrate the effectiveness and the functionality of the topology, the experimental results are also provided.

1. Introduction

Multilevel inverter (MLI) topologies have proven to be a feasible solution for medium- to high-voltage high-power applications. The basic idea behind an MLI is to create a voltage waveform using a staircase pattern by combining numerous power semiconductor switches with different direct-current (DC) sources of lower voltage to convert power [1]. With a three-level converter, the word “multilevel” was first introduced [2]. Afterwards, numerous MLI topologies have been proposed [3,4,5,6,7,8,9,10]. MLIs offer several appealing characteristics, including reduced voltage stress on switches, decreased total harmonic distortion (THD) of voltage and current, enhanced power quality, and minimal power dissipation on switches while in the ON state, reduced filter size, ability to reduce the switching frequency, and hence the reduction in switching losses, etc. [11,12,13,14,15,16]. The merits of MLIs make them attractive for medium-voltage and high-voltage high-power applications. Generally, classical MLIs can be classified according to the connected DC sources into single- or separated-DC-source MLIs, as shown in Figure 1.
The three-level neutral point multilevel inverter (NPC MLI) were initially introduced in 1981. After that, several MLIs based on the NPC have been proposed [14,15,17,18,19,20]. A three-level NPC MLI inverter is shown in Figure 2.
The NPC topology offers various merits, including the fact that voltage stress can be distributed between the series switches, and that current fluctuations are minimized. However, the NPC topology suffers from voltage drops on the clamped diodes, and the topology is bulky at high voltage levels.
Another topology called the flying capacitor multilevel inverter (FC MLI), in which the diodes of the NPC are replaced by capacitors, is designed in such a manner to reduce the disadvantages of NPC inverters [21,22]. A three-level flying capacitor MLI is shown in Figure 3. However, increasing the number of voltage levels with a flying capacitor MLI requires increasing the number of capacitors. In addition, the voltages of these capacitors need to be carefully controlled; otherwise, the output voltage is unbalanced [23].
As shown in Figure 2 and Figure 3, NPC and FC MLIs require a single DC source [24]. CHB MLIs, however, require several separated DC sources. Each DC source is connected to one H-bridge cell. The series connection of H-bridge cells serves as the foundation for CHB MLIs. CHB MLIs require fewer components at the same voltage levels than other traditional MLI topologies. Photovoltaic (PV) modules, fuel cells, batteries, etc., can serve as DC sources [25]. When the magnitude of the DC sources is the same, CHB is referred to as symmetric. In a similar vein, the CHB is referred to as asymmetric when the DC sources have different magnitudes. The advantages of CHB MLIs are as follows:
  • The CHB MLI topology has the fewest components among the alternative topologies to produce the same voltage levels.
  • Extreme modularity.
  • Low cost.
  • High inverter efficiency.
  • Easy to construct and control.
Cascaded MLI features have provided an appealing solution for various applications, including standalone systems, static VAR compensations, and grid-connected PV applications [6,26,27,28,29,30,31].
By using a unipolar modulation approach, each H-bridge can provide three output voltage levels [28,32]. Several CHB MLIs have been introduced in the literature to increase the number of generated voltage levels, such as five levels [33], seven levels [34], and more [35,36].
Numerous alternative cascaded MLI topologies have been documented in the literature with the aim of increasing the level count, thereby enhancing system performance and diminishing system expenses [15]. Asymmetric CHB MLI topologies with differing DC source magnitudes can generate more levels with fewer switches.
As mentioned above, cascaded H-bridge (CHB) MLIs comprise a series connection of several H-bridge cells.
The addition of cascaded MLI capabilities has rendered numerous applications [6,16,28,29,30,31,37,38,39,40,41,42]. There are two possible connections for CHB configurations: delta and star. Applications vary for each connection. A star-connected and a delta-connected CHB MLIs are shown in Figure 4 and Figure 5, respectively.
The authors in [39] proposed a STATCOM based on a star-connected CHB to suppress the grid voltage unbalance. In this paper, the limitation of star-connected CHB MLIs in compensating the unbalanced grid voltage is analyzed. The analysis is confirmed by simulation and experiments.
The authors in [40] investigated the use of three-phase star-connected CHB MLIs for active power filter applications. A simulation of a nine-level CHB MLI-based SAPF system was conducted in MATLAB/Simulink, demonstrating its efficacy in alleviating power quality problems stemming from non-linear loads.
The author in [38] proposed a star-connected three-phase seven-level CHB MLI. Each H-bridge is connected to a multistring PV, and each string is connected to one DC–DC converter. One DC–DC converter is assigned for each PV string. The DC–DC converter is responsible for the MPPT of the PV string and amplifying the DC voltage, if necessary. This connection method has the same issues of not correctly tracking the MPP of the PV modules, and its efficiency is reduced. Moreover, if many PV modules are coupled to a single DC–DC converter, the DC–DC converter’s power rating will be high, raising the cost of the system. In [43], various modulation approaches were used to improve the power quality in a PV MLI. Harmonic suppression strategies were used in the inverter structure. To eliminate harmonics, appropriate switching states were applied to the inverter switches. The authors in [44] proposed a synchronization approach based on phase-shifted pulse width modulation (PSPWM) to control a star-connected CHB MLI. In [45], different modulation techniques based on specific sequential switching were presented and applied to CHB MLIs. The authors in [46] developed a control technique based on space vector modulation to improve the THD and the grid current of a star-connected CHB MLI. A star-connected CHB was employed for PV applications, and DC–DC converters were used for the maximum power point tracking.
Delta-connected CHB MLIs are gaining popularity as a viable alternative to star-connected CHB MLIs for PV applications. [47,48,49,50]. Individual phase control is simple to create with delta-connected CHB MLIs, which can be utilized as static synchronous compensation (STATCOM). STATCOM applications necessitate a careful consideration of handling negative-sequence reactive power [51,52,53,54].
STATCOM enhances supply quality and offers quick dynamic reactive power support [55,56]. Additionally, it is employed in large-scale industrial applications for compensating unbalanced and nonlinear loads [31]. One of the challenges that power converters face is to supply balanced grid currents even under unbalanced loads or unbalanced generation, especially with renewable energy resources [57]. Certain loads, such as traction drives and arc furnaces, can be sources of unbalanced current [31]. On the other hand, voltage unbalance can be caused due to the presence of line-to-ground faults or unbalanced loads. These unbalanced currents or voltages require that the grid-connected inverter supply negative-sequence current or voltage to balance the current or the voltage at the point of common coupling. One solution is to use STATCOM. STATCOM using MLIs has received more attention to suppress these unbalanced voltages and currents [58,59,60]. The enhancement of power system stability, unbalanced load adjustment, power factor improvement, line voltage control, active power filters (APF), and low-voltage ride-through (LVRT) are examples of common uses for STATCOM [55]. One interesting converter for STATCOM applications is the CHB converter topology. Because of its modular design, transformerless connection, and smaller output filter, it was anticipated to be the ideal option for MV applications [50,61]. The authors in [62] proposed delta-connected CHB MLIs as an alternative to star-connected CHB MLIs for STATCOM under imbalanced situations. Delta-connected CHB MLIs enable the compensation of imbalanced loads while simultaneously adjusting for reactive power [63]. The authors in [64] compared the two types of CHB MLIs (star-connected and delta-connected) and concluded that delta-connected CHB MLIs are preferable to star-connected CHB MLIs, especially for compensating unbalanced currents, since delta-connected CHB MLIs require less zero-sequence current injection than the zero-sequence voltage injection in star-connected CHB MLIs to compensate for the unbalanced conditions. Moreover, delta-connected CHB MLIs motivate researchers to further investigate and analyze delta-connected CHB MLIs for LVRT purposes [62,63]. The above literature review explains the motivations to use delta-connected CHB MLIs. However, in order to achieve the line-to-line grid voltage under balanced PV generation, the delta connection needs more bridges cascaded in series than the star connection, which unavoidably increases the converter’s size. In addition, the minimization of circulating current inside the delta configuration necessitates the implementation of a solution, such as adding magnetic elements. As a result, delta-connected H-bridges are more expensive than star-connected H-bridges for generating the same line-to-line voltages. To synthesize line-to-line voltage, one phase leg needs a bridge number that is √3 times greater [49,64]. Minimizing the current that flows inside the delta connection must also be addressed.
This study suggested modifying the delta-connected CHB configuration in order to increase the number of line–line voltage levels to match the number of levels produced by the star-connected CHB. The number of required H-bridges in the proposed modified MLI is the same as that required by the star-connected CHB to produce the same line–line voltage levels. In addition, the proposed configuration eliminates the need for adding extra inductors since the solution can solve both the number of voltage levels and the circulating current. The proposed topology was mathematically analyzed and modeled inside the SIMULINK environment to evaluate its accuracy and efficacy. Moreover, the proposed MLI was experimentally implemented in the laboratory. The constructed inverter was tested under a resistive load at different modulation indices. The simulation and experimental results are provided to prove the advantages of the proposed topology.
The paper is organized as follows. Section 2 introduces the description of the proposed topology, while Section 3 shows the analysis of the proposed topology. The simulation results are explained in Section 4, and the experimental results are shown in Section 5. Section 6 describes the conclusions.

2. Description of the Proposed Topology

The proposed configuration is a modified configuration for traditional delta-connected CHB MLIs. Figure 6a shows the star-connected CHB topology, while Figure 6b shows a traditional delta-connected CHB MLI. As shown in this figure, the number of the line-to-line voltage levels generated from the traditional delta-connected CHB (Figure 6b) is the same as the line–neutral voltage levels generated from the star-connected CHB (Figure 6a).
Thus, comparing delta-connected CHB MLIs to star-connected CHB, it is observed that the former require a number of H-bridges that is √3 times more at the same line-to-line voltage. Consequently, this results in an increase in both the size and cost of the delta-connected CHB. Furthermore, at the same line-to-line voltage levels, the delta-connected CHB exhibits increased switching losses and conduction losses, resulting in a reduced inverter efficiency compared to the star-connected CHB operation. Hence, this work proposes a modified delta-connected CHB to produce line-to-line voltage levels equivalent to those of a star-connected CHB, while utilizing the same number of H-bridges. The proposed topology is shown in Figure 7. As can be seen in this figure, the line-to-line voltage levels are synthesized using three coupled transformers rather than the inductors used in traditional delta-connected CHB MLIs. With the help of these coupled transformers, the line-to-line voltage levels of the proposed topology are the same as the line-to-line voltage levels of the star-connected CHB topology.
Interface inductors are unnecessary when using the proposed topology for grid connection applications. Alternatively, the coupled transformers in the proposed configuration can also amplify the produced voltage without requiring an extra voltage amplification device at the point of connection with the utility.
The transformer leakage inductance and core saturation behavior may have an effect on the inverter’s dynamic response and harmonic performance. The winding resistance may cause an output voltage drop. On the other hand, the leakage inductance has little effect on the THD of the generated voltage. Therefore, these transformers should be characterized by high magnetization inductance, a ferrite core to avoid core saturation, and low winding resistance and leakage inductance.
As a summary, this topology generates higher voltage levels by reducing the number of required switches compared with the conventional delta-connected CHB multilevel inverter topology. By leveraging a reduced switch count, it achieves a more compact and simplified design. Furthermore, it effectively mitigates voltage and current distortion. The scalable nature of this design enables seamless expansion to accommodate additional voltage levels. The concept’s validity has been substantiated through the simulation and experimental results.
The proposed topology offers several key benefits compared to the conventional delta-connected CHB MLIs, including:
  • Achieving more voltage levels with fewer switches than the traditional delta-connected multilevel inverter topology.
  • Enhanced voltage quality and current waveform.
  • Reduced voltage stress on switches compared to the conventional delta-connected CHB configurations.
    Stresses on the switches are as follows:
    2 V N 3
    where V is the root mean square (RMS) of the line–line grid voltage and N is the number of cascaded H-bridge cells in each phase.
    On the other hand, voltage stresses on the switches of the conventional delta-connected CHB are as follows:
    2 V N
  • The proposed topology ensures uniform current distribution across all switches, with each switch subjected to the same RMS grid current (I); the current stress is 2 I .
In the case of the conventional delta-connected CHB, and in order to increase the output voltage, a grid-side transformer in the conventional delta-connected CHB with a higher voltage ratio may be used. However, the conventional delta-connected CHB is a bulky topology compared to the modified proposed topology. That is, it is required to add grid-side transformers and three current-limiting inductors inside the conventional delta-connected CHB to reduce the circulating current. On the other hand, the proposed topology can eliminate the use of extra grid-side transformers as the intermediate transformers of the proposed topology act to amplify the voltage level (if needed) and, at the same time, eliminate the use of extra intermediate inductors. Moreover, one of the advantages of the higher voltage levels is the reduction in the THD of the grid voltage and grid currents. This indicates that the use of grid-side transformers in the conventional delta-connected CHB while reducing the cascaded H-bridges loses this advantage.
Table 1 provides a comparative evaluation of the proposed topology versus the conventional MLI architectures to generate seven line-to-live voltage levels. The proposed topologies exhibit a reduced switch count compared to the conventional NPC and FC MLIs. The proposed MLI is similar to star-connected CHB MLIs in the number of main switches, number of separated DC sources, and DC link capacitors.
In addition, compared to the conventional delta-connected CHB MLIs, the proposed topology requires a lower number of components to generate the same line–line voltage levels. Moreover, the proposed topology uses three intermediate transformers to accomplish its function. On the other hand, the proposed topology does not require additional line frequency transformers at the grid side as the other topologies do, in which grid-side transformers can be used for voltage amplification and/or for isolation purposes if needed.
In NPC and FC MLIs, a single DC source is used, and multilevel voltages are generated by charging separated DC link capacitors, which may cause a voltage drift if the DC link voltage of the capacitors is not well-maintained. In the proposed topology, the unbalanced voltage problem is eliminated since separated DC sources are used, and, therefore, the proposed topology exhibits inherent voltage balancing capabilities. Moreover, the proposed topology exhibits high modularity compared to other state-of-the-art topologies.

3. Analysis of the Proposed Topology

3.1. Analysis of Voltage Relationships

Applying Kirchhoff’s voltage law (KVL) for the proposed inverter shown in Figure 7 yields the following:
v s A v A Z v Z B v s B = 0
v s B v B X v X C v s C = 0
v s C v C Y v Y A v s A = 0
where v s A ,   v s B , and v s C are the instantaneous phase voltages of the grid and the voltages v Z B ,   v X C , a n d v Y A are voltages of the CHB cells of phases A, B, and C, respectively.
Considering that the coupled transformers’ turn ratios are ( N 1 N 2 ) , Equation (3) can be written as follows:
v A B = N 1 N 2 v C X + v Z B
v B C = N 1 N 2 v A Y + v X C
v C A = N 1 N 2 v B Z + v Y A ,
where v A B , v A B ,   a n d   v A B are the generated instantaneous line–line voltages from the proposed topology and N 1 and N 2 are the turn ratios of the primary and secondary sides of each transformer in the proposed topology.
The root mean square (RMS) values of the voltages across each CHB arm in the proposed topology can be given as follows:
V Z B = N m a V d c 2 0 o
V X C = N m a V d c 2 120 o
V Y A = N m a V d c 2 + 120 o
where V d c is the DC voltage connected to the H-bridge cell, N is the number of cascaded H-bridge cells, and m a is the modulation index.
Assuming that ( N 1 N 2 = 1 ) and substituting Equation (5) into Equation (4), we obtain the following:
v A B = 3 N m a V d c   s i n ( ω t + 30 o )
v B C = 3 N m a V d c   s i n ( ω t 90 o )
v C A = 3 N m a V d c   s i n ( ω t + 150 o )
Equation (6) shows that the proposed topology produces the same line-to-line voltage as the star-connected CHB.

3.2. Analysis of Currents Relationships

On the other hand, the currents flowing through each CHB arm in each phase can be defined as follows:
i 1 i 2 i 3 = i z i x i x i y i y i z ,
where the currents in the primary side of the coupled transformers T x ,   T y   a n d   T z are represented by i x ,   i y ,   a n d   i z , respectively. The currents i 1 ,   i 2 ,   a n d   i 3 are the currents flowing inside the CHB cells of phases AB, BC, and CA, respectively.
Considering that the coupled transformers’ magnetizing inductances are significant, the following is true:
i x + i y + i z = 0
Based on Equations (5) and (6), the current flowing through each transformer is as follows:
i x i y i z = 2 3 I s i n ( ω t + 150 o ) s i n ( ω t + 90 o ) s i n ( ω t 30 o )
Considering that the coupled transformers’ turn ratios are ( N 1 N 2 ) , the output terminal currents can be defined as follows:
i A i B i C = i 3 i x + N 1 N 2 i y i 1 i y + N 1 N 2 i z i 2 i z + N 1 N 2 i x ,
where i A ,   i B ,   a n d   i C are the line currents of phases A, B, and C, respectively.
Considering that ( N 1 N 2 = 1 ) , substituting Equations (9) and (10) into Equation (7), the three-phase grid currents can be defined as follows:
i A i B i C = i 1 i 2 i 3 = 2 I s i n ( ω t ) s i n ( ω t ) 120 o s i n ( ω t + 120 o ) ,
where I is the RMS value of the output current. Equation (11) proves that the output terminal currents and the currents flowing through each CHB arm in the proposed topology are identical.
Moreover, the currents i A C ,   i C B ,   a n d   i B A can be defined as follows:
i A C i C B i B A = i 2 + i C i 1 + i B i 3 + i A = i 1 i 3 i 2 = 2 I sin ω t 180 o sin ω t 60 o sin ω t + 60 o
The phasor diagrams of the voltage and current quantities for the above relationships of the proposed topology are shown in Figure 8.

3.3. Analysis of Power Relationships

From another point of view, the total apparent power of the N H-bridge cells of each phase meets the formulae below:
S c e l l s _ A = V Z B I 1 r m s = N m a V d c 2 I
S c e l l s _ B = V X C I 2 r m s = N m a V d c 2 I
S c e l l s _ C = V Y A I 3 r m s = N m a V d c 2 I ,
where S c e l l s _ A ,   S c e l l s _ B ,   a n d   S c e l l s _ C are the apparent powers of the N H-bridge cells of phases A, B, and C, respectively, and I 1 r m s , I 2 r m s ,   a n d   I 3 r m s are the currents flowing through the CHB cells of phases AB, BC, and CA, respectively.
Additionally, the apparent power of each transformer can be expressed as follows:
S   T x = V X C I x r m s = N m a V d c 6 I
S   T y = V Y A I y r m s = N m a V d c 6 I
S   T z = V Z B I z r m s = N m a V d c 6 I ,
where S T x , S T y , S T z are the apparent powers of the coupled transformers of phases AB, BC, and CA, respectively.
Equation (14) demonstrates that the apparent power of each coupled transformer is 1/√3 of the N H-bridge cells of one phase.
From another point of view, in the case where grid-side transformers are used for the conventional delta-connected CHB, the power rating of each grid-side transformer used with the conventional delta-connected CHB is as follows:
S T r / c o n v . d e l t a = V S A I A = N m a V d c 2 I
where S T r / c o n v . d e l t a is the apparent power rating of the grid-side transformer connected to each phase in the conventional delta-connected CHB, V S A is the grid phase voltage, and I A   is the line grid current.
Comparing Equations (14) and (15) reveals that the ratings of the transformers used in the proposed topology are less that those of the grid-side transformers that may be used in the delta-connected CHB under the same DC link voltage and the same modulation index.
Moreover, the total apparent power ( S T O T ) of the proposed topology can be expressed as follows:
S T O T = 3 V A B I A r m s = 3 N m a V d c 2 I

3.4. Loss Analysis

The proposed topology’s semiconductor device losses fall into three categories: conduction losses (caused by resistance and voltage drop), switching losses (stemming from non-ideal switch operation), and blocking losses (caused by leakage current in the off-state of the IGBT, can normally be neglected). Therefore, semiconductor losses can be expressed as follows [65,66]:
P S e m i C o n d = P C o n d + P S w
where P S e m i C o n d is the semiconductor switch loss, P C o n d   i s   t h e   c o n d u c t i o n   l o s s ,   a n d   P S w is the switching loss.
The conduction losses can be expressed as follows:
P C o n d = P C o n d _ T r a n s + P C o n d _ D i o d e  
where P C o n d _ T r a n s is the conduction loss in the transistor and P C o n d _ D i o d e is the conduction loss in the antiparallel diode.
The conduction losses in Equation (18) can be expressed as follows [65,66]:
P C o n d _ T r a n s = V T r a n s × i t + R T r a n s × i 2 β t
The conduction losses in the antiparallel diode can be expressed as follows [1,2]:
P C o n d _ D i o d e = V D i o d e × i t + R D i o d e × i 2 t ,
where V T r a n s   a n d   V D i o d e signify the forward voltage drops of the transistor and the diode, R T r a n s .   a n d   R D i o d e represent their resistances, β is a transistor-dependent constant, and i t is the current flowing through each semiconductor switch.
P S w = f × J = 1 N _ s w i t c h e s i = 1 N O N , J E n r . O N , J i + i = 1 N O F F , J E n r . O F F , J i ,
where N O N , J and N O F F , J are the numbers of turns on and off of switch J during the fundamental frequency, E n r . O N , J i is the energy loss of switch J during the i t h turn on, and E n r . O F F , J i is the energy loss of switch J during the i t h turn off.
The energy losses during the switch’s ON and OFF states are expressed as follows [65,66]:
E n r _ O N , J = 1 6 V S w i t c h ,     J   I t o n a n d ,     E n r _ O F F , J = 1 6 V S w i t c h ,     J   I   t o f f
where E n r _ O N , J is the turn-on energy loss of switch J , E n r _ O F F , J is the turn-off energy loss of switch J, I represents the current through the switch before turning off, I represents the current through the switch after turning on, and V S w i t c h , J is the voltage of the switch during the off state.
On the other hand, the efficiency of the inverter can be expressed as follows [66]:
E f f i c i e n c y = P o u t P I n = P I n P l o s s e s P I n
where P I n is the input power, P O u t is the output power from the proposed topology, and P l o s s e s is the total power loss in the proposed topology.
The power loss  P l o s s e s can be expressed as follows [66]:
P l o s s e s = P S e m i C o n d + P T r s _ C U + P T r s _ C o r e
where P T r s _ C U is the copper loss of the transformers while P T r s _ C o r e is the transformers’ core loss, which is the hysteresis and eddy current loss. The transformer copper loss can be expressed as follows:
P T r s _ C U = I X 1 2 R X 1 + I X 2 2 R X 2 + I Y 1 2 R Y 1 + I Y 2 2 R Y 2 + I Z 1 2 R Z 1 + I Z 2 2 R Z 2 ,
where I X 1   a n d   I X 2 represent the current flowing through the primary and the secondary windings of the transformer x, respectively, and R X 1   a n d   R X 2 are the resistances of the primary and the secondary windings of transformer x, respectively. The other quantities are for transformers y and z.
As revealed from Equation (9), the RMS values of I X 1 ,   I Y 1 ,   a n d   I Z 1 are the same ( = I 3 ). Substituting this into Equation (25), we obtain the following:
P T r s . C U = I 2 3 R X 1 + R Y 1 + R Z 1 + ( N 1 N 2 ) 2 R X 2 + R Y 2 + R Z 2
From another point of view, efficiency can be calculated as follows:
E f f i c i e n c y = i = 1 N ( V d c , i   I d c ,     i ) d t ( v s A t   i A ( t ) d t + ( v s B t   i B ( t ) d t + ( v s C ( t )   i C ( t ) d t ,
where V d c , i is the DC voltage of each H-bridge cell, I d c , i is the input DC current flowing to each H-bridge cell, v s A t ,   v s A ( t ) , and v s A ( t ) are the instantaneous phase voltages of the grid for phases A, B, and C, respectively, and i A t ,   i B ( t ) , and i C ( t ) are the instantaneous phase currents of the grid.

4. Simulation Results

The simulation model of the proposed modified delta-connected CHB topology was built in SIMULINK software version 2024b. Figure 9 illustrates the utilization of the unipolar phase-shifted pulse-width modulation (PSPWM) to fire the switches in the suggested MLI. The diagram shows that the reference voltages V r e f a , V r e f b , and V r e f c are compared with the phase-shifted carrier waveforms to generate the necessary pulses for the switches in the proposed MLI. The triangular waveform of the H-bridge cell (N) is phase-shifted by 180°/N compared to the triangular waveform of the H-bridge cell (N − 1).
Two simulations were performed to verify the effectiveness of the proposed topology.

4.1. Open-Loop Test Under a Resistive Load

To maintain simplicity, the proposed topology utilized two H-bridge cells for each phase. Each H-bridge cell’s input was coupled to a 40-Volt DC power source. The system parameters used for the simulation are shown in Table 2.
Line voltages were measured between the inverter’s terminals A, B, and C. The modulation index was 0.95. The generated three-phase instantaneous voltages across the primary side of the transformers are shown in Figure 10. As shown, the number of voltage levels generated across each transformer winding is five. On the other hand, the generated voltages v Z B , v X C , and v Y A are seen in Figure 11. Since only two H-bridge cells were utilized per phase, the number of voltage levels generated was five, as illustrated in this figure. Moreover, the generated three-phase line-to-line voltage from the proposed inverter is seen in Figure 12. As depicted in this figure, nine levels were produced. From another point of view, only five levels were produced from the traditional delta-connected CHB MLIs when the same number of H-bridges was utilized (two H-bridges). That is, the number of voltage levels generated by the proposed MLI is higher (nine levels) than that generated by the traditional delta-connected MLIs for the same number of H-bridge cells. Figure 13 depicts three-phase line currents. As shown in this figure, the grid currents were not clean since the load was a purely resistive load. Adding an inductive element to the load acts as a filter and reduces these harmonics. The generated voltage levels were equivalent to the levels generated in case the star-connected CHB is used. In addition, the presence of three transformers helps in amplifying the voltage, if needed.
Moreover, the proposed topology was tested while increasing the turn ratios of the intermediate transformers to amplify the output line–line voltages. Figure 14 shows the performance of the proposed topology when the turn ratios are (1.5:1) at 48 Ω, V d c = 40   V , and m a = 1.15 . Figure 14a shows the generated three-phase voltages, while Figure 14b shows two voltage signals: the generated voltage v Z B (the generated voltages from the CHB of phase AB) and the generated voltage across the primary side of transformer X ( v T x ). As seen in Figure 14b, the generated voltage across the primary side of the transformer X was higher due to a higher turn ratio and resulted in a higher amplitude of the generated line–line voltage.
On the other hand, the performance of the proposed topology was examined under varying modulation indices and under changing leakage inductances of the transformers. Figure 15 shows the THD of the generated voltage ( v A B ) under varying modulation indices. As the modulation index increased, the THD decreased. Moreover, as the leakage inductance increased, the THD decreased.

4.2. Open-Loop Test Under a Resistive–Inductive Load

The proposed MLI was also examined under a resistive–inductive load. Figure 16 shows the generated three-phase line-to-line voltages, while Figure 17 shows the load currents.

4.3. PV–Grid Connection Application

To verify the effectiveness of the proposed topology, it was tested with PV–grid interconnection. For simplicity, two cascaded H-bridge cells were considered for each phase in the proposed topology. Similarly to the star-connected and conventional delta-connected cascaded H-bridge multilevel inverter topologies, each H-bridge cell should be powered by a separated DC source/PV panel. In the proposed topology, and for the PV–grid connection application, one PV module was used for each H-bridge unit. In order to solve the problem of shading of one PV panel, distributed maximum power point tracking (MPPT) is commonly used, in which each PV module is connected to only one DC–DC converter. Table 2 shows the system parameters, while the parameters of the PV module are shown in Table 3.
Figure 18 shows the control scheme. In this control scheme, the “perturb and observe” MPPT algorithm is used for extracting the maximum power point of the PV module using DC–DC isolated Cuk converters. The voltage-oriented technique is used to control the grid current. The outer loop controller is the DC link voltage controller which uses the proportional–integral controller (PI) to keep the DC link voltages of each phase equal so that the output voltage is maintained the same in all the phases in which the DC link voltages are controlled. The inner controller is the current controller in which two PI controllers are used to control the grid currents in the d- and q-axes. The current (Iq) is compared with zero to achieve the unity power factor. The resulting signals from the current controllers are converted into ABC, and then they are used to generate the required pulses that drive the IGBTs of the proposed topology.
The control scheme succeeded in keeping the DC link voltages at the reference voltages (100 V) as illustrated in Figure 19. In this figure, six DC link voltages are shown. DC link voltages V d c 11   a n d   V d c 12 are the DC link voltages of the two H-bridge cells of phase AB. In addition, DC link voltages V d c 21   a n d   V d c 22 are the DC link voltages of the two H-bridge cells of phase BC. Moreover, V d c 31   a n d   V d c 32 are the DC link voltages of the two H-bridge cells of phase CA.
Figure 20a shows the generated three-phase line–line voltages. As seen in this figure, nine voltage levels were generated. In addition, Figure 20b shows the voltages generated by the CHB of phase AB v Z B and the voltage generated across transformer T x . As stated in the analysis, the grid currents coincided with the phase currents passing through each CHB, as revealed in Figure 21. The harmonic spectrum of the grid current i A is revealed in Figure 22. The THD of the grid current i A is 3.44%, which has an acceptable harmonic content of less than 5% as defined by the IEEE standard. The magnitude of the fifth harmonic order was approximately 1%. The magnitude of the other harmonic orders were less than 1%.

5. Experimental Results

The modified MLI’s performance was validated through experimental tests conducted in a laboratory setting using various modulation indices and resistive–inductive loads. A DS1202 MicroLabBox data acquisition system was utilized to obtain data measurements and generate the required switching pulses. Figure 23 reveals the hardware setup of the proposed topology. For simplicity, and to prove the concept of the proposed MLI, two H-bridges were cascaded in each phase. One KACST 245 PV module was connected to the input of each H-bridge cell. All PV modules were identical, and they were installed in the same area. The specifications of the PV modules utilized in the experiment are presented in Table 3. The parameters used in the hardware setup are listed in Table 4.
In order to validate the advantage of the proposed topology, it was tested under open loop control with a resistive–inductive load. The test involved connecting a resistive–inductive load with a series resistance of 48 Ω and an inductance of 77 mH to the A, B, and C terminals of the constructed inverter. Three modulation indices were employed to demonstrate the efficacy of the suggested topology. The performance of the proposed topology at a modulation index ( m a ) of 0.85 is revealed in Figure 24. Figure 24a shows the line-to-line voltages ( v A B   a n d   v B C ) produced from the constructed MLI, the voltage v Z B , and the voltage across the transformer X at m a = 0.85 . As shown in this figure, nine line-to-line voltage levels were generated from the modified delta-connected MLI. The number of voltage levels per arm ( G r e e n   p l o t ,   v Z B ) was five, as shown in Figure 24.
Moreover, the generated voltage across the coupled transformer (Black plot, v T x ) is also shown in Figure 24a. On the other hand, the three-phase grid currents as well as the phase currents of each arm in the modified delta connected CHB are shown in Figure 24b. As shown in this figure, the line currents and the currents passing through the CHB cells coincided, as demonstrated in the analysis.
In order to demonstrate the effectiveness of the constructed MLI, an additional test was conducted at m a = 0.95, as depicted in Figure 25.
Moreover, Figure 26a shows the generated line-to-line voltages, the voltage per arm, and the voltage across the transformer at m a = 1.25, while Figure 26b shows the currents.
As shown in these experimental results, there were nine generated line-to-line voltage levels, which is the advantage of the proposed modified delta-connected CHB MLI. Moreover, the line currents and the currents passing through the CHB cells in each arm coincided.

6. Conclusions

The conventional delta-connected CHB MLIs necessitate a higher number of H-bridges connected in series compared to star-connected MLIs to attain the equivalent line-to-line grid voltage. Consequently, a greater number of switches is unavoidably needed. This paper proposes a modified delta-connected CHB MLI that generates the same number of line-to-line voltage levels as a star-connected CHB for the same number of switches. Three coupled transformers are used in the proposed topology. The rating of each one is 1/√3 of the CHB cells of one phase. These transformers can have another advantage in case it is required to amplify the generated voltage, and it is not necessary to utilize transformers on the grid side. The functionality of the proposed topology is accomplished by simulating it using SIMULINK software. The simulation results showcased the capacity of the proposed topology to produce a higher number of levels. To verify the effective functioning of the suggested configuration, the configuration was constructed in the laboratory, and the produced switching signals were applied to a MicroLabBox data acquisition system, which in turn activated the IGBTs via gate drives. The proposed topology was experimentally tested under a resistive–inductive load with different modulation indices. The simulation and experimental findings are provided to demonstrate the feasibility of the proposed topology.

Funding

Prince Sattam bin Abdulaziz University, project number (PSAU/2024/01/32106).

Data Availability Statement

Data are contained within the article.

Acknowledgments

The authors extend their appreciation to Prince Sattam bin Abdulaziz University for funding this research work through the project number (PSAU/2024/01/32106).

Conflicts of Interest

The author declares no conflicts of interest.

References

  1. Gupta, K.K.; Ranjan, A.; Bhatnagar, P.; Sahu, L.K.; Jain, S. Multilevel inverter topologies with reduced device count: A review. IEEE Trans. Power Electron. 2015, 31, 135–151. [Google Scholar] [CrossRef]
  2. Nabae, A.; Takahashi, I.; Akagi, H. A new neutral-point-clamped PWM inverter. IEEE Trans. Ind. Appl. 1981, 5, 518–523. [Google Scholar] [CrossRef]
  3. Rodriguez, J.; Lai, J.S.; Peng, F.Z. Multilevel inverters: A survey of topologies, controls, and applications. IEEE Trans. Ind. Electron. 2002, 49, 724–738. [Google Scholar] [CrossRef]
  4. Colak, I.; Kabalci, E.; Bayindir, R. Review of multilevel voltage source inverter topologies and control schemes. Energy Convers. Manag. 2011, 52, 1114–1128. [Google Scholar] [CrossRef]
  5. Kincic, S.; Chandra, A.; Babic, S. Multilevel inverter and its limitations when applied as statcom. In Proceedings of the 9th Mediterranean conference on control and automation, Dubrovnik, Croatia, 27–29 June 2001. [Google Scholar]
  6. Daher, S.; Schmid, J.; Antunes, F.L.M. Multilevel inverter topologies for stand-alone PV systems. IEEE Trans. Ind. Electron. 2008, 55, 2703–2712. [Google Scholar] [CrossRef]
  7. Jakkula, S.; Jayaram, N.; Pulavarthi, S.V.K.; Shankar, Y.R.; Rajesh, J. A generalized high gain multilevel inverter for small scale solar photovoltaic applications. IEEE Access 2022, 10, 25175–25189. [Google Scholar] [CrossRef]
  8. Memon, A.J.; Mahar, M.A.; Larik, A.S.; Shaikh, M.M. A comprehensive review of reduced device count multilevel inverters for pv systems. Energies 2023, 16, 5638. [Google Scholar] [CrossRef]
  9. Noman, A.M.; Al-Shamma’A, A.A.; Asef, P.; Alkuhayli, A. Hybrid cascaded MLI development for PV-grid connection applications. IET Power Electron. 2023, 16, 1717–1731. [Google Scholar] [CrossRef]
  10. Noman, A.M.; Alkuhayli, A.; Al-Shamma’a, A.A.; Addoweesh, K.E. Hybrid MLI Topology Using Open-End Windings for Active Power Filter Applications. Energies 2022, 15, 6434. [Google Scholar] [CrossRef]
  11. Yousefizad, S.; Azimi, E.; Nasiri-Zarandi, R.; Hafezi, H. A cascaded multilevel inverter based on new basic units. Int. J. Electron. 2022, 109, 2158–2177. [Google Scholar] [CrossRef]
  12. Seifi, A.; Hosseinpour, M.; Hosseini, S.H. Applications. A novel bidirectional modular multilevel inverter utilizing diode-based bidirectional unit. J. Circuit Theory Appl. 2023, 51, 3226–3245. [Google Scholar] [CrossRef]
  13. Balal, A.; Dinkhah, S.; Shahabi, F.; Herrera, M.; Chuang, Y.L. A review on multilevel inverter topologies. Emerg. Sci. J. 2022, 6, 185–200. [Google Scholar] [CrossRef]
  14. Venkataramanaiah, J.; Suresh, Y.; Panda, A.K. A review on symmetric, asymmetric, hybrid and single DC sources based multilevel inverter topologies. Renew. Sustain. Energy Rev. 2017, 76, 788–812. [Google Scholar] [CrossRef]
  15. Malinowski, M.; Gopakumar, K.; Rodriguez, J.; Perez, M.A. A survey on cascaded multilevel inverters. IEEE Trans. Ind. Electron. 2010, 57, 2197–2206. [Google Scholar] [CrossRef]
  16. Tolbert, L.; Peng, F. Multilevel converters as a utility interface for renewable energy systems. In Proceedings of the IEEE Power Engineering Society Summer Meeting, Seattle, WA, USA, 16–20 July 2000. [Google Scholar]
  17. Mohan, H.M.; Dash, S.K.; Ram, S.K.; Caesarendra, W. Performance assessment of three-phase PV tied NPC multilevel inverter based UPQC. In Proceedings of the International Conference on Intelligent Controller and Computing for Smart Power (ICICCSP), Hyderabad, India, 21–23 July 2022. [Google Scholar]
  18. Kurdkandi, N.V.; Marangalu, M.G.; Hemmati, T.; Mehrizi-Sani, A.; Rahimpour, S.; Babaei, E. Five-level NPC based grid-tied inverter with voltage boosting capability and elimnated leakage current. In Proceedings of the 13th Power Electronics, Drive Systems, and Technologies Conference (PEDSTC), Tehran, Iran, 1–3 February 2022. [Google Scholar]
  19. Salim, C.H. Electronica; Automatica; Series APF based on Five and Seven-level NPC Inverters using Modified PQ Method. Electroteh. Electron. Autom. (EEA) 2023, 71, 22–29. [Google Scholar]
  20. Latran, M.B.; Teke, A. Investigation of multilevel multifunctional grid connected inverter topologies and control strategies used in photovoltaic systems. Renew. Sustain. Energy Rev. 2015, 42, 361–376. [Google Scholar] [CrossRef]
  21. Cheng, H.; Zhao, Z.; Wang, C. A Novel Unidirectional Three-Phase Multilevel Rectifier Composed of Star-Connected Three Single-Phase Topology Based on Five-Level Flying Capacitor DC–DC Converter. IEEE Trans. Ind. Electron. 2022, 70, 5493–5503. [Google Scholar] [CrossRef]
  22. Kampitsis, G.; Batzelis, E.I.; Mitcheson, P.D.; Pal, B.C. A clamping-circuit-based voltage measurement system for high-frequency flying capacitor multilevel inverters. IEEE Trans. Power Electron. 2022, 37, 12301–12315. [Google Scholar] [CrossRef]
  23. Bouamrane, O.; Khalili, T.; Tyass, I.; Rafik, M.; Raihani, A.; Bahati, L.; Benhala, B. Flying capacitors multilevel inverter: Architecture, control and active balancing. In Proceedings of the International Conference on Energy and Green Computing, Meknes, Morocco, 9–10 December 2021. [Google Scholar]
  24. Vishvakarma, R.P.; Singh, S.P.; Shukla, T.N. Multilevel inverters and its control strategies: A comprehensive review. In Proceedings of the 2nd International Conference on Power, Control and Embedded Systems, Allahabad, India, 17–19 December 2012. [Google Scholar]
  25. Rohner, S.; Bernet, S.; Hiller, M.; Sommer, R. Modulation, losses, and semiconductor requirements of modular multilevel converters. IEEE Trans. Ind. Electron. 2009, 57, 2633–2642. [Google Scholar] [CrossRef]
  26. Pamujula, M.; Ohja, A.; Kulkarni, R.D.; Swarnkar, P. Cascaded ‘H’bridge based multilevel inverter topologies: A review. In Proceedings of the International Conference for Emerging Technology (INCET), Belgaum, India, 5–7 June 2020. [Google Scholar]
  27. Dhanamjayulu, C.; Girijaprasanna, T. Experimental Implementation of Cascaded H-Bridge Multilevel Inverter with an Improved Reliability for Solar PV Applications. Int. Trans. Electr. Energy Syst. 2023, 2023, 8794874. [Google Scholar] [CrossRef]
  28. Cao, Y.; Tolbert, L.M. 11-Level cascaded H-bridge grid-tied inverter interface with solar panels. In Proceedings of the Applied Power Electronics Conference and Exposition (APEC), Palm Springs, CA, USA, 21–25 February 2010. [Google Scholar]
  29. Xiao, B.; Hang, L.; Mei, J.; Riley, C.; Tolbert, L.M.; Ozpineci, B. Modular Cascaded H-Bridge Multilevel PV Inverter with Distributed MPPT for Grid-Connected Applications. IEEE Trans. Ind. Appl. 2015, 51, 1722–1731. [Google Scholar] [CrossRef]
  30. Choi, H.; Zhao, W.; Ciobotaru, M.; Agelidis, V.G. Large-scale PV system based on the multiphase isolated dc/dc converter. In Proceedings of the 3rd IEEE International Symposium on Power Electronics for Distributed Generation Systems (PEDG), Aalborg, Denmark, 25–28 June 2012. [Google Scholar]
  31. Rivera, S.; Wu, B.; Kouro, S.; Wang, H.; Zhang, D. Cascaded H-bridge multilevel converter topology and three-phase balance control for large scale photovoltaic systems. In Proceedings of the 3rd IEEE International Symposium on Power Electronics for Distributed Generation Systems (PEDG), Aalborg, Denmark, 25–28 June 2012. [Google Scholar]
  32. Ozdemir, S.; Altin, N.; Sefa, I. Single stage three level grid interactive MPPT inverter for PV systems. Energy Convers. Manag. 2014, 80, 561–572. [Google Scholar] [CrossRef]
  33. Vinayaka, B.C.; Prasad, S.N. Modeling and design of five level cascaded h-bridge multilevel inverter with DC/DC boost converter. Int. J. Eng. Res. Appl. 2014, 4, 50–55. [Google Scholar]
  34. Sivapriya, A.; Kalaiarasi, N. A review on cascaded h-bridge and modular multilevel converter: Topologies, modulation technique and comparative analysis. In Advanced Power Electronics Converters for Future Renewable Energy Systems, 1st ed.; Taylor & Francis Group: London, UK, 2023; pp. 195–222. [Google Scholar]
  35. Nagarjuna, A.; Kumar, D.; Reddy, B.; Udaykiran, M. Fifteen level cascaded H-bridge multilevel inverter fed induction motor. Int. J. Innov. Technol. Explor. Eng. 2019, 8, 640–645. [Google Scholar] [CrossRef]
  36. Rivera, S.; Kouro, S.; Wu, B.; Leon, J.I.; Rodriguez, J.; Franquelo, L.G. Cascaded H-bridge multilevel converter multistring topology for large scale photovoltaic systems. In Proceedings of the IEEE International Symposium on Industrial Electronics (ISIE) 2011, Gdansk, Poland, 27–30 June 2011. [Google Scholar]
  37. Zhao, W.; Choi, H.; Konstantinou, G.; Ciobotaru, M.; Agelidis, V.G. Cascaded H-bridge multilevel converter for large-scale PV grid-integration with isolated DC-DC stage. In Proceedings of the 3rd IEEE International Symposium on Power Electronics for Distributed Generation Systems (PEDG), Aalborg, Denmark, 25–28 June 2012. [Google Scholar]
  38. Villanueva, E.; Correa, P.; Rodriguez, J.; Pacas, M. Control of a single-phase cascaded H-bridge multilevel inverter for grid-connected photovoltaic systems. IEEE Trans. Ind. Electron. 2009, 56, 4399–4406. [Google Scholar] [CrossRef]
  39. Li, J.; He, Y.; Liu, J. Research on the Capability of Star-connected CHB-STATCOM to Compensate the Unbalanced Voltage of Power Grid. IEEE Trans. Power Electron. 2025, 40, 8577–8591. [Google Scholar] [CrossRef]
  40. Tandekar, J.K.; Ojha, A.; Jain, S. Application of CHB-MLI as a Three-Phase Star-Connected Nine-Level Shunt Active Power Filter. In Multilevel Converters, 1st ed.; Ahmad, S., Bakhsh, F.I., Sanjeevikumar, P., Eds.; Wiley: Hoboken, NJ, USA, 2024; pp. 339–360. [Google Scholar]
  41. Marquez, A.; Leon, J.I.; Vazquez, S.; Franquelo, L.G. Advanced control of a multilevel cascaded H-bridge converter for PV applications. In Proceedings of the 40th Annual Conference of the IEEE Industrial Electronics Society, IECON, Dallas, TX, USA, 29 October–1 November 2014. [Google Scholar]
  42. Alexander, S. Development of solar photovoltaic inverter with reduced harmonic distortions suitable for Indian sub-continent. Renew. Sustain. Energy Rev. 2016, 56, 694–704. [Google Scholar] [CrossRef]
  43. Sahoo, S.K.; Bhattacharya, T. Phase-shifted carrier-based synchronized sinusoidal PWM techniques for a cascaded H-bridge multilevel inverter. IEEE Trans. Power Electron. 2017, 33, 513–524. [Google Scholar] [CrossRef]
  44. Govindaraju, C.; Baskaran, K. Efficient sequential switching hybrid-modulation techniques for cascaded multilevel inverters. IEEE Trans. Power Electron. 2011, 26, 1639–1648. [Google Scholar] [CrossRef]
  45. Khemili, F.Z.; Bouhali, O.; Lefouili, M.; Chaib, L.; El-Fergany, A.A.; Agwa, A.M. Design of Cascaded Multilevel Inverter and Enhanced MPPT Method for Large-Scale Photovoltaic System Integration. Sustainability 2023, 15, 9633. [Google Scholar] [CrossRef]
  46. Chang, W.-N.; Liao, C.-H. Design and Implementation of a STATCOM Based on a Multilevel FHB Converter with Delta-Connected Configuration for Unbalanced Load Compensation. Energies 2017, 10, 921. [Google Scholar] [CrossRef]
  47. Yu, Y.; Konstantinou, G.; Townsend, C.D.; Aguilera, R.P.; Agelidis, V.G. Delta-Connected Cascaded H-Bridge Multilevel Converters for Large-Scale Photovoltaic Grid Integration. IEEE Trans. Ind. Electron. 2017, 64, 8877–8886. [Google Scholar] [CrossRef]
  48. Yu, Y.; Konstantinou, G.; Townsend, C.D.; Aguilera, R.P.; Hredzak, B.; Agelidis, V.G. Delta-connected cascaded H-bridge multilevel photovoltaic converters. In Proceedings of the 41st Annual Conference of Industrial Electronics Society, Yokohama, Japan, 9–12 November 2015. [Google Scholar]
  49. Wen, J.; Smedley, K.M. Synthesis of multilevel converters based on single-and/or three-phase converter building blocks. IEEE Trans. Power Electron. 2008, 23, 1247–1256. [Google Scholar] [CrossRef]
  50. Peng, F.Z.; Wang, J. A universal STATCOM with delta-connected cascade multilevel inverter. In Proceedings of the 35th IEEE Power Electronics Specialists Conference, Aachen, Germany, 20–25 June 2004. [Google Scholar]
  51. Zhixing, H.; Fujun, M.; An, L.; Qianming, X.; Yandong, C.; Huagen, X.; Guobin, J. Circulating current derivation and comprehensive compensation of cascaded STATCOM under asymmetrical voltage conditions. IET Gener. Transm. Distrib. 2016, 10, 2924–2932. [Google Scholar] [CrossRef]
  52. Babu, N.S.; Al Hosani, K. A novel DC voltage control for a cascade H-bridge multilevel STATCOM. In Proceedings of the 41st Annual Conference of the IEEE Industrial Electronics Society IECON, Yokohama, Japan, 9–12 November 2015. [Google Scholar]
  53. Jung, J.-J.; Lee, J.-H.; Sul, S.-K.; Son, G.T.; Chung, Y.-H. DC Capacitor Voltage Balancing Control for Delta-Connected Cascaded H-Bridge STATCOM Considering Unbalanced Grid and Load Conditions. IEEE Trans. Power Electron. 2018, 33, 4726–4735. [Google Scholar] [CrossRef]
  54. Padiyar, K.R.; Kulkarni, A.M. Modeling and analysis of FACTS and HVDC controllers. In Dynamics and Control of Electric Transmission and Microgrids, 1st ed.; Padiyar, K.R., Kulkarni, A.M., Eds.; Wiley: Hoboken, NJ, USA, 2019. [Google Scholar]
  55. Akagi, H. Classification, terminology, and application of the modular multilevel cascade converter (MMCC). IEEE Trans. Power Electron. 2011, 26, 3119–3130. [Google Scholar] [CrossRef]
  56. Molinas, M.; Suul, J.A.; Undeland, T. Low voltage ride through of wind farms with cage generators: STATCOM versus SVC. IEEE Trans. Power Electron. 2008, 23, 1104–1117. [Google Scholar] [CrossRef]
  57. Mohammadi, P.H.; Bina, M.T. A transformerless medium-voltage STATCOM topology based on extended modular multilevel converters. IEEE Trans. Power Electron. 2010, 26, 1534–1545. [Google Scholar]
  58. Liang, Y.; Nwankpa, C. A new type of STATCOM based on cascading voltage-source inverters with phase-shifted unipolar SPWM. IEEE Trans. Ind. Appl. 1999, 35, 1118–1123. [Google Scholar] [CrossRef]
  59. Lee, C.; Leung, J.; Hui, S.; Chung, H.-H. Circuit-level comparison of STATCOM technologies. IEEE Trans. Power Electron. 2003, 18, 1084–1092. [Google Scholar] [CrossRef]
  60. Marzo, I.; Sanchez-Ruiz, A.; Barrena, J.A.; Abad, G.; Muguruza, I. Power balancing in cascaded H-bridge and modular multilevel converters under unbalanced operation: A review. IEEE Access 2021, 9, 110525–110543. [Google Scholar] [CrossRef]
  61. Hameed, U.; Sadiq, H.; Khalid, H.A.; Khan, M.U.; Ali, M. Investigation of zero sequence injection method for balancing of multi-level Cascaded-H bridge inverter. In Proceedings of the IEEE International Conference on Computing, Electronic and Electrical Engineering, Quetta, Pakistan, 12–13 November 2018. [Google Scholar]
  62. He, Z.; Ma, F.; Xu, Q.; Chen, Y.; Li, C.; Li, M.; Guerrero, J.M.; Luo, A. Reactive power strategy of cascaded delta-connected STATCOM under asymmetrical voltage conditions. IEEE J. Emerg. Sel. Top. Power Electron. 2017, 5, 784–795. [Google Scholar] [CrossRef]
  63. Wu, P.-H.; Chen, H.-C.; Chang, Y.-T.; Cheng, P.-T. Delta-connected cascaded H-bridge converter application in unbalanced load compensation. IEEE Trans. Ind. Appl. 2016, 53, 1254–1262. [Google Scholar] [CrossRef]
  64. Liu, H.; Tolbert, L.M.; Khomfoi, S.; Ozpineci, B.; Du, Z. Hybrid cascaded multilevel inverter with PWM control method. In Proceedings of the Power Electronics Specialists Conference, Rhodes, Greece, 15–19 June 2008. [Google Scholar]
  65. Kangarlu, M.F.; Babaei, E. A generalized cascaded multilevel inverter using series connection of submultilevel inverters. IEEE Trans. Power Electron. 2012, 28, 625–636. [Google Scholar] [CrossRef]
  66. Gandomi, A.A.; Saeidabadi, S.; Hosseini, S.H.; Babaei, E.; Sabahi, M. Transformer-based inverter with reduced number of switches for renewable energy applications. IET Power Electron. 2015, 8, 1875–1884. [Google Scholar] [CrossRef]
Figure 1. Asymmetric cascaded H-bridge topology.
Figure 1. Asymmetric cascaded H-bridge topology.
Electronics 14 01711 g001
Figure 2. Three-phase three-level NPC MLI.
Figure 2. Three-phase three-level NPC MLI.
Electronics 14 01711 g002
Figure 3. Three-phase three-level FC MLI.
Figure 3. Three-phase three-level FC MLI.
Electronics 14 01711 g003
Figure 4. Star-connected CHB MLI.
Figure 4. Star-connected CHB MLI.
Electronics 14 01711 g004
Figure 5. Delta-connected CHB MLI.
Figure 5. Delta-connected CHB MLI.
Electronics 14 01711 g005
Figure 6. CHB MLI connections: (a) star-connected, (b) conventional delta-connected.
Figure 6. CHB MLI connections: (a) star-connected, (b) conventional delta-connected.
Electronics 14 01711 g006
Figure 7. The proposed modified delta-connected CHB topology.
Figure 7. The proposed modified delta-connected CHB topology.
Electronics 14 01711 g007
Figure 8. The phasor diagrams of the (a) voltages and (b) currents of the proposed topology.
Figure 8. The phasor diagrams of the (a) voltages and (b) currents of the proposed topology.
Electronics 14 01711 g008
Figure 9. Unipolar phase-shifted PWM technique.
Figure 9. Unipolar phase-shifted PWM technique.
Electronics 14 01711 g009
Figure 10. The generated voltages across (a) transformer x, (b) transformer y, and (c) transformer z.
Figure 10. The generated voltages across (a) transformer x, (b) transformer y, and (c) transformer z.
Electronics 14 01711 g010
Figure 11. The generated voltages: (a) v Z B , (b) v X C , and (c) v Y A .
Figure 11. The generated voltages: (a) v Z B , (b) v X C , and (c) v Y A .
Electronics 14 01711 g011
Figure 12. The generated three-phase line-to-line voltages from the proposed MLI under a resistive load (ac).
Figure 12. The generated three-phase line-to-line voltages from the proposed MLI under a resistive load (ac).
Electronics 14 01711 g012
Figure 13. The three-phase grid currents from the proposed MLI under a resistive load.
Figure 13. The three-phase grid currents from the proposed MLI under a resistive load.
Electronics 14 01711 g013
Figure 14. The performance of the proposed topology under the changing transformer’s turn ratio: (a) three-phase line–line voltages; (b) voltages VZB and VTX.
Figure 14. The performance of the proposed topology under the changing transformer’s turn ratio: (a) three-phase line–line voltages; (b) voltages VZB and VTX.
Electronics 14 01711 g014
Figure 15. Effect of the leakage inductance on the THD of ( v A B ) with varying modulation indices.
Figure 15. Effect of the leakage inductance on the THD of ( v A B ) with varying modulation indices.
Electronics 14 01711 g015
Figure 16. The generated three-phase line-to-line voltages from the proposed MLI under a resistive–inductive load (ac).
Figure 16. The generated three-phase line-to-line voltages from the proposed MLI under a resistive–inductive load (ac).
Electronics 14 01711 g016
Figure 17. The three-phase grid currents from the proposed MLI under a resistive–inductive load.
Figure 17. The three-phase grid currents from the proposed MLI under a resistive–inductive load.
Electronics 14 01711 g017
Figure 18. The control scheme. * Reference voltage, Vdc_T total DC link voltages.
Figure 18. The control scheme. * Reference voltage, Vdc_T total DC link voltages.
Electronics 14 01711 g018
Figure 19. The simulated DC link voltages.
Figure 19. The simulated DC link voltages.
Electronics 14 01711 g019
Figure 20. The generated voltages: (a) three-phase line–line voltages; (b) voltages V Z B   a n d   V T x .
Figure 20. The generated voltages: (a) three-phase line–line voltages; (b) voltages V Z B   a n d   V T x .
Electronics 14 01711 g020
Figure 21. The generated currents: (a) three-phase grid currents; (b) the currents flowing inside the CHB cells.
Figure 21. The generated currents: (a) three-phase grid currents; (b) the currents flowing inside the CHB cells.
Electronics 14 01711 g021
Figure 22. The THD of the grid current ( i A ).
Figure 22. The THD of the grid current ( i A ).
Electronics 14 01711 g022
Figure 23. Hardware arrangement of the proposed MLI. (A) Gate drives for the IGBTs; (B) level-shifting circuits; (C) voltage and current sensors; (D) IGBTs and DC link capacitors; (E) MicroLabBox; (F) coupled transformers; (G) photovoltaic modules.
Figure 23. Hardware arrangement of the proposed MLI. (A) Gate drives for the IGBTs; (B) level-shifting circuits; (C) voltage and current sensors; (D) IGBTs and DC link capacitors; (E) MicroLabBox; (F) coupled transformers; (G) photovoltaic modules.
Electronics 14 01711 g023
Figure 24. The performance of the proposed MLI at modulation index m a = 0.85. (a) The experimental generated voltages and (b) the experimental load and the CHB currents [A].
Figure 24. The performance of the proposed MLI at modulation index m a = 0.85. (a) The experimental generated voltages and (b) the experimental load and the CHB currents [A].
Electronics 14 01711 g024
Figure 25. The performance of the proposed MLI at modulation index m a = 0.95. (a) The experimental generated voltages and (b) the experimental load and the CHB currents [A].
Figure 25. The performance of the proposed MLI at modulation index m a = 0.95. (a) The experimental generated voltages and (b) the experimental load and the CHB currents [A].
Electronics 14 01711 g025
Figure 26. The performance of the proposed MLI at modulation index m a = 1.25. (a) The experimental generated voltages and (b) the experimental load and the CHB currents [A].
Figure 26. The performance of the proposed MLI at modulation index m a = 1.25. (a) The experimental generated voltages and (b) the experimental load and the CHB currents [A].
Electronics 14 01711 g026
Table 1. Comparison with some prior state-of-the-art MLI topologies.
Table 1. Comparison with some prior state-of-the-art MLI topologies.
TopologyNPCFCCHB
(Star)
CHB
(Delta)
Proposed
Topology
Main switches2424244824
Clamping diodes360000
Flying capacitors018000
Dc link capacitors446126
Intermediate inductors00030
Intermediate transformers00003
DC sources116126
ModularityNoNoYesYesYes
Inherent voltage balancing capabilityNoNoYesYesYes
Required grid-side transformer
(if necessary)
YesYesYesYesNo
Table 2. Simulation system’s parameters.
Table 2. Simulation system’s parameters.
Load resistance and inductance (for the R and L testing)48 Ω, 77 mH
DC input voltage (for the R and L testing)40 V
RMS grid voltage120 V
Grid interface inductance2.5 mH
Fundamental frequency 60 Hz
Switching   frequency ,   f s 900 Hz
Table 3. KACST 245 PV module parameters.
Table 3. KACST 245 PV module parameters.
Maximum power (Pmax)245 W
Maximum power voltage (Vmax)28.8 V
Maximum power current (Imax)8.5 A
Open-circuit voltage (Voc)31.5 V
Short-circuit current (Isc)9.5 A
Table 4. Experimental system’s parameters.
Table 4. Experimental system’s parameters.
Load resistance48 Ω
Load inductance77 mH
Inverter s   switching   frequency ,   f s 900 Hz
Three coupled transformersPart No. 810.1201
Each: 230 V, 1.5 KVA
IGBTsPart No. SKM75GB12V
IGBT drivesPart No. SKYPER 32 R
PV modulesPart No. KACST 245
Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content.

Share and Cite

MDPI and ACS Style

Noman, A.M. A Novel Modified Delta-Connected CHB Multilevel Inverter with Improved Line–Line Voltage Levels. Electronics 2025, 14, 1711. https://doi.org/10.3390/electronics14091711

AMA Style

Noman AM. A Novel Modified Delta-Connected CHB Multilevel Inverter with Improved Line–Line Voltage Levels. Electronics. 2025; 14(9):1711. https://doi.org/10.3390/electronics14091711

Chicago/Turabian Style

Noman, Abdullah M. 2025. "A Novel Modified Delta-Connected CHB Multilevel Inverter with Improved Line–Line Voltage Levels" Electronics 14, no. 9: 1711. https://doi.org/10.3390/electronics14091711

APA Style

Noman, A. M. (2025). A Novel Modified Delta-Connected CHB Multilevel Inverter with Improved Line–Line Voltage Levels. Electronics, 14(9), 1711. https://doi.org/10.3390/electronics14091711

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop