TSC-SIG: A Novel Method Based on the CPU Timestamp Counter with POSIX Signals for Efficient Memory Reclamation
Abstract
:1. Introduction
2. Related Work
2.1. Unawareness of Reclamation
2.2. Awareness of Reclamation
3. Materials and Methods
3.1. System Model and Assumptions
3.2. TSC-SIG
Algorithm 1 Overview of pseudocode for TSC-SIG |
Algorithm 2 Applying TSC-SIG to Harris List [35] |
3.3. Correctness
4. Results and Discussion
5. Conclusions
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
References
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Zhang, C.; Yi, Z.; Zhu, X. TSC-SIG: A Novel Method Based on the CPU Timestamp Counter with POSIX Signals for Efficient Memory Reclamation. Electronics 2025, 14, 1371. https://doi.org/10.3390/electronics14071371
Zhang C, Yi Z, Zhu X. TSC-SIG: A Novel Method Based on the CPU Timestamp Counter with POSIX Signals for Efficient Memory Reclamation. Electronics. 2025; 14(7):1371. https://doi.org/10.3390/electronics14071371
Chicago/Turabian StyleZhang, Chen, Zhengming Yi, and Xinghui Zhu. 2025. "TSC-SIG: A Novel Method Based on the CPU Timestamp Counter with POSIX Signals for Efficient Memory Reclamation" Electronics 14, no. 7: 1371. https://doi.org/10.3390/electronics14071371
APA StyleZhang, C., Yi, Z., & Zhu, X. (2025). TSC-SIG: A Novel Method Based on the CPU Timestamp Counter with POSIX Signals for Efficient Memory Reclamation. Electronics, 14(7), 1371. https://doi.org/10.3390/electronics14071371