Investigation of a Physical Model for the Reverse Recovery Characteristics of PT-PIN FRD with a Buffer Layer

Abstract

As application conditions become increasingly demanding and usage becomes more aggressive, the performance of traditional insulated gate bipolar transistor (IGBT) and fast recovery diode (FRD) systems can no longer meet the required specifications. In these systems, FRDs are required to carry load current and allow current to return from the load to the IGBTs. Consequently, the reverse recovery performance of the FRDs significantly restricts the overall efficiency of the system. Therefore, how to predict the reverse recovery characteristics of the FRDs with greater precision has attracted considerable attention. In this context, this paper presents an in-depth investigation of the high-level injection carrier distribution and reverse recovery characteristics of punchthrough P-I-N (PT-PIN) FRD with a buffer layer. Specifically, the research explores the physical properties of the materials, doping concentrations, and the geometric structure of the devices. Furthermore, it takes into account the complex interactions among carrier recombination, diffusion, and drift, leading to the development of a model that delineates the spatial distribution of carriers and their influence on current conduction. Building upon the traditional step-wise analysis method, subsequently, the temporal aspects of the FRDs reverse recovery process were further segmented. Utilizing the derived carrier distribution model, a reverse recovery analytical model was constructed. The model was validated using a 1200 V, 100 A IGBT with 1200 V, 60 A FRD configured in a reverse parallel arrangement, which demonstrated a 5% improvement in prediction accuracy of V_R compared with previous models that employed the lumped charge method. Finally, a range of experiments with varying R_G, V_CC and I_F confirmed the broad applicability of this analytical model.

1. Introduction

In recent years, in power electronic circuits, IGBTs and FRDs are commonly used in conjunction with inductive loads to conduct double pulse tests. During the turn-on process of the IGBT, it is necessary for the FRD to carry the load current and allow the current to return from the load to the IGBT, which involves the reverse recovery characteristics of the FRD [1,2]. During this phase, the transition of voltage applied to the anode of FRD from a positive to a negative state results in a gradual decline of the current traversing the diode, which decreases at a steady rate. The reduction in current persists until all charges within N− drift are completely discharged, resulting in the establishment of a depletion region that enables the PN junction to endure the associated reverse voltage. The stored charge leads to a notable peak in reverse recovery current (I_RR), which subsequently decreases gradually to zero. This phenomenon characterizes the reverse recovery process of the FRD.

In the field of semiconductor technology, the modeling methods for PIN diodes are contingent upon their applications and the specific requirements of their characteristics. These methods can primarily be categorized into four types: behavioral models, numerical models, physical models, and hybrid models [3,4,5]. The transient behavior of PN junction diodes has been proposed to be accurately predicted using a simple piecewise linear model, which consists of a linear resistor and a linear capacitor. The precision of this model has been validated through both simulations and experimental findings, with a notable strength in its capability to analyze intricate and chaotic nonlinear behaviors in series resonant converters, as well as in various real-world electronic circuits [5]. Nevertheless, its limitations are also evident; behavioral models typically focus on the macroscopic performance of devices. Although they exhibit faster algorithm speeds in specific applications, they fail to provide in-depth analysis and capture the internal carrier characteristics of the devices. Subsequently, a charge-controlled numerical model for PIN-FRDs was proposed, taking into account the additional contact layer that stores charge. This portion of stored charge significantly influences the forward steady state and the turn-off transients (switching time and conversion loss) [6]. The numerical model demonstrates exceptional accuracy, capable of simulating the current–voltage characteristics of devices and their responses to temperature variations through numerical methods. However, obtaining critical structural parameters from manufacturers is necessary to ensure the model’s accuracy and effectiveness [7].

In contrast, physical models are grounded in the principles of quantum mechanics and solid-state physics, revealing the behavioral patterns of charge carriers within semiconductor materials. Such models are capable of accurately describing the operational characteristics of PIN diodes across various operating states, encompassing a broad range of attributes from static to dynamic and from steady-state to transient conditions while also capturing variations in the internal charge distribution of the devices [8,9,10,11]. A SPICE circuit model for diodes has been introduced, incorporating factors such as recombination at the emitter in the heavily doped terminal region, conductivity modulation within the base region, and the effects of moving boundaries throughout the reverse recovery phase. The results indicate that both quasi-static models and lumped charge models can be approximated using low-order matrix matching, while higher-order solutions yield new, more accurate models characterized by good convergence and rapid simulation times [8]. Subsequently, the physical model for high-voltage fast recovery diodes was refined. This model achieves an optimal balance between reverse recovery time and forward voltage drop by integrating techniques for lifetime management and reductions in emitter efficiency. Additionally, research has shown that reducing the number of excess charge carriers stored in N− drift results in softer characteristics, which can be achieved with lower doping levels [9]. In recent years, a refined thermal–electrical model for power diodes has been introduced, grounded in the numerical solution of the bipolar diffusion equation (ADE), which considers significant localized physical phenomena. This model effectively monitors both electrical and thermal effects, including the self-heating of the device during its operational phase [10]. Subsequently, the lumped charge method for buffered diodes was adjusted to investigate the impact of the buffer layer as well as techniques for controlling carrier lifetime. The relationship between carrier lifetime and the injected charge was examined, resulting in the formulation of a lumped charge model specifically for carrier lifetime. This model integrates supplementary temperature functions for the physical parameters to derive both its static and transient thermal characteristics, which were subsequently implemented within the circuit simulation platform PSPICE [11].

The hybrid model integrates the advantages of the aforementioned various models, enhancing the overall performance through appropriate synergistic interactions and data fitting. This approach provides a more flexible solution for the modeling and simulation of complex circuits. The issues of short reverse recovery in PIN diodes within typical power conversion circuits were investigated under different initial current conditions. By establishing boundary connections during the transition phases of conduction and cutoff, a hybrid model for the peak reverse recovery voltage of diodes under short-duration conditions was ultimately developed. This model combines physical and behavioral aspects with model parameters extracted through measurement and circuit extraction methods, thereby reducing complexity [12]. However, it is noteworthy that most current research still relies on traditional PIN-FRD models, with relatively little focus on FRD devices featuring a punchthrough buffer layer. Although the lumped charge method has predicted reverse recovery characteristics with considerable accuracy, the current research approaches exhibit ambiguity regarding the temporal delineation, and the interactions of carrier recombination, diffusion, and drift within the lumped charge method remain inadequately articulated. The large-injection distribution model and reverse recovery analytical model proposed in this study accurately characterize the reverse recovery behavior of punchthrough P-I-N (PT-PIN) FRD with a buffer layer.

The rest of this paper is organized as follows: Section 2 will present a comprehensive derivation of the carrier distribution in fast recovery diodes (FRDs) under conditions of significant injection. Section 3 will derive the reverse recovery process through a stepping analysis method based on the established carrier distribution. Section 4 will describe the experimental testing platform that was constructed, as well as the physical parameters of the devices. Section 5 will conduct a comparative validation of traditional models, analytical models, and experimental results, as well as assess the applicability of the analytical model under varying testing resistance conditions. Finally, Section 5 concludes the paper.

2. Analytical Model of Carrier Distribution in FRDs Under the High-Level Injection Conditions

Table 1. Physical meaning of the parameters.

Parameters	Physical Meaning
PN	Concentration of majority carriers in the P-region
P0	Equilibrium concentration of majority carriers in the P-region
q	Electronic charge
Va	Diode junction voltage
k	Boltzmann constant
T	Absolute temperature
n(x)	Concentration of electrons
p(x)	Concentration of holes
ND	Doping concentration
τHL	Carrier lifetime
D	Diffusion coefficient
μ	Mobility
La	Diffusion length
J	Current density
JT/JF	Initial current density
W(2d)	Width of the N− drift
τi	Initial carrier lifetime
ϕ	Total number of electrons per unit area
K	Energy of the electrons that induce lattice damage
na	Average carrier concentration
Q	Charge extracted during the reverse recovery process
b	Location of the average carrier concentration
t1	Moment at which IF first returns to 0
a	dI/dt
t2	Moment at which VR begins to increase from zero
t3	Moment at which depletion region reaches the left boundary of the buffer layer
t4	Moment at which depletion region extends within the buffer layer
E	Electric field strength
ε	Dielectric constant
Vsat,p	Holes drift at a saturation velocity
WSC	Depletion region width
IRR	Peak current
L	Distance from center of the undepleted region to edge

below elucidates the physical significance of the parameters employed in this study.

2.1. Analytical Model of Carrier Distribution in the Conventional PIN-FRD Suspended Wire Structure

In the moment preceding reverse recovery, the FRD is in a conductive state under large injection conditions. To enable the subsequent derivation of the analytical model, it is crucial to first establish the carrier distribution within the FRD. Only with a lighter doping concentration in N− drift can FRD effectively endure high reverse bias voltage levels. During the process of forward conduction, the concentration of minority carriers increases with the rising voltage drop, in accordance with the “junction law” (Shockley boundary condition), as expressed by the following equation [13]:

$$p_N(0)=p_{0N}{e}^{q{V}_a/kT}$$

(1)

Eventually, the intrinsic doping concentration in N− drift is characterized by a value lower than that of the minority carrier concentration, denoted as N_D. This occurrence is termed heavy injection. Immediately prior to the turn-off of the FRD, the device operates under conditions of heavy injection, where the requirement for charge neutrality stipulates that the electron concentration n_(x) matches the hole concentration p_(x):

$$n(x)=p(x)$$

(2)

The distribution of carrier concentrations n_(x) and p_(x) within N− drift can be derived by solving the continuity equations [12]:

$${\displaystyle \frac{𝜕n}{𝜕t}}=-{\displaystyle \frac{n}{{\tau }_{HL}}}+D_n{\displaystyle \frac{{𝜕}^{2}n}{𝜕x^2}}+{\mu }_n{\displaystyle \frac{𝜕}{𝜕x}}(nE)$$

(3)

$${\displaystyle \frac{𝜕p}{𝜕t}}=-{\displaystyle \frac{p}{{\tau }_{HL}}}+D_p{\displaystyle \frac{{𝜕}^{2}p}{𝜕x^2}}-{\mu }_p{\displaystyle \frac{𝜕}{𝜕x}}(pE)$$

(4)

In the equations, D represents the diffusion coefficients, respectively, while τ_HL denotes the charge carrier’s lifetime. By multiplying Equations (3) and (4), the results can be combined to yield the following:

$${\displaystyle \frac{𝜕n}{𝜕t}}=-{\displaystyle \frac{n}{{\tau }_{HL}}}+\left({\displaystyle \frac{{\mu }_{p}p{D}_n+{\mu }_{n}n{D}_p}{{\mu }_{p}p+{\mu }_{n}n}}\right){\displaystyle \frac{{𝜕}^{2}n}{𝜕x^2}}$$

(5)

In deriving the aforementioned expression, it is assumed that the current generated by carrier diffusion can be considered negligible in comparison to the carriers extracted by the electric field. The relationship between the diffusion coefficient and mobility can be obtained through the Einstein relation:

$$D={\displaystyle \frac{kT}{q}}\mu$$

(6)

According to the Formula (2), when the electron and hole carrier concentrations are equal, the steady-state condition allows the equation to be expressed as follows:

$${\displaystyle \frac{𝜕n}{𝜕t}}=0=-{\displaystyle \frac{n}{{\tau }_{HL}}}+D_a{\displaystyle \frac{{𝜕}^{2}n}{𝜕x^2}}$$

(7)

In the equation, D_a represents the bipolar diffusion coefficient, which can be expressed in terms of the charge neutrality condition as follows:

$$D_a={\displaystyle \frac{p+n}{\frac{p}{D_n}+\frac{n}{D_p}}}={\displaystyle \frac{2D_n{D}_p}{D_n+D_p}}$$

(8)

The general solution for carrier concentration can be computed from the Equation (7):

$$n(x)=Acosh({\displaystyle \frac{x}{L_a}})+Bsinh({\displaystyle \frac{x}{L_a}})$$

(9)

In this context, the constants A and B are established based on the boundary conditions relevant to the N− drift. L_a can be expressed by the following formula:

$$L_a=\sqrt{D_a{\tau }_{HL}}$$

(10)

The right boundary is delineated at the junction between N− drift and N+ cathode, where the current is conducted by electron transport:

$$\begin{array}{l}{J}_T=J_n(+d)\\ J_p(+d)=0\end{array}$$

(11)

Similarly, the left boundary is defined at the junction between N− drift and P+ anode, where the current is facilitated by hole transport:

$$\begin{array}{l}{J}_T=J_p(-d)\\ J_n(-d)=0\end{array}$$

(12)

Utilizing Equation (11), the hole current can be expressed as follows:

$$J_p(+d)=q{\mu }_{p}p(+d)E(+d)-q{D}_p{({\displaystyle \frac{dp}{dx}})}_{x=+d}=0$$

(13)

By combining the Equation (2) with the Einstein relation, the following expression can be obtained:

$$E(+d)={\displaystyle \frac{kT}{qn(+d)}}{({\displaystyle \frac{dn}{dx}})}_{x=+d}$$

(14)

The equation describes the total current generated by electron transport at this boundary and can be expressed as

$$J_T=q{\mu }_{n}n(+d)E(+d)+q{D}_n{({\displaystyle \frac{dn}{dx}})}_{x=+d}=0$$

(15)

By utilizing the electric field E(+d) in the Equation (14), it can be concluded that

$$J_T=2q{D}_n{({\displaystyle \frac{dn}{dx}})}_{x=+d}$$

(16)

Similarly, it can be derived that

$$J_T=2q{D}_p{({\displaystyle \frac{dn}{dx}})}_{x=-d}$$

(17)

By applying the aforementioned boundary conditions (16) and (17), the constants A and B in the Equation (9) can be determined, resulting in the following:

$$n(x)=p(x)={\displaystyle \frac{{\tau }_{HL}{J}_T}{2q{L}_a}}[{\displaystyle \frac{cosh(\frac{x}{L_a})}{sinh(\frac{d}{L_a})}}-{\displaystyle \frac{sinh(\frac{x}{L_a})}{2cosh(\frac{d}{L_a})}}]$$

(18)

Equation (18) describes the charge carrier concentration distribution of a catenary structure, as illustrated in Figure 1.

2.2. Analytical Model of Carrier Distribution in the Punchthrough P-I-N (PT-PIN) FRD with a Buffer Layer with a Suspended Wire Structure

Indeed, the presence of a buffer layer leads to alterations in the internal carrier distribution. The introduction of the buffer layer facilitates a stepwise transition from N− drift to N+ cathode. Carrier distribution within the buffer layer FRD can be represented using a piecewise function, with the thickness W that terminates at N− drift serving as the delineation point. The first segment is represented using a conventional PIN-FRD structure, while the subsequent segment, which spans from the buffer layer to the N+ cathode, continues to adhere to the general solution for carrier distribution, as described by the Equation (9). At this stage, it can be expressed as

$$n_2(x)=A_{2}cosh({\displaystyle \frac{x}{L_{a2}}})+B_{2}sinh({\displaystyle \frac{x}{L_{a2}}})$$

(19)

In the equation, L_a2 denotes the bipolar diffusion length specific to the buffer layer. At the junction between the buffer layer and N+ cathode, the total current is wholly carried by electron transport, thus fulfilling the right boundary condition (16).

The left boundary condition is defined by the carrier concentration in N− drift at the position +W:

$$n(+W)=p(+W)={\displaystyle \frac{{\tau }_{HL}{J}_T}{2q{L}_a}}[{\displaystyle \frac{cosh(\frac{+W}{L_{a1}})}{sinh(\frac{d}{L_{a1}})}}-{\displaystyle \frac{sinh(\frac{+W}{L_{a1}})}{2cosh(\frac{d}{L_{a1}})}}]$$

(20)

By substituting the Equation (19), the left boundary condition is obtained through the following solution:

$$A_{2}cosh({\displaystyle \frac{+W}{L_{a2}}})+B_{2}sinh({\displaystyle \frac{+W}{L_{a2}}})={\displaystyle \frac{{\tau }_{HL}{J}_T}{2q{L}_{a1}}}[{\displaystyle \frac{cosh(\frac{+W}{L_{a1}})}{sinh(\frac{d}{L_{a1}})}}-{\displaystyle \frac{sinh(\frac{+W}{L_{a1}})}{2cosh(\frac{d}{L_{a1}})}}]$$

(21)

By simultaneously applying the conditions (16) for the right boundary, the constants A₂ and B₂ in the Equation (19) can be derived, leading to the determination of the carrier distribution from the buffer layer to the N+ cathode.

$$\begin{array}{l}{n}_2(x)=p_2(x)=[{\displaystyle \frac{n(+W)cosh(\frac{d}{L_{a2}})-\frac{L_{a2}{J}_{T}sinh(\frac{+W}{L_{a2}})}{2q{D}_n}}{cosh(\frac{+W}{L_{a2}})cosh(\frac{d}{L_{a2}})-sinh(\frac{+W}{L_{a2}})sinh(\frac{d}{L_{a2}})}}]cosh({\displaystyle \frac{x}{L_{a2}}})+\\ [{\displaystyle \frac{n(+W)sinh(\frac{d}{L_{a2}})-\frac{L_{a2}{J}_{T}cosh(\frac{+W}{L_{a2}})}{2q{D}_n}}{sinh(\frac{+W}{L_{a2}})sinh(\frac{d}{L_{a2}})-cosh(\frac{+W}{L_{a2}})cosh(\frac{d}{L_{a2}})}}]sinh({\displaystyle \frac{x}{L_{a2}}})\end{array}$$

(22)

Let

$$\alpha ={\displaystyle \frac{n(+W)cosh(\frac{d}{L_{a2}})-\frac{L_{a2}{J}_{T}sinh(\frac{+W}{L_{a2}})}{2q{D}_n}}{cosh(\frac{+W}{L_{a2}})cosh(\frac{d}{L_{a2}})-sinh(\frac{+W}{L_{a2}})sinh(\frac{d}{L_{a2}})}}$$

(23)

$$\beta ={\displaystyle \frac{n(+W)sinh(\frac{d}{L_{a2}})-\frac{L_{a2}{J}_{T}cosh(\frac{+W}{L_{a2}})}{2q{D}_n}}{sinh(\frac{+W}{L_{a2}})sinh(\frac{d}{L_{a2}})-cosh(\frac{+W}{L_{a2}})cosh(\frac{d}{L_{a2}})}}$$

(24)

In fact, the carrier lifetime following electron irradiation is determined by Equation (25):

$${\displaystyle \frac{1}{{\tau }_{HL}}}={\displaystyle \frac{1}{{\tau }_i}}+K\phi$$

(25)

Consequently, due to the differing bipolar diffusion coefficients between N− drift and buffer layer, it follows that

$$n(x)=\left\{\begin{array}{cc}{\displaystyle \frac{{\tau }_{HL1}{J}_T}{2q{L}_a}}[{\displaystyle \frac{cosh(\frac{x}{L_{a1}})}{sinh(\frac{d}{L_{a1}})}}-{\displaystyle \frac{sinh(\frac{x}{L_{a1}})}{cosh(\frac{d}{L_{a1}})}}]\hfill & \hfill (x<+W)\\ \alpha cosh({\displaystyle \frac{x}{L_{a2}}})+\beta sinh({\displaystyle \frac{x}{L_{a2}}})\hfill & \hfill (x>+W)\end{array}\right\}$$

(26)

Equation (26) expresses a carrier distribution model for the PT-PIN FRD with a buffer layer, as illustrated in Figure 2.

2.3. Establishment of an Analytical Model for the Reverse Recovery Characteristics of PT-PIN FRD with a Buffer Layer

The average carrier concentration introduced into N− drift declines as carrier lifetime shortens, a correlation that can be established through charge control theory. Under steady-state conditions, if recombination processes occurring within the terminal region are disregarded, the current passing through the FRD is linked to the ongoing recombination of electrons and holes within N− drift. Therefore

$$J_T={\displaystyle \underset{-d}{\overset{+d}{\int }}qRdx}$$

(27)

where R denotes the recombination rate, expressed by the following equation:

$$R={\displaystyle \frac{n(x)}{{\tau }_{HL}}}$$

(28)

By utilizing the average carrier concentration in N− drift, denoted as n_a, Equations (27) and (28) can be simultaneously solved to yield the following:

$$n_a={\displaystyle \frac{J_T{\tau }_{HL}}{2qd}}$$

(29)

It is assumed that the concentration of carriers within N− drift can be linearized. With a constant dI_C/dt, an analytical model can be developed to analyze the characteristics of the FRD. This methodology was originally referred to as the stepwise recovery process. As depicted in Figure 3, the distribution of carrier concentrations established during the conducting state can be approximated by the linear variation between the average concentration n_(−d) at the midpoint of the drift region x = 0 and the average carrier concentration n_a at x = b [14,15,16]:

$$n(-d)={\displaystyle \frac{{\tau }_{HL1}{J}_F}{2q{L}_{a1}}}[{\displaystyle \frac{cosh(\frac{-d}{L_{a1}})}{sinh(\frac{d}{L_{a1}})}}-{\displaystyle \frac{sinh(\frac{-d}{L_{a1}})}{2cosh(\frac{d}{L_{a1}})}}]$$

(30)

where J_F represents the forward current.

This study integrates the structure of the FRD with its reverse recovery waveform. A typical PT-PIN FRD with a buffer layer structure [17,18], along with a standard reverse recovery waveform, is presented below in Figure 4.

During the early stage of reverse recovery, the current density of FRD shifts from the forward current J_F to 0 at time t₁. As illustrated in Figure 3, the distance b can be ascertained by concurrently solving for the charge Q₁ that is extracted during the initial phase alongside the current. At the end of this phase, specifically at time t₁, the carrier distribution becomes homogeneous owing to the lack of current. At this stage, the variation in charge can be represented by the region designated as Q₁ in Figure 3.

$$Q_1={\displaystyle \frac{qb}{2}}[n(-d)-n_a]$$

(31)

This charge is related to current during reverse recovery from t = t₀ = 0 to t = t₁:

$$Q_1={\displaystyle \underset{t_0}{\overset{t_1}{\int }}J(t)dt=}{\displaystyle \underset{t_0}{\overset{t_1}{\int }}(J_F-at)dt=}{J}_F{t}_1-{\displaystyle \frac{a{t}^2}{2}}$$

(32)

In the equation, a denotes a constant dI_C/dt. The moment at which the current reaches zero, denoted as t₁, can be expressed by the following equation:

$$t_1={\displaystyle \frac{J_F}{a}}$$

(33)

By simultaneously solving Equations (30)–(33), the following result is obtained [17]:

$$b={\displaystyle \frac{2d{L}_{a1}{J}_F}{a{\tau }_{HL1}(Md-L_{a1})}}$$

(34)

where

$$M=[{\displaystyle \frac{cosh(\frac{-d}{L_{a1}})}{sinh(\frac{d}{L_{a1}})}}-{\displaystyle \frac{sinh(\frac{-d}{L_{a1}})}{2cosh(\frac{d}{L_{a1}})}}]$$

(35)

The second phase begins when the current becomes 0 at t₁ and continues until t₂, when the p+/n junction begins to endure reverse bias voltage. Figure 3 depicts that at t₂, the distribution of carrier concentration ranges from zero at the junction located at x = 0 to n_a at a distance b away from the junction. Subsequent to t₂, the carrier concentration at a certain distance from the p+/n junction approaches zero, resulting in the formation of a depletion region at the p+/n junction. The moment t₂ can be determined by analyzing the charge extracted from t = t₁ to t = t₂. The area marked as Q₂ in Figure 3 describes the charge extracted during this interval. The area of this region is given by the following equation:

$$Q_2={\displaystyle \frac{q{n}_{a}b}{2}}$$

(36)

This charge is related to the current from t = t₀ to t = t₁:

$$Q_2={\displaystyle \underset{t_1}{\overset{t_2}{\int }}J(t)dt=}{\displaystyle \underset{t_1}{\overset{t_2}{\int }}(\left|J_F-at\right|)dt=}[-J_F+{\displaystyle \frac{a}{2}}(t_2+t_1)](t_2-t_1)$$

(37)

By simultaneously solving Equations (36) and (37) and utilizing Formula (29) for n_a along with Formula (34) for the distance b, we obtained the following [18]:

$$t_2={\displaystyle \frac{J_F}{a}}(\sqrt{{\displaystyle \frac{L_{a1}}{Md-L_{a1}}}}+1)$$

(38)

In the third phase, the voltage across FRD begins to increase continuously. This increase requires the development of a space charge region (SCR) W_SC(t) at the P+/N junction. Figure 3 illustrates the progressive extension of SCR over time, accomplished through the additional extraction of charge that is stored in N− drift, leading to a sustained rise in reverse current following the moment t₂. Assuming that the current during the extraction of stored charge remains approximately constant, an analytical model can be employed to analyze the increase in reverse bias across the FRD terminals. After the time t₂, the p+/n junction is subjected to reverse bias, and the variation in charge is illustrated by the region designated as Q₃ in the figure. The area of this region is defined by the following equation:

$$Q_3=q{n}_a{W}_{SC}(t)$$

(39)

This charge is associated with the current from t₂ to t:

$$Q_3={\displaystyle \underset{t_2}{\overset{t}{\int }}J(t)dt=}{\displaystyle \underset{t_2}{\overset{t}{\int }}(\left|J_F-at\right|)dt=}-J_F(t-t_2)+{\displaystyle \frac{a}{2}}(t^2-t_2^2)$$

(40)

The relationship established in conjunction with Q₃ indicates that the extension of the SCR is a function of time.

$$W_{SC}(t)={\displaystyle \frac{a}{2q{n}_a}}(t^2-t_2^2)-{\displaystyle \frac{J_F}{q{n}_a}}(t-t_2)$$

(41)

The voltage experienced by SCR can be derived from the solution of Poisson’s equation.

$${\displaystyle \frac{d^{2}V}{d{x}^2}}=-{\displaystyle \frac{dE}{dx}}=-{\displaystyle \frac{Q(x)}{{\epsilon }_S}}$$

(42)

In this context, Q(x) denotes the charge within SCR. During reverse recovery, the significant reverse current supplies additional charge to the depletion region. Due to the significant electric field present, it can be assumed that these holes drift at a saturation velocity, denoted as (V_sat, p). The concentration of holes within SCR is linked to the current density J_R through the following relationship:

$$p(t)={\displaystyle \frac{J_R(t)}{q{V}_{sat,p}}}={\displaystyle \frac{at-J_F}{q{V}_{sat,p}}}$$

(43)

Thus, the voltage across SCR is expressed by the following equation:

$$V_R(t)={\displaystyle \frac{q[N_D+p(t)]}{2{\epsilon }_S}}{[W_{SC}(t)]}^2$$

(44)

In conjunction with Equation (44) describing the extension of SCR, the aforementioned expression illustrates that the voltage across the FRD experiences a rapid increase after the time t₂. It is important to note that the endpoint of the third phase varies for different FRD structures. For the conventional PIN-FRD, the third phase concludes when the reverse bias voltage across the FRD equals the applied supply voltage. However, in the case of the PT-PIN FRD with a buffer layer, which is the focus of this study, the third phase ends when the depletion region extends to the N− drift region, at which point the depletion region reaches the left boundary of the buffer layer. As shown in Figure 5, the electric field distribution when the depletion region contacts the buffer layer can be obtained by solving Poisson’s equation.

$${\displaystyle \frac{E_1}{W_{B1}}}={\displaystyle \frac{q{N}_{D1}}{{\epsilon }_S}}$$

(45)

At this point, the voltage across the device can be determined by integrating the area under the curve.

$$V={\displaystyle \underset{0}{\overset{W_{B1}}{\int }}E(t)}dt={\displaystyle \frac{E_1{W}_{B1}}{2}}$$

(46)

Since the concentration of free-moving charge carriers within the buffer layer is significantly lower than that in N− drift, the concentration of free-moving charge carriers in the buffer layer can be neglected. Consequently, when the depletion layer extends into the N− drift, the reverse bias voltage at this moment corresponds to I_RR, allowing for the determination of t₃, the time at which I_RR is reached.

In the fourth stage, the current declines swiftly at nearly a constant rate. In Figure 3, the charge retained in N− drift at the end of the third phase is indicated as Q₄. At the conclusion of this phase, specifically when t = t₃, the I_RR flows through the structure. This current can be related to the profile of free carriers in the following manner:

$$I_{RR}=2q{D}_a{\displaystyle \frac{dn}{dx}}=2q{D}_a{\displaystyle \frac{n_a}{h}}$$

(47)

The dimension h can be obtained using the formula, where D_a is determined by the parameters of the buffer layer, and n_a is calculated according to the specified Equation (26) x > +W.

$$h={\displaystyle \frac{2q{D}_a{n}_a}{I_{RR}}}$$

(48)

Thus, the remaining stored charge in N− drift at the time t₃ can be expressed as

$$Q_4=q{n}_a[2d-W_{SC}(t_3)-h]$$

(49)

During the fourth stage, the charge retained in N− drift must be entirely extracted and collected in the buffer layer, with t₄ representing the duration required for this phase. Throughout this stage, the current decreases at a rate that remains approximately constant. The charge extracted and accumulated in the buffer layer during this interval, due to the extension of the depletion layer, can be expressed as

$$Q_R={\displaystyle \frac{I_{RR}{t}_4}{2}}$$

(50)

This can be likened to the charge that persists in N− drift at the end of the third stage. If the length of this interval is comparatively brief in relation to minority carrier lifetime, the effects of recombination may be disregarded. Consequently, this leads to the determination of the time t₄ for the decrease in the reverse current:

$$t_B=t_3-t_2={\displaystyle \frac{2q{n}_a}{I_{RR}}}[2d-W_{SC}(t_3)-h]$$

(51)

The rate of reverse slope can be obtained by dividing I_RR by the corresponding time:

$${[{\displaystyle \frac{dJ}{dt}}]}_R={\displaystyle \frac{I_{RR}}{t_4}}={\displaystyle \frac{I_{RR}^2}{2q{n}_a[2d-W_{SC}(t_3)-h]}}$$

(52)

In the fifth stage, the FRD enters the phase involving the buffer layer, characterized as a heavily doped N− drift, as shown in Figure 6. Doping concentration within this layer must be sufficiently elevated to avoid total depletion under the reverse bias applied across the FRD. Concurrently, the doping concentration of the buffer layer must remain sufficiently low to facilitate conductivity modulation, thereby preserving a certain quantity of stored charge within the layer. In the fifth stage, the applied bias fails to efficiently extract this stored charge, leading to a diminished rate of current.

Unlike conventional PIN structures, when the depletion layer interfaces with the buffer layer, the substantial doping concentration of the buffer layer hinders the extension of the depletion region. Since the time required for the extension of the depletion layer is relatively long compared to the minority carrier lifetime, the stored charge within the buffer layer cannot be extracted through the extension of SCR. Instead, as shown in Figure 7, it dissipates via recombination [19,20]. Since SCR is subjected to voltage, it can be assumed that the electric field in the undepleted area is negligible when excess carriers diffuse. As a result, the drift component of the excess carrier current can be disregarded in the continuity equation.

Consequently, the concentration of excess carriers [δp(x,t)] in the fifth stage is governed by the following equation:

$${\displaystyle \frac{𝜕\delta p(x,t)}{𝜕t}}=Dp{\displaystyle \frac{{𝜕}^2\delta p(x,t)}{𝜕t^2}}$$

(53)

In Figure 3, it is illustrated that the concentration of excess carriers is 0 at the boundary of SCR during the fourth stage, while it attains its maximum at the center of the undepleted area. If we define the distance from the center of the undepleted region to the boundary of SCR as

$$L={\displaystyle \frac{[2d-W_{SC}(t_4)]}{2}}$$

(54)

The maximum concentration of excess carriers is located at:

$$x_M=W_{SC}(t_4)+L={\displaystyle \frac{[2d-W_{SC}(t_4)]}{2}}$$

(55)

The maximum concentration of excess carriers is expressed by the following equation:

$$\delta p(x_M,t)=({\displaystyle \frac{\Delta p}{4D_p{t}^3}})$$

(56)

Here, Δp can be calculated from the concentration of excess carriers at the position x = x_M at the onset of the fifth stage. Assuming that the concentration of excess carriers at this location when the fifth stage begins (at t = t₄) is equal to the average carrier concentration n_a, the following is obtained:

$$\Delta p=4D_p{t}_4^3{n}_a$$

(57)

$$\delta p(x_M,t)={({\displaystyle \frac{t_4}{t}})}^3{n}_a$$

(58)

Utilizing the boundary conditions

$$\delta p[W_{SC}(t_4),t]=0$$

(59)

This results in the distribution of free carrier concentration in the undepleted region.

$$\delta p(x,t)=n_a{({\displaystyle \frac{t_4}{t}})}^3{\displaystyle \{}{e}^{\Delta x^2/4D_{p}t}-e^{L^2/4D_{p}t}[{\displaystyle \frac{sinh(\Delta x^2/4D_{p}t)}{cosh(L^2/4D_{p}t)}}]{\displaystyle \}}$$

(60)

Here, Δx represents the distance to the position x = xM, while the time t refers to any moment after t = t4, which marks the conclusion of the fourth stage. The current during the fifth stage can be calculated using the distribution of free carrier concentration:

$$J_R(t)=-q{D}_p{\left.{\displaystyle \frac{\delta p}{\delta x}}\right|}_{x=-L}$$

(61)

Substituting into the above equation yields the current:

$$J_R(t)={\displaystyle \frac{q{n}_{a}L}{2t}}{({\displaystyle \frac{t_4}{t}})}^3{e}^{L^2/4D_{p}t}[1+{\displaystyle \frac{sinh(L^2/4D_{p}t)}{cosh(L^2/4D_{p}t)}}]$$

(62)

As discussed above, the entire reverse recovery process can be derived from the analytical model.

3. Device Physical Parameters and Experimental Setup

3.1. Physical Parameters of the Device

To validate the accuracy of the analytical model, the device under investigation is the ASD060T12S11T FRD product developed by Archimedes Semiconductor Co., Ltd. in Hefei, Anhui Province, China. This FRD device is housed within a TO-247-Plus-4L package, specifically the ADG100N12MTA model, functioning in a parallel configuration. The physical and structural parameters of the device are presented in

Table 2. Physical structure and process parameters of PT-PIN FRD with a buffer layer.

Physical Parameters	Value
P+ implant element	Boron
P+ implant energy	80 (Kev)
P+ implant dose	1 × 1013 (ion/cm−3)
P+ drive in temperature	1150 (°C)
P+ drive in time	450 (min)
N− drift doping concentration	6.14 × 1013 (cm−3)
N− Drift thickness	80 (μm)
Buffer layer doping concentration	2 × 1014 (cm−3)
Buffer layer thickness	25 (μm)
FRD area	0.35 (cm2)
Conduction current	100 (A)
Electron irradiation energy	10 (Mev)
Electron irradiation dose	120 (kGy)
Anneal temperature	350 (°C)
Anneal time	30 (min)
τHL [21,22,23,24,25]	0.1 (μs)

. The carrier lifetime control technique utilized in this study for the FRD is facilitated through electron irradiation, with an irradiation energy of 10 MeV and a dosage of 120 kGy. An analysis of the defect distribution in the device using Deep Level Transient Spectroscopy (DLTS) was performed, as illustrated in Figure 8. A preliminary estimate of the carrier lifetime was obtained by referencing the findings presented in [21].

3.2. Construction of Experimental Platform

Figure 9a shows the structural diagram of TO-247Plus packaging of discrete devices after dicing the wafer. Figure 9b shows the internal composition of the discrete device, with a 1200 V 100 A IGBT parallel to a 1200 V 60 A FRD. Figure 9c shows the setup of the double pulse test platform for power devices; Figure 9d illustrates the principles of the double pulse test. The DC bus voltage Vcc is provided by a high-voltage DC power supply. The stray inductance of the test system Ls is 100 nH, R_G(off) is set to 15 Ω, and R_G(on) is set to 10 Ω. During the testing process, in order to ensure minimal stray inductance in the DC bus, T₁ serves as the auxiliary bridge arm, whereas T₂ is the device under test (DUT). A gate signal is applied to the auxiliary bridge arm to initiate its switching state. The following parameters need to be monitored during the test: diode voltage V_R and diode current I_F. The testing conditions are outlined in

Table 3. Experimental and circuit test conditions.

Circuit Parameters	Value
Lload	100 (uH)
Ls	100 (nH)
RG (on)	10 (Ω)
RG (off)	15 (Ω)
VGE	−8~15 (V)
VCC	600 (V)

below.

Figure 9c presents the setup of the double pulse test platform.

Table 4. Test equipment used model number.

Equipment	Model Number
Oscilloscope	MSO56 5-BW-500
Pulse generator	QTJ15610A
High-voltage DC power supply	TDK Z+ 650-1
Rothschild coil	IWATSU SS-286A
Driver plate	FZ1200R33KF2C

below provides information regarding the equipment utilized, including the oscilloscope, probes, and other devices.

4. Experimental Certification and Discussion

4.1. Analytical Model Verification

A comprehensive analysis was conducted on the results obtained from the analytical model curves in comparison with the measured curves in order to validate the model’s effectiveness and accuracy. During the research process, the current curve of the FRD was intentionally processed in reverse to facilitate observation and comparison, as illustrated in Figure 10. Overall, the analysis of the fitting results indicates a good correspondence between the analytical model and the measured curves, accurately predicting the reverse recovery characteristics of the FRD. However, in terms of detail, two primary sources of error were identified: one occurring during the early stage of current rise and the other during the initial phase of voltage rise.

First, attention must be paid to the error observed during the initial rise of the current, referred to as Error 1. The current characteristics are governed by the IGBT, and the transconductance parameters of the IGBT influence the slope of the current rise. Due to the relatively low transconductance of the IGBT in the low current region, the measured waveform displays a slow slope during the early stage of current rise, resulting in a relatively gentle ascent curve. In contrast, the derived analytical model assumes that the FRD maintains a constant slope during reverse recovery; this assumption fails to accurately reflect the actual behavior of the FRD during the initial rise of current, thereby leading to this discrepancy.

Secondly, Error 2 during the initial rise of voltage is primarily manifested as a voltage step phenomenon in the measured waveform. During the testing process, a distinct step in voltage was observed during the rising phase of the measured waveform, which is primarily attributed to the parasitic inductance present in the switching circuit of the IGBT and FRD. The effect of parasitic inductance can induce transient variations in voltage, particularly during the switching instant when the rate of change in the current is significant; the back electromotive force generated by the inductance can lead to a temporary surge in voltage. The analytical model does not account for the presence and influence of parasitic inductance during this phase, resulting in deviations in the predicted voltage changes.

Error 2 in Figure 10 can indeed be attributed to the presence of parasitic elements. Postulate that this error arises from the stray inductance associated with the IGBT and FRD circulation loop rather than from the system’s stray inductance, L_S. The stray inductance along the circulation path of the IGBT and FRD can be designated as L_H. As illustrated in Figure 9d, the voltage elevation during the initial state based on the relevant equations can be derived. The model will incorporate the waveform resulting from stray inductance effects on the initial voltage state. As illustrated in Figure 11, the model’s accuracy in the early voltage phase has been enhanced by taking stray inductance into account.

$$V_F=L_H{\displaystyle \frac{d{I}_F}{dt}}$$

(63)

As shown in Figure 10 of the manuscript, in addition to errors 1 and 2, discrepancies are also observed in the I_RR position and the I_F tailing during the final stage of reverse recovery. Overall, we attribute the errors to two primary sources: the first being testing errors, which encompass the influence of system components such as parasitic elements, and the second being FRD device-related errors, which stem from variations in physical parameters. Test errors will be further discussed in detail in Section 4.3.

Here, we aimed to provide a more detailed explanation of the FRD device-related errors. The FRD itself is subject to manufacturing process variations, and full consistency across different production batches cannot be guaranteed. As a result, variations in the FRD device’s physical parameters can occur, leading to discrepancies between the predicted model and the experimental curves. Errors in the I_RR and I_F tailing can be traced back to this factor. To further substantiate our discussion, an analysis of process fluctuations in the FRD CP results on a wafer was conducted. Since CP testing cannot perform dynamic tests and both V_F and reverse recovery are compromised, we have provided the VF distribution from the CP tests, as shown in Figure 12 below. Figure 12 shows the value of VF per chip on a 6-inch wafer, which represents the discrete and distributed characteristics of VF on this wafer, making it easier to judge the convergence of the process.

The P+ implantation generates the anode region of the FRD, while the push-up process activates the boron and facilitates the formation of a PN junction. During this process, the entire wafer experiences technological warping, leading to varying influences of the push-up process across different locations on the wafer. As illustrated, a notable discrepancy in processing emerges between the lower-left and upper-right corners of the wafer, characterized by differing anode states. The anode region formed in the lower-left corner exhibits a higher concentration, resulting in a smaller V_F, while the anode concentration near the upper-right corner is comparatively lower. Similarly, a denser anode region necessitates a greater extraction of carriers during the reverse recovery process, thereby correlating with a higher I_RR. Moreover, this technological variance also adversely impacts the model’s predictions regarding reverse recovery characteristics. No model can afford to disregard the errors induced by the fabrication process itself.

As illustrated in Figure 13, two devices exhibiting significant variations in V_F were selected for dual-pulse testing, followed by a comparative analysis with the predictive model. In fact, the observed process fluctuations do lead to potential discrepancies in the predictive model.

4.2. Comparison Between Analytical Model and the Lumped-Charge Model

As illustrated in Figure 14, compared to the lumped-charge model mentioned in [10], the advantages of the lumped-charge method are manifested in its high predictive accuracy once the voltage and current stabilize. However, this methodology exhibits certain limitations when addressing the impact of parasitic components in the system, particularly evident in the voltage waveform during the initial state, where the associated errors tend to be substantial. In comparison, the analytical model presented in this paper exhibits inferior accuracy near the peak current I_RR relative to the lumped charge method yet demonstrates superior performance in forecasting the voltage waveform.

The Root Mean Square Error (RMSE) is a widely used metric for assessing the deviation between predicted values and actual values. It is calculated by taking the square root of the sum of the squared differences between predicted values and actual values, normalized by the number of test currents. This method is particularly sensitive to outliers within the data, thus effectively reflecting the precision of the measurements. The RMSE is calculated using Formula (64):

$$RMSE=\sqrt{{\displaystyle \frac{{\displaystyle \sum _{i=1}^n{(X_{exp,i}-X_{model,i})}^2}}{n}}}$$

(64)

As illustrated in Figure 15, the analysis of RMSE reveals that the new analytical model offers an improvement in accuracy when predicting the reverse recovery characteristics of FRD devices compared to the previous model mentioned in [10]. The predictive accuracy of IF utilizing the new model is comparable to that of the lumped charge method. Concurrently, the prediction accuracy of V_R has also exhibited an enhancement of approximately 5%. This improvement underscores the new model’s capability to effectively capture transient voltage variation, thereby providing a more precise representation of the dynamic characteristics of voltage under diverse operational conditions.

The analytical model is based on the changes in different processes of reverse recovery, and the calculation of different processes is realized by formula deduction, and finally, the overall model is obtained. At present, the advanced lumped charge method uses node analysis and spice model calculation to fit. In terms of efficiency, the analytical model obtains reverse recovery characteristics through formula derivation and differential equation solving, while the lumped charge needs coupling node analysis and software calculation to be realized. The calculation power of simulation software is used, and the efficiency is significantly lower than that of the analytical model proposed in this paper.

4.3. Analytical Model Certification Under Different Test R_G

By extending the test resistances to 5 Ω and 20 Ω, it can be observed from Figure 16 that the analytical model continues to predict the reverse recovery characteristics with considerable accuracy. When the test resistance is set to 5 Ω, a significant increase in the speed of I_RR is clearly observable compared to previous measurements, resulting in a notable rise in I_RR. Correspondingly, the rate of voltage increase also experiences a substantial enhancement. Additionally, it is noted that Error 2, as depicted in Figure 16b, diminishes when the resistance is set to 20 Ω. This reduction is attributed to the increased resistance, which leads to a slower turn-on rate, thereby significantly attenuating the dynamic response of the parasitic inductive components.

4.4. Analytical Model Certification Under Different V_CC and I_F

As illustrated in Figure 17, through a series of experimental tests involving varying bus voltages and currents, it has been demonstrated that the derived model can accurately predict the reverse recovery characteristics of the FRD. As the current is increased, the primary effect on the FRD is reflected in the variation of I_RR. Specifically, at a constant rate of change in reverse recovery dI/dt, a higher current prolongs the time taken for the FRD to reach I_RR while simultaneously resulting in an elevated I_RR. In contrast, an increase in bus voltage primarily influences the fourth phase of voltage extension within the depletion region of the FRD. At this juncture, the FRD is required to endure an even higher voltage.

4.5. Analytical Model Certification Under Different Temperature

It is well established that at high temperatures, carrier mobility diminishes while carrier lifetime increases, resulting in a degradation of reverse recovery performance. As illustrated in Figure 18, due to the maintenance of a consistent dI_F/dt rate, the initial reverse recovery speed remains unchanged even at elevated temperatures. However, the I_RR exhibits a marked increase at high temperatures, resulting in greater reverse recovery losses. Additionally, as temperature rises, carrier mobility diminishes, leading to a deceleration in the expansion of the depletion region. Consequently, the rate of voltage increase across the terminals of the FRD is slower than that observed at room temperature.

5. Conclusions

This paper constructs the carrier distribution in a PT-PIN FRD with a buffer layer under high injection conditions, delving into the physical properties of the materials, doping concentrations, and the geometric structure of the device. The FRD, in conjunction with its parallel IGBT, is predominantly employed in the realms of photovoltaics and energy storage, operating within a frequency range of 10 to 16 kHz. The relatively swift switching speed can, to a certain extent, induce oscillations in the waveform. Consequently, the significance of the PT-PIN FRD with a buffer layer resides in the adoption of a gentler reverse recovery characteristic, which allows for the prediction of reverse recovery waveforms, thereby circumventing issues such as reverse recovery oscillation.

The model is based on PN junction theory, where, under high injection conditions, the distribution of carriers no longer conforms to a linear approximation; instead, it necessitates consideration of the complex interplay between carrier recombination, diffusion, and drift. Through numerical simulations and analytical derivations, the spatial distribution of carrier concentration within the FRD under high current density conditions has been obtained. The analytical results for carrier distribution under high injection conditions allow for the characterization of the reverse recovery process through temporal segmentation, dividing the recovery into five distinct stages. This framework describes the dynamic transition of the diode from the conducting state to the cutoff state. Utilizing the analytical model, it is possible to derive crucial parameters such as reverse recovery time, reverse recovery current, and current slope. The experimental results indicate a significant enhancement in the accuracy of the analytical model when compared with previous models that employed the lumped-charge method. Furthermore, there has been an improvement in the voltage prediction accuracy relative to the most recent lumped-charge method. This model is capable of precisely forecasting the reverse recovery characteristics under varying test conditions of R_G, V_CC, and I_F.

At present, this model does not include semiconductor-level device simulation similar to TCAD or circuit-level Spiec simulation. We hope to continue to expand this model in subsequent studies, especially for advanced hydrogen ion injection, helium ion injection, and other new technology life control methods, which are included in the calculation of the model. A wider range of applications has been achieved.