Correction: Zhuang et al. A Generalized Optimization Scheme for Memory-Side Prefetching to Enhance System Performance. Electronics 2025, 14, 2811

Missing Citation

In the original publication [1], reference 2 was not cited again and adequately described in the Methodology section. The citation has now been inserted in Section 3.2 Prefetch Controller, Paragraph 3, and should read:

Inspired by Berti’s design [2], the prefetch algorithm in our GOP methodology leverages spatial locality in memory access patterns, focusing on address increments. To effectively learn these increment patterns, it is essential to track recent memory access records. This is accomplished using the History Table (illustrated in Figure 2), which is an 8-way, 16-set FIFO structure containing 128 entries. Each entry in the table holds a 16-bit tag and a 64-bit cache line address, as shown in Figure 3.

The authors state that the scientific conclusions are unaffected. This correction was approved by the Academic Editor. The original publication has also been updated.