An 8–15 GHz Doherty Power Amplifier with a Compact Quadrature-Hybrid-Based Output Combiner in 22 nm FD-SOI

Round 1

Reviewer 1 Report

Comments and Suggestions for Authors

The work presents a compact, wideband Doherty Power Amplifier (DPA) in 22-nm FD-SOI CMOS, leveraging quadrature hybrids to replace traditional λ/4 impedance inverters. The achieved 8-15 GHz bandwidth (61% FBW) is a notable result in silicon-based PA design. The analytical treatment of the hybrid's stability and bandwidth advantage is particularly strong. The manuscript is well-structured and the results are compelling, demonstrating a clear advancement for wideband, integrated CMOS PAs. However, there are several areas where the presentation and technical justification require clarification and expansion to fully support the claims and ensure reproducibility. My detailed comments are provided below to help strengthen the paper.

• The manuscript is well-written but would benefit from a thorough proofread for minor grammatical issues 
• The introduction effectively sets the stage, but the main contributions section (lines 46-51) could be more sharply differentiated from the rest of the introduction. I suggest formatting this as a bulleted list for clarity.
• The theoretical analysis in Section 2 is a highlight. However, the transition from the instability concern in Eq. (3) to its resolution via non-idealities needs a smoother narrative flow. It would be beneficial to explicitly state earlier that this apparent instability is a well-known theoretical limitation of the ideal model and that the subsequent analysis shows it is not a practical concern.
• The manuscript repeatedly emphasizes "compact" design. To substantiate this, please add a quantitative comparison of the area consumed by your proposed hybrid-based combiner/splitter versus a hypothetical, optimized slow-wave λ/4 inverter in the same technology. A brief discussion or a simple layout comparison would solidify this key claim.
• The results in Section 4 and Table 1 are strong, but the narrative is somewhat descriptive. I recommend adding a concluding paragraph to Section 4 that synthesizes the results, explicitly linking the measured wideband performance back to the proposed hybrid technique, thereby directly validating the main objective of the paper.
• Line 159-163: The description of the driver stage's linearization loop is too brief. A block diagram would greatly improve understanding. The phrase : senses the RF input and adjusts the gate bias, needs more detail on the mechanism.
• Line 172-186: The design procedure for the main amplifier core is well-explained and valuable. However, the transition from a single unit FET to the final stack of three could be clearer. Explicitly state the total current and power scaling rationale.
• The load-pull analysis is critical. Please specify at which frequency, or if it's an average across band, these impedance values were extracted.
• The P_sat and PAE results at 10 GHz are strong. Please specify the corresponding output power level for clarity.
• The conclusion would benefit from a sentence or two on potential future work.

Author Response

Please see the attachment.

Thank you very much.

Author Response File: Author Response.pdf

Reviewer 2 Report

Comments and Suggestions for Authors

I believe the article is relevant and well written, but the positioning could be improved in the Introduction. There is a focus on CMOS/SOI, but nowadays Doherty PAs for SatCom are mainly being investigated in GaN technology, and that should be acknowledged (e.g., see A. Piacibello et al., "Design and Extensive NPR Characterization of a Highly Linear SatCom GaN MMIC Doherty PA," IEEE Transactions on Microwave Theory and Techniques, vol. 73, no. 1, pp. 156–166, Jan. 2025, doi: 10.1109/TMTT.2024.3474092).

Another aspect that should be mentioned when the authors discuss the issues with the quarter-wave impedance inverter is that there are so-called digital Doherty / two-input Doherty architectures that can offer more flexibility and improved performance. These should be referenced, see M. Mengozzi et al., "Enhancing K-Band Dual-Input Doherty PA Performance by Bayesian Optimization," IEEE Transactions on Microwave Theory and Techniques, vol. 73, no. 6, pp. 3491–3502, June 2025, doi: 10.1109/TMTT.2024.3498451.

At the beginning of Section 2.2 there seems to be some leftover text: “1) λ/4 inverter off the design frequency.”

Can the authors confirm that they used a quadrature hybrid also for input splitting? It appears so from the description in Section 3.1, but the analysis in Section 2 is focused on the impedance inverter at the output. Please better justify its use at the input.

Also, the discussion on the greater loss for the λ/4 network is justified theoretically, but it would be better to consider an implementation example and perform a simulation-based comparison of the two combining networks in this technology, so as to show that the quadrature hybrid is actually better.

What is the simulated frequency in Figure 6? Also, are all Figures 9 to 13 and Figure 15 measured at 10 GHz? The authors claim broad bandwidth, but they should show large-signal performance at other CW frequencies, not only based on S-parameters.

In the comparison table, the linearity performance (EVM) should be complemented with the type of modulation tested and the back-off level.

Author Response

Please see the attachment.

Thank you very much.

Author Response File: Author Response.pdf

Round 2

Reviewer 1 Report

Comments and Suggestions for Authors

All comments addressed, no futher feebdack.

Reviewer 2 Report

Comments and Suggestions for Authors

Thank you for responding to the remarks and modifying the article accordingly.