Failure Mechanism Analysis and Electromagnetic Protection Design of Electronic Systems Under High-Power Electromagnetic Pulse
Abstract
1. Introduction
2. Experimental Investigation of HPEMP Effects on a Typical Electronic Switching System
2.1. System-Level Irradiation Experiments
2.2. Numerical Simulation Experiment
2.2.1. Modeling Considerations
- (1)
- Simplified Modeling of the Front-End RF Circuit Module
- (2)
- Selective Modeling of the Back-End Signal Processing Circuit Module
2.2.2. Model Construction
2.2.3. Results and Analysis
2.3. Injection Experiments
2.3.1. System-Level Bulk Current Injection Experiment
- (1)
- Anode Cable Injection
- (2)
- Gate Cable Injection
- (3)
- Other Cable Injections
2.3.2. Device-Level Voltage Injection Experiment
2.4. Comparison of Experimental Results
3. Simulation Study on Turn-On Characteristics of Thyristors Under HPEMP
3.1. Basic Structure and Characteristics of Thyristors
3.2. Fundamental Principles of Thyristor Turn-On
3.3. Investigation of Thyristor Turn-on Mechanism Under Transient Pulse Effects
3.3.1. Device Structure
- ①
- Substrate Preparation: A uniformly doped common base region (N-type, concentration 1 × 1014/cm−3) was formed across the entire area, serving as the interconnection for the two transistors.
- ②
- PNP Emitter Formation: Gaussian P-type doping (concentration 5 × 1019/cm−3) was performed in the top region (0 < x < 100 micrometers, 162 < y < 180 micrometers) to form the PNP transistor emitter.
- ③
- NPN Base Formation: Gaussian P-type doping (concentration 1 × 1016/cm−3) was performed in the mid-lower region (0 < x < 100 micrometers, 16 < y < 25 micrometers) to form the NPN transistor base.
- ④
- NPN Emitter Formation: Gaussian N-type doping (concentration 5 × 1018/cm−3) was performed in the bottom region (0 < x < 50 micrometers, 0 < y < 16 micrometers) to form the NPN transistor emitter.
3.3.2. Simulation Results and Mechanism Analysis
- (1)
- Gate Transient Pulse Excitation
- (2)
- Anode Transient Pulse Excitation
3.4. Considerations on Key Issues
- (1)
- Equivalence between Cable Port Coupled Voltage and Numerical Simulation Port Voltage
- (2)
- Equivalence of Cable Lengthening
4. Electromagnetic Protection Hardening Design
- (1)
- Circuit Board Structure Optimization
- (2)
- Shielding and Grounding of the Gate Cable
- (3)
- Replacement of the Thyristor
5. Conclusions
- (1)
- The switching system is susceptible to HPEMP interference, with cables exhibiting high sensitivity as back-door coupling paths. HPEMP couples into thyristor-related ports via cables, causing device malfunction and subsequent system failure. Since the failure threshold of the thyristor gate port is lower than that of the anode port, gate cable coupling is identified as the primary cause of system failure.
- (2)
- Analysis of the thyristor failure mechanism reveals that under gate-injected transient pulses, carrier injection causes the internal PN junction of the thyristor to transition from reverse bias to forward bias, triggering a positive feedback mechanism that ultimately leads to complete device turn-on. This process has a turn-on duration of approximately 3.5 microseconds, which aligns well with experimental results. Under anode injection, the displacement current induced by the high transient voltage change rate (dv/dt) acts as an equivalent gate trigger current, also initiating the positive feedback process and turning on the device. This method results in a faster response, with a turn-on time of about 1 microsecond. Furthermore, the study indicates that the turn-on threshold of the thyristor is more sensitive to changes in pulse amplitude than to pulse width.
- (3)
- Based on the identified electromagnetic vulnerability paths and sensitive components, targeted electromagnetic protection hardening measures were implemented. These included optimization of the circuit board structure, copper foil shielding and grounding design for cables, and replacement of critical devices. The effectiveness of these measures was validated through irradiation experiments. Results demonstrate that all methods improved the system’s anti-interference capability, with board structure improvement and cable shielding providing the most significant protection.
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
References
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Field Level (kV/m) | Number of Experiments | Failure Probability (%) |
---|---|---|
3 | 5 | 0 (0/5) |
6 | 20 | 85 (17/20) |
Thyristor Number | Average Coupling Voltage (kV) | Thyristor Unintended Turn-on Probability (%) | |
---|---|---|---|
1 | 2.12 | 20 (1/5) | 15 (3/20) |
2 | 2.11 | 20 (1/5) | |
3 | 2.10 | 0 (0/5) | |
4 | 2.11 | 20 (1/5) |
Thyristor Number | Average Coupling Voltage (V) | Thyristor Unintended Turn-on Probability (%) | |
---|---|---|---|
5 | 556 | 66.6 (2/3) | 57 (4/7) |
6 | 552 | 50 (2/4) | |
7 | 612 | 100 (2/2) | 100 (10/10) |
8 | 614 | 100 (2/2) | |
9 | 615 | 100 (2/2) | |
10 | 613 | 100 (2/2) | |
11 | 613 | 100 (2/2) |
Thyristor Number | Average Coupling Voltage (V) | Thyristor Unintended Turn-on Probability (%) | |
---|---|---|---|
12 | 402 | 0 (0/5) | |
13 | 452 | 100 (2/2) | 100 (10/10) |
14 | 452 | 100 (2/2) | |
15 | 451 | 100 (2/2) | |
16 | 451 | 100 (2/2) | |
17 | 452 | 100 (2/2) | |
18 | −451 | 0 (0/10) |
Simulation Experiment | Voltage Injection Experiment | Current Injection Experiment |
---|---|---|
776 | 452 | 613 |
Pulse Width (ns) | Amplitude (V) | Conduction Status |
---|---|---|
2 | 245 | conduction |
1.5 | 245 | None |
20 | 240 | none |
21 | 240 | conduction |
Electromagnetic Protection Measures | Effect Threshold (kV/m) |
---|---|
none | 5.76 |
Overall PCB architecture design | 12.50 |
Cable shielding with copper foil and grounded drainage | 12.50 |
Component selection and substitution | 9.90 |
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Huang, C.; Wei, J.; Yan, Y.; Zhang, K.; Zhang, S.; Sun, Y.; Wang, T. Failure Mechanism Analysis and Electromagnetic Protection Design of Electronic Systems Under High-Power Electromagnetic Pulse. Electronics 2025, 14, 4060. https://doi.org/10.3390/electronics14204060
Huang C, Wei J, Yan Y, Zhang K, Zhang S, Sun Y, Wang T. Failure Mechanism Analysis and Electromagnetic Protection Design of Electronic Systems Under High-Power Electromagnetic Pulse. Electronics. 2025; 14(20):4060. https://doi.org/10.3390/electronics14204060
Chicago/Turabian StyleHuang, Chenxi, Jinhong Wei, Youjie Yan, Kaiyue Zhang, Shoulong Zhang, Yifei Sun, and Tongyu Wang. 2025. "Failure Mechanism Analysis and Electromagnetic Protection Design of Electronic Systems Under High-Power Electromagnetic Pulse" Electronics 14, no. 20: 4060. https://doi.org/10.3390/electronics14204060
APA StyleHuang, C., Wei, J., Yan, Y., Zhang, K., Zhang, S., Sun, Y., & Wang, T. (2025). Failure Mechanism Analysis and Electromagnetic Protection Design of Electronic Systems Under High-Power Electromagnetic Pulse. Electronics, 14(20), 4060. https://doi.org/10.3390/electronics14204060