Interference- and Demand-Aware Full-Duplex MAC for Next-Generation IoT: A Dual-Phase Contention Framework with Dynamic Priority Scheduling
Abstract
1. Introduction
1.1. Motivations
- What is an effective and low-overhead method for a terminal to communicate its dynamic QoS profile to the AP? We address this by defining the QoS profile as a 2-bit configuration, embedded in control frames, that classifies nodes as either uplink-dominant (UD) or downlink-dominant (DD) based on their primary traffic needs.
- What scheduling intelligence is required at the AP to optimally balance the dual objectives of satisfying diverse QoS contracts and maintaining network-wide interference below acceptable thresholds?
1.2. Contributions
- A Novel Interference- and Demand-Aware MAC Protocol: We propose a novel Interference- and Demand-Aware Full-Duplex MAC (IDA-FDMAC) framework that, for the first time, unifies the management of inter-node interference and diverse QoS demands. To achieve this, we design a novel dual-phase contention mechanism with dynamic priority scheduling. This core mechanism resolves the inherent conflict between the two objectives: the first phase efficiently resolves contention and mitigates primary interference, while the second leverages nodes’ QoS configurations (UD/DD) to perform demand-aware resource allocation.
- A Comprehensive Analytical Framework: For a rigorous assessment of the protocol’s capabilities, we construct a detailed theoretical model. This analytical framework is designed to jointly capture the effects of interference constraints and heterogeneous QoS demands. It enables the precise calculation of the success probability for the dual-phase contention process and the subsequent derivation of the total system throughput, while explicitly accounting for the unique characteristics of FD operation and the dynamic priority system.
- Extensive Performance Validation: The practical efficacy of the IDA-FDMAC protocol and the fidelity of our mathematical analysis are substantiated through extensive simulation campaigns. When benchmarked against comparable protocols, the results confirm that our solution achieves a marked improvement in overall system throughput and successfully delivers on the differentiated QoS objectives for various types of nodes.
2. Related Works
2.1. FD MAC Protocols for Interference Mitigation
2.2. FD MAC Protocols for QoS Provisioning
3. IDA-FDMAC Protocol
3.1. Protocol Architecture
- R1 (Priority-based Candidate Selection): Eligible nodes, as determined by the preceding TDC phase and their own interference/QoS assessments, compete using a frequency-domain method inspired by the T2F rule [30,31]. A dynamic priority system is embedded here, granting nodes different contention advantages based on their node type and the context of the current transmission.
- R2 (Signature-based Identification): All winners from R1 simultaneously transmit their unique signatures to the AP.
- R3 (Centralized Collision Resolution): The AP, which is assumed to know all node signatures, performs cross-correlation to identify the contenders. If a single signature is detected, that node is confirmed. If multiple signatures are detected (indicating a tie in R1), the AP deterministically selects one winner, thereby guaranteeing a collision-free outcome.
3.2. IDA-FDMAC Design Details
3.2.1. TDC Stage
- Case 1 (UD→AP): A UD node successfully acquires the channel, establishing itself as the uplink sender for the forthcoming FD transmission. The corresponding downlink receiver will be determined in the FDC stage.
- Case 2 (DD→AP): This outcome is similar to Case 1, but the designated uplink sender is a DD node.
- Case 3 (AP→UD): The AP wins the contention and addresses its RTS-FD to a specific UD node, which is then designated as the downlink receiver. The uplink sender remains to be selected via the FDC stage.
- Case 4 (AP→DD): This case mirrors Case 3, with the distinction that the selected downlink receiver is a DD node.
3.2.2. FDC Stage
- (Highest Priority): Subcarrier selection range is .
- (Medium Priority): Subcarrier selection range is .
- (Lowest Priority): Subcarrier selection range is .
- When a UD node wins TDC (Case 1: UD→AP): The highest priority () is given to DD nodes, as they have the most urgent need for a downlink slot. The current UD node (the TDC winner) is given medium priority () to potentially form a two-node FD link. Other UD nodes receive the lowest priority ().
- When a DD node wins TDC (Case 2: DD→AP): The current DD node receives the highest priority () to satisfy its own downlink demand. Other DD nodes have medium priority (), while all UD nodes have the lowest priority ().
- When AP targets a UD node (Case 3: AP→UD): The targeted UD node has the highest priority () to find an uplink partner. Other UD nodes have medium priority (), and DD nodes have the lowest priority ().
- When AP targets a DD node (Case 4: AP→DD): The highest priority () is assigned to UD nodes, as this creates a highly efficient FD pairing. The targeted DD node has medium priority (), while other DD nodes are given the lowest priority ().
3.2.3. Data Transmission and ACK Stage
3.2.4. Generalization of QoS Support
4. Performance Analysis
4.1. Analysis of the TDC Stage
- is the probability that the channel remains idle, with no node attempting a transmission.
- is the success probability for node i, where only node i transmits. For the AP (node 0), this is an aggregate probability, , where is the probability of the AP successfully sending an RTS-FD to node i, calculated as follows:Here, is the AP’s attempt rate towards node i, and the total attempt rate for the AP is .
- is the collision probability, occurring when two or more nodes transmit in the same slot.
4.2. Analysis of the FDC Stage
4.3. Throughput Expression
- Node i wins the TDC stage, thereby becoming the designated uplink sender.
- Another node (or the AP) wins the TDC stage, and node i subsequently wins the FDC stage to become the uplink sender.
- The AP wins the TDC stage and selects node i as the designated downlink receiver.
- Another node wins the TDC stage, and node i subsequently wins the FDC stage to become the downlink receiver.
5. Performance Evaluation
5.1. Validation of the Proposed IDA-FDMAC Protocol
5.2. Comparison Among the Proposed IDA-FDMAC Protocol, the Full-Duplex Protocol in Ref. [9], and CSMA/CA
5.3. Performance Under Non-Saturated Conditions
5.3.1. Simulation Setup for Non-Saturated Traffic
5.3.2. Analysis of System Throughput
5.3.3. Analysis of QoS Differentiation
5.4. Scalability Analysis with Increasing Network Size
- Excellent Model–Simulation Agreement: There is a very close match between the analytical curve and the simulation data points across the entire range of network sizes. For instance, at 15 nodes, the analytical model predicts a throughput of 42.65 Mbps, while the simulation yields a result of 42.58 Mbps, demonstrating a negligible deviation. This consistency validates the accuracy of our theoretical model in predicting the protocol’s performance, even in larger-scale scenarios.
- Graceful Throughput Scaling: The system throughput initially increases as more nodes are added to the network. For example, as the number of nodes increases from 5 to 15, the total system throughput rises significantly from approximately 32.3 Mbps to 42.5 Mbps. This is because a higher number of active nodes increases the probability of successful channel access and the formation of efficient full-duplex pairs, leading to better overall channel utilization.
- Contention Impact in Dense Networks: As the number of nodes continues to increase beyond an optimal point (around 44 Mbps with 25 nodes in this configuration), the system throughput begins to saturate. This behavior is expected and is attributable to the rising probability of collisions in the time-domain contention (TDC) stage. Increased contention leads to longer backoff periods and more time spent on collision resolution, which slightly diminishes the gains from having more transmission opportunities.
6. Conclusions
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
Appendix A
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Cases | TX Type |
---|---|
Case 1 (UD→AP) | 00 |
Case 2 (DD→AP) | 01 |
Case 3 (AP→UD) | 10 |
Case 4 (AP→DD) | 11 |
Parameter | Value |
---|---|
DIFS | 28 |
SIFS | 10 |
Slot time | 9 |
RTS/RTS-FD | 38/38 bytes |
CTS/CTS-FD | 44/52 bytes |
ACK | 38 bytes |
8 | |
2 | |
Payload | 1500 bytes |
6 Mbps | |
54 Mbps | |
222 |
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Tian, L.; Liu, Z.; Qi, S.; Zhao, Q. Interference- and Demand-Aware Full-Duplex MAC for Next-Generation IoT: A Dual-Phase Contention Framework with Dynamic Priority Scheduling. Electronics 2025, 14, 3901. https://doi.org/10.3390/electronics14193901
Tian L, Liu Z, Qi S, Zhao Q. Interference- and Demand-Aware Full-Duplex MAC for Next-Generation IoT: A Dual-Phase Contention Framework with Dynamic Priority Scheduling. Electronics. 2025; 14(19):3901. https://doi.org/10.3390/electronics14193901
Chicago/Turabian StyleTian, Liwei, Zijie Liu, Shuhan Qi, and Qinglin Zhao. 2025. "Interference- and Demand-Aware Full-Duplex MAC for Next-Generation IoT: A Dual-Phase Contention Framework with Dynamic Priority Scheduling" Electronics 14, no. 19: 3901. https://doi.org/10.3390/electronics14193901
APA StyleTian, L., Liu, Z., Qi, S., & Zhao, Q. (2025). Interference- and Demand-Aware Full-Duplex MAC for Next-Generation IoT: A Dual-Phase Contention Framework with Dynamic Priority Scheduling. Electronics, 14(19), 3901. https://doi.org/10.3390/electronics14193901