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Article

State-of-the-Art VCO with Eight-Shaped Resonator-Type Transmission Line

Department of Electronic Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan
*
Author to whom correspondence should be addressed.
Electronics 2025, 14(12), 2322; https://doi.org/10.3390/electronics14122322
Submission received: 19 May 2025 / Revised: 5 June 2025 / Accepted: 5 June 2025 / Published: 6 June 2025
(This article belongs to the Special Issue Advances in Frontend Electronics for Millimeter-Wave Systems)

Abstract

:
A closed-loop transmission line (TL) coupled to an LCR resonator is used in this study for a fully-integrated CMOS rotary traveling wave oscillator (RTWO) based on the rotary traveling wave principle. A technique for the suppression of magnetic coupling noise is presented with eight-shaped inductors. The design and measurement of an 8.53 GHz oscillator in the TSMC 0.18 μm CMOS technology are discussed. The fully-integrated chip occupies a die area of 1.2 × 1.2 mm2. The oscillator consists of four sub-oscillators and uses four 1:1 symmetric twisted transformers, with the secondary inductors connected to form a twisted closed-loop transmission line for coupling the sub-oscillators. The transformers are configured as eight-shaped structures to minimize the far-field magnetic field radiation from each transformer and the whole transformer. At a supply voltage of 1.7 V, the power consumption is 5.84 mW. The free-running oscillation frequency of the RTWO is tunable from 8.53 GHz to 10.0 GHz. The measured phase noise at a 1 MHz frequency offset is −122.4 dBc/Hz at an oscillation frequency of 8.53 GHz, and the figure of merit (FOM) of the proposed VCO with a specific inductor layout is −193.4 dBc/Hz, surpassing other similar RTWOs. The FOM with a tuning range (FOMT) is −195.96 dBc/Hz.

1. Introduction

Voltage-controlled oscillators are used in phase-locked loops (PLLs) and dominate the noise and power consumption of PLLs. In LC oscillators, the inductor topology is an important issue in terms of dealing with coupling noise interference. Eight-shaped inductors are gaining popularity in RF circuit designs; they are used for suppressing noise interference and improving on-chip electromagnetic compatibility (EMC) susceptibility. Eight-shaped inductors are configured with a one-turn topology [1,2]. The EMC reduction results from the twisted nature of the two constitutive loops with equal magnetic field distributions and opposite polarities. A 1:1 eight-shaped transformer is configured with an asymmetric planar one-turn [3,4] and a symmetric 3D one-turn structure [5].
Among the various VCO architectures presented in the past few years, wave-based oscillators, including standing-wave oscillators (SWOs), traveling-wave oscillators (TWOs), and constructive-wave oscillators (CWOs) [6] have recently gained interest. Rotary traveling-wave oscillators (RTWOs) have drawn recent attention because they can provide multi-phase clock generation, higher oscillation frequencies, and lower phase noise [7]. RTWOs have been used in clock arrays [8], frequency quadruplers [9], frequency doublers [10], and pulse injection-locked RTWOs [11,12]. RTWOs often use twisted Möbius rings, as first presented by Wood [8], and untwisted and unfolded single-loop topologies [13,14,15]. Typical RTWO topologies are shown in Figure 1. Figure 1a shows a single-loop micro-strip RTWO. Figure 1b shows an inductor single-loop RTWO used to reduce the occupied area. The above two circuits necessitate long interconnects between the nodes and their corresponding -Gm cells. Since diagonally opposite inductors carry currents that are 180° out of phase, Figure 1c shows a folded Möbius ring RTWO, and Figure 1d shows a folded RTWO with a transformer used to reduce the occupied area [16] because the -Gm cells are placed near the oscillator nodes. In the above topologies, the area encircled by the inductive component is often sensitive to magnetic field coupling. For example, CMOS RTWO arrays [8] were utilized to generate a gigahertz clock, and the induced magnetic fields from the clock structures can be strong. In turn, the RTWO loop can pick up coupling noise and should be suppressed to avoid the frequency pulling and injection locking from a strong interference signal, such as a power amplifier. It also needs to reduce the interference radiation affecting the highly sensitive receiver or low-noise amplifier. RTWO designers require careful attention to guard against magnetic field couplings between the RTWO and other structures. The RTWO-TL can be classified into two types: resonant-type and non-resonant-type. In contrast to Figure 1b, where diagonal excitation is used, the energy excitation is directly applied in each inductor subsection uniformly in the RTWO, as shown in Figure 2a. The RTWO type shown in Figure 2b is used in this work. This paper introduces a new voltage-controlled oscillator (VCO) that uses an eight-shaped transformer as the LC resonator component and the coupling element of four sub-VCOs to form a quadrature VCO (QVCO). The unique property of this oscillator is its low EMI issue, as eight-shaped transformers are naturally noise suppressive. A high figure of merit (FOM) and FoMT (FOM with tuning range) are obtained for the designed QVCO, making the circuit suitable for RF applications.

2. Circuit Design

A schematic of the designed VCO is shown in Figure 3. The VCO is made of four complementary NP VCOs. PMOS transistor M2 and nMOS M1 form a cross-coupled negative resistance pair to supply the energy to the LC resonator formed with inductor L1 and varactors (Cv1, Cv2), and the above components form the sub-VCO1. Various negative trans-conductors (-Gm cell) can be applied, and they strongly affect the RTWO’s power consumption, phase noise, and operation voltage. The NP cross-coupled core is a low-power Gm structure. Varactor control bias VT varies the capacitance of the varactors of sub-VCO1 and the oscillation frequency. The same structure constructs the other three sub-VCOs as sub-VCO1. The inductor is configured as a transformer, with the secondary as a passive coupling device for the four sub-VCOs. The four secondary inductors are connected as a closed-loop inductor ring. The sub-VCO injects an energized wave into the loop ring consisting of inductors (L1T, L2T, L3T, L4T) to form a constructive traveling wave, and the rotary traveling wave back-injects the wave into the sub-oscillator as a fundamental injection-locked oscillator (ILO) [13,14] via the transformer pair (LiT, Li) (i = 1, 4) to coherently generate multi-phase outputs. The transformer (L1, L1T) couples the wave on the closed-loop ring to sub-VCO1. The ILO should lock to the injection signal within a limited locking range at low injection power, and the designed ILO is easy to lock to the incoming injection wave because the four ILOs are ideally generating the same frequency signals. The phase delay through each of the four subsections on the ring is approximately 90°, so the total delay around the closed traveling-wave loop ring is 360°. Distinct from a previous publication [14] without twisted inductors, the pair (LiT, Li) forms a twisted transformer in this work. The inductors LPi: (i = 1~8) are parasitic inductors caused by interconnects between transformer pairs. The coupling closed ring uses four eight-shaped inductors. Figure 4a shows the simulated oscillation frequency of the sub-VCO. Figure 4b shows the simulated oscillation frequency fOSC of the QVCO versus the tuning range VT. The coupling reduces the oscillation frequency. The oscillation frequency increases with the tuning voltage VT. Increasing VDD decreases fOSC because of reduced VT-VDD. Figure 4c shows the simulated voltage waveforms of sub-VCO3. The M3 drain voltage is larger than the M4 drain voltage. The -Gm cell injects current into the TL and creates two voltage waves that propagate in opposite directions. If the circuit is perfectly symmetrical, the traveling wave Vo(t, z) [17] on the TL, expressed in (1) or the standing wave as expressed in (2), exists on the TL [17].
V o ( t , z ) = n = 0 3 B o r cos ( ω o t β z ) n ω o T o 8 + n β λ 8 ) + B o l cos ( ω o t + β z ) n ω o T o 8 n β λ 8 ) ,
V o ( t , z ) = n = 0 3 2 B o cos ω o ( t n T o 8 ) cos β ( z n λ 8 ) ,
where Bor and Bol are the same for the symmetric injection design with the wave amplitude Bor = Bol = Bo, and they are different for the asymmetric design. β is a phase constant, λ is the wavelength, ωo is the radian frequency, and To is the oscillation period.
Figure 5a shows the simulated quadrature output voltage waveforms of the QVCO. Vo3 leads Vo2 by 90°. The output waveforms rotate in a clockwise direction, and no mode ambiguity is used despite the injection waves on the coupled TL closed loop. The sub-oscillators start up the oscillation by wave traveling both clockwise and counterclockwise. This is caused by the asymmetric sub-VCO output waveform, as shown in Figure 4c. Figure 5b shows the simulated voltage waveforms on the coupling loop [13]. Figure 5c shows the current waveforms. Appendix A shows that symmetric waveforms are generated by adopting symmetric NN-core sub-VCOs. A particular frequency noise voltage gets amplified by the feedback mechanism. Then, the sub-oscillators inject the signal into the ring loop to correlate with each other in phase. Generally, low-phase noise is demanded by a VCO; however, feedback oscillators with a higher transconductance FET require a small voltage disturbance generated by thermal/flicker noise to start oscillations. Ideally, the circuit layout is symmetric. So, any location among A, B, C, and D can show the highest voltage compared to the voltages at other locations. This will not affect the time sequence of the output voltage waveforms. Figure 6a shows the simulated phase noises of the VCO and QVCO outputs; the QVCO improves the phase noise by 8.3 dBc/Hz at a 1 MHz offset frequency at the cost of more power consumption. Figure 6b shows the simulated voltage waveforms of the QVCO outputs, indicating that the QVCO exhibits a low second harmonic, and the second harmonic is obtained from the buffer. The simulation shown in Figure 6c shows that the sub-VCO also exhibits a low second harmonic. The QVCO is intrinsically harmonic-free, and common-mode resonance at twice the oscillation frequency is not necessary. Figure 6d shows the simulated output power versus VT.
Figure 7a shows the layout of the four-port 1:1 inverting twisted transformer, and the primary and secondary inductors use one larger and a smaller inductor to form a twisted inductor. Figure 7b shows the simulated inductance and Q-factor of the transformer. At 8.536 GHz, the inductance is 0.93 nH and the Q-factor is 7.9, which is close to the maximum. A previous RTWO [13] used a 3:2 transformer could not obtain the same maximum Q-factor for the primary and the secondary inductors at the same operation frequency.
Flicker noise is a form of low-frequency device noise, and it will not be affected by the eight-shaped transformers. In each sub-VCO, flicker noise up-coverts to phase noise via the AM-FM conversion process from the varactors, so the flicker noise in one sub-VCO will not affect the phase noise in another sub-VCO. This reduces the phase noise generated by the coupling process. Each eight-shaped transformer will induce the injection pulling effect while it is subjected to a coupling noise attack. The phase noise of one sub-VCO will affect the sub-VCO phase noise via an eight-shaped transformer coupling and the phase noise wave propagation on the TL. This process reduces the phase noise, as shown in Figure 6a.
Figure 7c shows the simulated tank impedance, and the simulated phase is shown in Figure 7d for a quadrature circuit. The resonant frequency for the transformer alone is much higher than the oscillation frequency of the VCO. Hence, the varactor capacitance and MOSFET parasitic capacitance are also used in oscillation frequency determination. The resonant frequency is close to the oscillation frequency of the QVCO.
Figure 8 shows the layout of the twisted closed-loop inductor ring, which encloses a small die-empty area for low mutual coupling between the RTWO and other nearby inductive circuits. The inductor ring uses a single-loop topology, and most of the area inside the ring is occupied by the twisted transformer. The current shown by the arrow direction indicates the suppression of magnetic fields provided by each twisted transformer pair. Therefore, the net field generated by the inductive device is minimized. On the other hand, the coupling from the other aggressor is offset by the two lobes of each transformer pair. The distant spacing between the two eight-shaped transformers reduces the mutual coupling. In a traditional QVCO [13], the magnetic coupling to a sub-VCO causes the quadrature phase deviation.
Figure 9a shows the layout of the EM coupling study between the twisted transformer and an O-shaped inductor 25 μm away from the aggressor edge. The input signal is applied to the input ports of the primary and secondary inductors. The top two input ports are for the primary, which uses the external turn in the top lobe in series with the internal turn in the bottom lobe. Figure 9b shows S21 versus the frequency of the input signal. The O-shaped inductor at location B receives the least coupling because the fields generated by the two lobes offset each other. The suppression ratio at 8.5 GHz is about 45 dB. Figure 10a shows the layout for the secondary inductors by quadrature phase injection. The inner diameter of the transformer is 208 μm. Figure 10b shows S21 versus the frequency of the input signal. The O-shaped inductor at location C receives the least coupling because the fields generated by the two lobes offset each other.
In simplicity, Figure 3 uses a closed-loop transmission line (TL), as shown in Figure 11a, with transformer-coupled TL with four unit cells, which can be replaced by a transformer-less composite right-/left-handed (CRLH) transmission line [18], as shown in Figure 11b, with the parameters given by the following:
L 3 = C 2 ω 2 M 2
C 3 = L 2 ω 2 M 2
C 2 = C v 1 2
where C1 is the parasitic capacitance of the transmission line, ω is the radian frequency, and M is the mutual inductance between L1 and L2. The phase constant β as a function of ω can be derived using the CRLH TL to draw the dispersion diagram, and d is the effective length of each unit cell. The phase shift βd of the unit cell is given by the following:
j β d = ( j ω L 1 + 1 j ω C 3 + 1 j ω L 3 ) ( j ω C 1 )
β d = ( ω L 1 + ω L 3 1 ω 2 L 3 C 3 ) ( ω C 1 ) = π 2
For a quadrature oscillator, the resonant frequency from (4b) is determined by the following:
ω 2 = ( C 1 L 1 + C 1 L 3 ) ± ( C 1 L 1 + C 1 L 3 ) 2 4 ( L 3 C 3 C 1 L 1 ) ( π 2 ) 2 2 L 3 C 3 C 1 L 1
Figure 11. (a) Closed-loop transformer-coupled transmission line with a highlighted unit cell. (b) The unit cell is replaced by a transformer-less equivalent unit cell.
Figure 11. (a) Closed-loop transformer-coupled transmission line with a highlighted unit cell. (b) The unit cell is replaced by a transformer-less equivalent unit cell.
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3. Experimental Results

Figure 12 shows a microphotograph of the fabricated 0.18 μm QVCO with a chip area of 1.2 × 1.2 mm2, including all test pads and dummy metal. The QVCO was measured on a printed circuit board and tested with an Agilent E5052B signal source analyzer (Agilent, Santa Clara, CA, USA). Figure 13 shows the measured frequency tuning range from 8.53 GHz to 10.0 GHz at VDD = 1.2 V, and it is smaller than the pre-layout simulation, but the trend is in agreement with the simulated one. Figure 14 shows the measured spectrum of the VCO at VT = 0 V; the carrier is at 8.536 GHz with an output power of −1.32 dBm, and the second harmonic is at 17.11 GHz with an output power of −20.13 dBm. Figure 15a shows the measured phase noise of the VCO at a power consumption of 5.8464 mW. The phase noise at a 1 MHz offset from the carrier at 8.637 GHz is −122.398 dBc/Hz. The corner frequency between the 1/f3 and 1/f2 phase noises is 550 kHz. The figure of merit (FOM) is calculated using the following Equation (6):
FOM = L Δ   ω + 10 · log P D C 20 · log ω o Δ ω ,
where the symbols have their usual meanings. The FOM is −193.456 dBc/Hz. The FOMT with tuning range percentage is given by the following:
FOMT = F O M 20 · log T u n i n g   R a n g e % 10
The FOMT is −195.96 dBc/Hz. Figure 15b shows measured phase noise at 1 MHz and 10 MHz versus VT = 0 V. The RTWOs suffer from flicker noise up-conversion in the sub-VCOs. Table 1 compares the performance of various CMOS rotary traveling wave oscillators (RTWOs). The presented design reports a high-FOM CMOS RTWO.

4. Conclusions

Rotary traveling-wave oscillators have become one element for clock generation in RF circuits and system applications. This paper verified that, experimentally, a high-FOM (FOMT) RTWO is achievable in the CMOS process. This work presents a passive inductive layout for suppressing magnetic field coupling noise, and the inductive topology was verified in the VCO at 8.53 GHz. The VCO uses four eight-shaped 1:1 transformers to suppress magnetic field coupling interference, and the secondary inductors of the transformers are wired to form a coupling line for sub-VCOs. The passive coupling reduces the coupling flicker noise from sub-VCO FETs. The primary and the secondary inductors are operated at the maximum Q-factor at the operating frequency. The four sub-VCOs are injection-locked by traveling waves on the closed-loop twisted transmission line. The signal propagation is in one direction along the closed-loop transmission line due to the NP cross-coupled FET. Compared to other similar RTWOs, the designed VCO has a higher FOM, lower phase noise, and lower EMI (electromagnetic interference). The high-FOM RTWO demonstrates that this is a good RF VCO design technique. The circuit is extendable to generate multiple phases at millimeter-wave (mm-W) frequencies.

Author Contributions

Investigation, Z.-J.L.; Writing—original draft, S.-L.J.; Writing—review & editing, M.-H.J. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Data Availability Statement

Data are contained within the article.

Acknowledgments

The authors thank the staff of the TSRI for the chip fabrication.

Conflicts of Interest

The authors declare no conflict of interest.

Appendix A

In this appendix, related QVCOs are discussed. Figure A1a shows a schematic of the QVCO using an NN cross-coupled VCO. Figure A1b shows the outputs of the NN sub-VCO, and it indicates balanced outputs. Figure A1c shows the simulated tuning range. Figure A2a shows the outputs of the NN cross-coupled QVCO. Figure A2b shows voltage waveforms on the closed loop.
Figure A1. (a) Schematic of the NN cross-coupled QVCO adapted from Figure 3. (b) Pre-layout simulated sub-VCO outputs. (c) Pre-layout simulated frequency tuning range of the VCO at Vout = 1.0 V.
Figure A1. (a) Schematic of the NN cross-coupled QVCO adapted from Figure 3. (b) Pre-layout simulated sub-VCO outputs. (c) Pre-layout simulated frequency tuning range of the VCO at Vout = 1.0 V.
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Figure A2. Pre-layout simulated (a) buffer drain voltage waveforms. Clockwise time sequence. Green1: VO1. Black2: VO4. Blue3: VO3. Red4: VO2. (b) Voltage waveforms on the closed loop. Time sequence. VA: blue rhombus. VD: red square. VC: green circle. VB: black triangle. VDD = 1.0 V, VT = 0 V, Vout = 0.8 V.
Figure A2. Pre-layout simulated (a) buffer drain voltage waveforms. Clockwise time sequence. Green1: VO1. Black2: VO4. Blue3: VO3. Red4: VO2. (b) Voltage waveforms on the closed loop. Time sequence. VA: blue rhombus. VD: red square. VC: green circle. VB: black triangle. VDD = 1.0 V, VT = 0 V, Vout = 0.8 V.
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Figure 1. Schematic of a circular multi-phase RTWO with a microstrip TL (a) or inductor (b). (c) Folded RTWO. (d) Folded RTWO with transformers.
Figure 1. Schematic of a circular multi-phase RTWO with a microstrip TL (a) or inductor (b). (c) Folded RTWO. (d) Folded RTWO with transformers.
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Figure 2. Schematic of a circular multi-phase RTWO with side excitation (a) or (b) transformer-coupled side excitation.
Figure 2. Schematic of a circular multi-phase RTWO with side excitation (a) or (b) transformer-coupled side excitation.
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Figure 3. Schematic of the QVCO. LPi: (i = 1~8): parasitic inductors. At 8.5 GHz, simulation LPi: = 0.1 nH and Q = 7.734. The dashed box is an injection-locked oscillator.
Figure 3. Schematic of the QVCO. LPi: (i = 1~8): parasitic inductors. At 8.5 GHz, simulation LPi: = 0.1 nH and Q = 7.734. The dashed box is an injection-locked oscillator.
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Figure 4. (a) Simulated oscillation frequency of the sub-VCO at Vout = 1.0 V. (b) Pre-layout simulated frequency tuning range of the QVCO at Vout = 1.0 V. (c) Pre-layout simulated sub-VCO outputs. Black triangle: M4 gate output. Green circle: M3 gate output. (c1) VDD = 1.0 V, VT = 0 V, Vout = 0.8 V. (c2) Red solid: M4 gate output. Brown dashed: M3 gate output. VDD = 1.8 V, VT = 0 V, Vout = 0.8 V. Right vertical axis.
Figure 4. (a) Simulated oscillation frequency of the sub-VCO at Vout = 1.0 V. (b) Pre-layout simulated frequency tuning range of the QVCO at Vout = 1.0 V. (c) Pre-layout simulated sub-VCO outputs. Black triangle: M4 gate output. Green circle: M3 gate output. (c1) VDD = 1.0 V, VT = 0 V, Vout = 0.8 V. (c2) Red solid: M4 gate output. Brown dashed: M3 gate output. VDD = 1.8 V, VT = 0 V, Vout = 0.8 V. Right vertical axis.
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Figure 5. Pre-layout simulated (a) buffer drain voltage waveforms. Time sequence. Blue: VO3. Red: VO2. Green: VO1. Black: VO4. (b) Voltage waveforms on the closed loop. Time sequence. VA: blue rhombus. VD: red square. VC: green circle. VB: black triangle. VDD = 1.0 V, VT = 0 V, Vout = 0.8 V. (c) Current waveforms on the closed loop. IAD: blue rhombus. IAB: black triangle. ICD: red square. IBC: green circle.
Figure 5. Pre-layout simulated (a) buffer drain voltage waveforms. Time sequence. Blue: VO3. Red: VO2. Green: VO1. Black: VO4. (b) Voltage waveforms on the closed loop. Time sequence. VA: blue rhombus. VD: red square. VC: green circle. VB: black triangle. VDD = 1.0 V, VT = 0 V, Vout = 0.8 V. (c) Current waveforms on the closed loop. IAD: blue rhombus. IAB: black triangle. ICD: red square. IBC: green circle.
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Figure 6. (a) Simulated phase noise comparison of VCO with primary inductor only and QVCO outputs. VDD = 1.2 V, VT = 0 V, Vout = 1.0 V. (b) Simulated DFT output of QVCO. VDD = 1.2 V, VT = 0 V, Vout = 1.0 V. (c) Simulated DFT output of sub-VCO at VDD = 1.2 V and VDD = 1.8 V. (d) Simulated output power versus VT at VDD = 1.2 V.
Figure 6. (a) Simulated phase noise comparison of VCO with primary inductor only and QVCO outputs. VDD = 1.2 V, VT = 0 V, Vout = 1.0 V. (b) Simulated DFT output of QVCO. VDD = 1.2 V, VT = 0 V, Vout = 1.0 V. (c) Simulated DFT output of sub-VCO at VDD = 1.2 V and VDD = 1.8 V. (d) Simulated output power versus VT at VDD = 1.2 V.
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Figure 7. (a) Layout of inverting transformer with surface current density, (b) simulated Q-factor and inductance of the transformer. Simulated tank impedance (c) and phase (d) extracted from the primary input ports for a quadrature circuit. The secondary ports are open. LS1: transformer only. LS2: transformer and unbiased circuit components. LS3: transformer and biased circuit at VDD = 1.2 V, VT = 0 V, Vout = 1.0 V.
Figure 7. (a) Layout of inverting transformer with surface current density, (b) simulated Q-factor and inductance of the transformer. Simulated tank impedance (c) and phase (d) extracted from the primary input ports for a quadrature circuit. The secondary ports are open. LS1: transformer only. LS2: transformer and unbiased circuit components. LS3: transformer and biased circuit at VDD = 1.2 V, VT = 0 V, Vout = 1.0 V.
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Figure 8. Layout of twisted closed-loop inductor ring. The arrow shows the current direction on the closed-loop TL.
Figure 8. Layout of twisted closed-loop inductor ring. The arrow shows the current direction on the closed-loop TL.
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Figure 9. (a) Layout of an eight-shaped aggressor transformer and octagonal victim, with applied current direction. The primary and secondary accept the implied signal. (b) Simulated S21.
Figure 9. (a) Layout of an eight-shaped aggressor transformer and octagonal victim, with applied current direction. The primary and secondary accept the implied signal. (b) Simulated S21.
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Figure 10. (a) Layout of an eight-shaped aggressor transformer and an octagonal victim. The applied signals are quadrature. (b) Simulated S21.
Figure 10. (a) Layout of an eight-shaped aggressor transformer and an octagonal victim. The applied signals are quadrature. (b) Simulated S21.
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Figure 12. Chip photo of QVCO.
Figure 12. Chip photo of QVCO.
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Figure 13. Measured frequency tuning range VDD = 1.0 V, VT = 0 V, Vout = 0.8 V.
Figure 13. Measured frequency tuning range VDD = 1.0 V, VT = 0 V, Vout = 0.8 V.
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Figure 14. Measured spectrum of the VCO at VDD = 1.2 V, VT = 0 V, Vout = 1.2 V.
Figure 14. Measured spectrum of the VCO at VDD = 1.2 V, VT = 0 V, Vout = 1.2 V.
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Figure 15. (a) Measured phase noise of the VCO. VDD = 1.2 V, VT = 1 V, Vbuf = 1.2 V, fosc= 8.53 GHz. (b) Measured phase noise at 1 MHz and 10 MHz offset frequency vs. VT.
Figure 15. (a) Measured phase noise of the VCO. VDD = 1.2 V, VT = 1 V, Vbuf = 1.2 V, fosc= 8.53 GHz. (b) Measured phase noise at 1 MHz and 10 MHz offset frequency vs. VT.
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Table 1. Performance comparison of standalone CMOS RTWO.
Table 1. Performance comparison of standalone CMOS RTWO.
Ref. Tech
(μm)
fosc
(GHz)
Vdd(V) Pdis, mWArea
(mm2)
PN @
1 MHz dBc/Hz
FOM dBc/Hz
[6]0.0915.01.2/120.45 × 0.45−109.6−182.0
[12]0.183.261.0/5.331.07 × 1.07−122.14−185.11
[13]0.182.791.1/4.781.2 × 1.2−121.4−181.8
[14]0.1823.61.8/70.20.8−105.0−164
[19]0.1312.21.2/300.3 × 0.35−105.2−171.95
[20]0.25184/54−98.0−98.0
[21]0.185.281.8/1291.5 × 1.5−102.0−155.35
[22]0.25Bi18.51/38.4−103.5
[23]0.02226.20.8/210.24−108.5−183.6
[24]0.02226.20.8/200.24 core−109.2−184.2
[25]0.0419.11.1/16.60.08 core−106.4
[26]0.18321.2/541.3 × 1.3−108.0−177.7
[27]0.12451.2/19.20.25−93−173.0
[28]0.1316.21.2/5.8simulated−113.7−190.3
[29]0.02819.81.3/75−101.2−168.4
[30]0.1337.7−/16.2−121@10−180.6
[31]0.183.4 1.7/19.21.2 × 1.2−125.7 −185.4
[32]0.1817.5−/2.30.56 × 0.183 (core)−110.77−191.95
This0.188.531.7/5.841.2 × 1.2−122.4−193.4
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Jang, S.-L.; Lin, Z.-J.; Juang, M.-H. State-of-the-Art VCO with Eight-Shaped Resonator-Type Transmission Line. Electronics 2025, 14, 2322. https://doi.org/10.3390/electronics14122322

AMA Style

Jang S-L, Lin Z-J, Juang M-H. State-of-the-Art VCO with Eight-Shaped Resonator-Type Transmission Line. Electronics. 2025; 14(12):2322. https://doi.org/10.3390/electronics14122322

Chicago/Turabian Style

Jang, Sheng-Lyang, Zi-Jun Lin, and Miin-Horng Juang. 2025. "State-of-the-Art VCO with Eight-Shaped Resonator-Type Transmission Line" Electronics 14, no. 12: 2322. https://doi.org/10.3390/electronics14122322

APA Style

Jang, S.-L., Lin, Z.-J., & Juang, M.-H. (2025). State-of-the-Art VCO with Eight-Shaped Resonator-Type Transmission Line. Electronics, 14(12), 2322. https://doi.org/10.3390/electronics14122322

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