Highly Linear 2.6 GHz Band InGaP/GaAs HBT Power Amplifier IC Using a Dynamic Predistorter

Abstract

This paper presents a highly linear two-stage InGaP/GaAs power amplifier integrated circuit (PAIC) using a dynamic predistorter for 5G small-cell applications. The proposed predistorter, based on a diode-connected transistor, utilizes a supply voltage to accurately control the linearization characteristics by adjusting its dc current. It is connected in parallel with an inter-stage of the two-stage PAIC through a series configuration of a resistor and an inductor, and features a shunt capacitor at the base of the transistor. These passive components have been optimized to enhance the linearization performance by managing the RF signal’s coupling to the diode. Using these optimized components, the AM−AM and AM−PM nonlinearities arising from the nonlinear resistance and capacitance in the diode can be effectively used to significantly flatten the AM−AM and AM−PM characteristics of the PAIC. The proposed predistorter was applied to the 2.6 GHz two-stage InGaP/GaAs HBT PAIC. The IC was tested using a 5 × 5 mm² module package based on a four-layer laminate. The load network was implemented off-chip on the laminate. By employing a continuous-wave (CW) signal, the AM−AM and AM−PM characteristics at 2.55–2.65 GHz were improved by approximately 0.05 dB and 3°, respectively. When utilizing the new radio (NR) signal, based on OFDM cyclic prefix (CP) with a signal bandwidth of 100 MHz and a peak-to-average power ratio (PAPR) of 9.7 dB, the power-added efficiency (PAE) reached at least 11.8%, and the average output power was no less than 24 dBm, achieving an adjacent channel leakage power ratio (ACLR) of −40.0 dBc.

1. Introduction

In recent years, as wireless communication systems have advanced, the need for higher data rates and more efficient management of increasing mobile traffic has become crucial. Small cells, designed to provide reliable coverage in confined areas, are now densely deployed to achieve high spatial and spectral efficiency at increased data rates, making them an essential component in 5G and future wireless networks [1]. For these networks, orthogonal frequency division multiplexing (OFDM) is utilized for both uplink and downlink communications. The OFDM-based modulated signal, characterized by high PAPR, imposes stringent linearity requirements on PAs, especially in small-cell applications [2].

Additionally, the PA consumes a significant amount of power; hence, high efficiency is crucial. To enhance power efficiency, PAs with low quiescent current such as class-AB have been utilized [3,4]. However, operating with low quiescent current may lead to nonlinear distortion in both AM−AM and AM−PM. To achieve the required linearity specifications, particularly for modulated signals with high PAPR, the PA operates in a large Output Power Back-Off (OBO) region. As OBO increases to improve linearity, the PAE decreases. Consequently, there is a need for research into linearization techniques for small-cell PAs with low quiescent current to enable more efficient operations.

Accordingly, various linearization techniques have been investigated, and external approaches such as digital predistortion (DPD) and analog predistortion (APD) have been widely applied [5,6,7,8,9]. While DPD has become the mainstream solution in recent years, it requires high-speed data converters, complex digital signal processing, and significant power consumption, which may limit its applicability in compact and low-power systems. In contrast, APD offers several advantages, including lower power consumption, real-time operation without latency, and simplified hardware implementation. The APD techniques include feedback [5], feedforward [6], and predistortion [7,8,9]. The feedback technique offers advantages in linearity and stability but results in reduced gain. Feedforward linearization achieves significant improvements in linearity but requires an additional error amplifier, complicating its integration as an IC. Predistortion linearization typically provides moderate linearity enhancements at a relatively low additional cost and benefits from its compact size, low complexity, and enhanced stability. As depicted in Figure 1, predistortion linearization operates by flattening the overall AM−AM and AM−PM characteristics through a predistorter, which possesses characteristics opposite to those of a nonlinear PA. Consequently, this results in linear signal amplification at the output.

Generally, since PAs tend to exhibit gain compression characteristics, designing a predistorter with gain expansion characteristics is necessary to counteract the PA’s gain compression [7,8,9]. However, when PAs operate with low quiescent current to boost efficiency, they exhibit a more dynamic response in their amplitude response (AM−AM) where gain expansion appears before gain compression. A similar dynamic is noticeable in the phase response (AM−PM). Specifically, the InGaP/GaAs HBT PA displays dynamic nonlinear characteristics that vary based on the configuration of its active bias circuits [3,4]. The AM−PM characteristics also change depending on the harmonic impedance at the matching network and the active bias circuits. Therefore, a predistorter capable of compensating for these dynamic AM−AM and AM−PM characteristics of the InGaP/GaAs HBT PA is essential.

This paper proposes a predistorter that dynamically compensates for the nonlinear characteristics of the two-stage InGaP/GaAs HBT PAIC used in 5G small-cell applications. It comprises a diode-connected transistor, a shunt capacitor at the base, and a series-connected inductor and resistor that link the emitter to the inter-stage matching network in parallel. These passive components optimize the RF signal coupling to the diode, which significantly influences the nonlinear characteristics of the predistorter. Furthermore, the nonlinear behavior of the proposed predistorter can be controlled by supplying a dc current to its base collector. Through the integration of these control mechanisms, the predistorter’s nonlinearity can dynamically respond to varying input power levels. The performance is evaluated before and after applying predistortion linearization by measuring the fabricated PAIC using both CW and modulated signals.

2. Design of the Dynamic Predistorter

2.1. Circuit Configuration

The conventional shunt diode predistorter depicted in Figure 2a uses a biased diode connected in parallel to the RF signal path with a series capacitor ($C_{opt}$) [9]. $C_{opt}$ directly affects the RF power coupling to the predistorter. The voltage distribution across the predistorter is divided between the diode and $C_{opt}$. The nonlinearity of the diode is represented by a nonlinear resistance, $R_{diode}$, which is adjustable through the reference voltage ($V_{REF}$). Thus, the conventional predistorter, with two parameters ($C_{opt}$ and $V_{REF}$), offers limited control over its ability to compensate for the dynamic nonlinear characteristics of PAs.

The proposed dynamic predistorter, illustrated in Figure 2b, utilizes a suitably biased diode-connected bipolar transistor (Q3). It is connected in parallel to the RF signal path at the inter-stage matching network via a series resistor ($R_E$) and inductor ($L_E$). A shunt capacitor ($C_{PD}$) is added at the base of Q3 to provide degeneration to Q3. The degeneration capacitance, $C_{PD}$, works with the diode, $R_E$, and $L_E$ to divide the voltage [10]. $R_E$ and $L_E$ primarily regulate the signal coupling from the RF signal path. The voltage across the proposed predistorter is then split among the diode, $C_{PD}$, $R_E$, and $L_E$. The proposed predistorter features additional control parameters such as $C_{PD}$, $V_{REF}$, $R_E$, and $L_E$, which influence the overall nonlinearities generated by the predistorter and enhance the capability to compensate for dynamic nonlinear characteristics across a wide power range of the PA.

2.2. Dynamic Compensation of Nonlinearities

Figure 3 illustrates the simulated AM−AM and AM−PM characteristics of the predistorter based on various tuning parameter values, such as $C_{PD}$, $V_{REF}$, $R_E$, and $L_E$. Figure 3a depicts the AM−AM and AM−PM characteristics for five distinct values of $C_{PD}$ with a $V_{REF}$ of 3.1 V, $R_{REF}$ of 300 $\Omega$, $L_E$ of 3 nH, and $R_E$ of 15 $\Omega$. As $C_{PD}$ decreases, capacitive degeneration intensifies, leading to a significant increase in AM−PM variation. Particularly for values above 3 pF, the AM−PM variation becomes pronounced, while the AM−AM characteristics show limited change with dynamic responses involving compression and expansion. Figure 3b demonstrates the AM−AM and AM−PM performance for five varying values of $V_{REF}$ with an $R_{REF}$ of 300 $\Omega$, a $C_{PD}$ of 5 pF, an $L_E$ of 3 nH, and an $R_E$ of 15 $\Omega$. As $V_{REF}$ decreases, the predistorter facilitates earlier and more pronounced variations in both AM−AM and AM−PM characteristics. Figure 3c showcases the AM−AM and AM−PM performance for five different values of $L_E$ with a $V_{REF}$ of 3.1 V, an $R_{REF}$ of 300 $\Omega$, a $C_{PD}$ of 5 pF, and an $R_E$ of 15 $\Omega$. Smaller $L_E$ values lead to greater RF signal coupling to the diode, which amplifies both the variation and dynamism in the AM−AM and AM−PM characteristics. For high $L_E$ values, the AM−PM characteristics tend to expand further. Figure 3d displays the AM−AM and AM−PM characteristics for five different values of $R_E$ with a $V_{REF}$ of 3.1 V, an $R_{REF}$ of 300 $\Omega$, a $C_{PD}$ of 5 pF, and an $L_E$ of 3 nH. Smaller $R_E$ values enhance RF signal coupling to the diode, inducing greater variation across a relatively higher-input power spectrum.

The proposed predistorter is integrated into a two-stage PA employing an InGaP/GaAs HBT process, depicted in Figure 4. The emitter areas of the driver and main stages are 1440 and 5400 μm², respectively. Active bias circuits, which supply current to the transistor’s base, are implemented in both the driver and main stages. The inter-stage matching network consists of two high-pass L-section circuits, incorporating a shunt inductor to provide both impedance matching and a DC current path for the predistorter. The predistorter, connected in parallel at the inter-stage matching network, minimally influences the impedance matching. The emitter area of Q3 measures 120 μm².

Figure 5a demonstrates the simulated AM−AM and AM−PM characteristics of the two-stage HBT PAIC before and after the inclusion of the proposed dynamic predistorter. The predistorter’s tuning parameters were optimized to achieve optimal AM−AM and AM−PM compensation with a $V_{REF}$ of 3.1 V, $R_{REF}$ of 300 $\Omega$, $C_{PD}$ of 5 pF, $L_E$ of 3 nH, and $R_E$ of 15 $\Omega$. After applying the predistorter, noteworthy improvements in both the AM−AM and AM−PM characteristics were observed, effectively mitigating both the expansion and compression in the AM−AM characteristics and the significant expansion in the AM−PM characteristics. Specifically, the AM−AM improved by approximately 0.43 dB, while the AM−PM improved by about 4.7°. The ACLR, using the 5G NR signal based on QPSK CP-OFDM with a high PAPR of 9.7 dB, was enhanced by about 10 dB at an average output power of 24 dBm, as illustrated in Figure 5b.

3. Implementation and Measurement Results

Figure 6a displays a photograph of the implemented PAIC measuring 1.2 × 1.1 mm², employing Winsemiconductor’s 2 μm InGaP/GaAs HBT process. Figure 6b shows a photograph of the module measuring 5 × 5 mm² using a four-layer laminate. The diode-connected transistor and the shunt capacitor for the predistorter are integrated, whereas the $R_E$ and $L_E$ are external for tuning. The output-matching network consists of bond wires, surface-mount capacitors, and lines on the laminate. A $V_{REF}$ of 3.1 V is supplied to the active bias circuits for both the driver and main stage.

Figure 7 shows the measured gain and PAE of the implemented PAIC with and without the predistorter using a CW signal. After applying the predistorter, the PAIC exhibited a gain of approximately 26.5–27.1 dB and a PAE of about 53% at an output power of 35 dBm across the 2.5–2.7 GHz frequency range. Compared to the case without the predistorter, a gain reduction of approximately 0.5 dB and an efficiency degradation of around 0.5% were observed. Figure 8 displays the measured AM−AM and AM−PM characteristics of the implemented PAIC with and without the predistorter using a CW signal at 2.55 GHz in Figure 8a and 2.65 GHz in Figure 8b. With the predistorter for both frequencies, it is observed that the saturated output power is extended by approximately 0.05 dB according to the AM−AM characteristics. These characteristics appear noticeably flatter. The AM−PM characteristics also demonstrate an improvement of more than 3°.

Figure 9 illustrates the measured performances of the PAIC for the carrier frequencies of 2.55–2.65 GHz using a 5G NR QPSK CP-OFDM signal with 273 RBs and a signal bandwidth of 100 MHz. Figure 9a presents the gain and PAE, while Figure 9b outlines the ACLR with and without the predistorter. At an average output power of 24.0 dBm, an ACLR below −40.0 dBc was achieved with the predistorter, compared to approximately −34.4 dBc without it. The gain and PAE at an average power of 24 dBm were recorded as 26.5–27.1 dB and 11.8%, respectively. The measurement results of this study are summarized in

Table 1. Performance summary and comparison to previously reported GaAs HBT PAICs.

Ref.	Freq. (GHz)	Ppeak (dBm)	Modulated Signal	PAPR (dB)	ACLR (dBc)	Pavg (dBm)	OBO (dB)	PAEavg (%)
[8]	2.6	32.14	LTE 20M	-	−47	25.6	6.5	17.2
[11]	1.7–2.05	31	LTE 20M	7.88	−30	28	3	40
[12]	2.3–2.6	32.8	64-QAM 20M	6.1	−33.2	16.4	16.4	5 *
[13]	2.3–2.7	35	NR 20M	10.83	−34	28–29	6–7	27
This work	2.5–2.7	35	NR 100M	9.7	−40	24	11	11.8

* Graphically estimated.

. Compared to previous works, this study demonstrates exceptional ACLR performance using a modulated signal with a wide signal bandwidth of 100 MHz and a high PAPR of 9.7 dB. The relatively low PAE is primarily attributed to the significantly large OBO of 11 dB.

4. Conclusions

In this paper, a highly linear two-stage InGaP/GaAs PAIC using a dynamic predistorter was proposed for 5G small-cell applications. The proposed predistorter is based on a diode-connected transistor placed in parallel at the inter-stage network. The AM−AM and AM−PM characteristics of the predistorter can be dynamically controlled and optimized to effectively compensate for the nonlinearities of the two-stage PA by adjusting the supply voltage to the diode and the passive elements surrounding the diode, such as a shunt capacitor at the base for degeneration and a series resistor and inductor at the emitter to couple the signal. Simulated dynamic characteristics were presented with various control parameter values. For verification purposes, a two-stage PAIC was designed and implemented using Winsemiconductor’s 2 μm InGaP/GaAs HBT process for the 2.55–2.65 GHz band. It was mounted on a four-layer laminate module measuring 5 × 5 mm². Employing a 5G NR signal with a bandwidth of 100 MHz and a PAPR of 9.7 dB, the system achieved a PAE of at least 11.8% and an average output power of at least 24 dBm, with an ACLR of −40.0 dBc using a predistorter. The use of the predistorter improved the ACLR from approximately −34.4 dBc to −40.0 dBc. Furthermore, the predistorter enhanced the average output power by about 4 dB while maintaining an ACLR level of −40 dBc.