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Article

Adaptive Threshold Wavelet Denoising Method and Hardware Implementation for HD Real-Time Processing

Department of Microelectronics, Xi’an Jiaotong University, 28 Xianning Road, Xi’an 710049, China
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Author to whom correspondence should be addressed.
Electronics 2025, 14(11), 2130; https://doi.org/10.3390/electronics14112130
Submission received: 2 April 2025 / Revised: 9 May 2025 / Accepted: 12 May 2025 / Published: 23 May 2025

Abstract

To meet the demands of real-time and high-definition (HD) image processing applications, denoising methods must be both computationally efficient and hardware friendly. Traditional image denoising techniques are typically simple, fast, and resource-efficient but often fall short in terms of denoising performance and adaptability. This paper proposes an adjustable-threshold denoising method along with a corresponding hardware implementation designed to support the real-time processing of large-array images commonly used in image signal processors (ISPs). The proposed technique employs a LeGall 5/3 wavelet with a row-transform structure and multilevel decomposition. A 2D Pyramid VisuShrink thresholding algorithm is introduced, where the threshold is derived from the median value of the HH sub-band using a multi-stage segmentation approach. To further optimize performance, a quantization strategy with fixed-point parameter design is applied to minimize storage requirements and computational errors. A specialized hardware architecture is developed to enable the real-time denoising of 4K images while adhering to constraints on speed and resource utilization. The architecture incorporates a finite state machine (FSM) and a reusable median calculation unit to efficiently share threshold-related storage and computational resources. The system is implemented and verified on an FPGA, achieving real-time performance at a maximum frequency of 230 MHz. It supports flexible input data formats with resolutions up to 4096×4096 pixels and 16-bit depth. Comprehensive comparisons with other real-time denoising methods demonstrate that the proposed approach consistently achieves better PSNR and SSIM across various noise levels and image sizes. In addition to delivering improved denoising accuracy, the hardware implementation offers advantages in processing speed and resource efficiency while supporting a wide range of large-array images.
Keywords: denoising; VisuShrink threshold; LeGall 5/3 wavelet; FPGA denoising; VisuShrink threshold; LeGall 5/3 wavelet; FPGA

Share and Cite

MDPI and ACS Style

Wang, X.; Zhao, J. Adaptive Threshold Wavelet Denoising Method and Hardware Implementation for HD Real-Time Processing. Electronics 2025, 14, 2130. https://doi.org/10.3390/electronics14112130

AMA Style

Wang X, Zhao J. Adaptive Threshold Wavelet Denoising Method and Hardware Implementation for HD Real-Time Processing. Electronics. 2025; 14(11):2130. https://doi.org/10.3390/electronics14112130

Chicago/Turabian Style

Wang, Xuhui, and Jizhong Zhao. 2025. "Adaptive Threshold Wavelet Denoising Method and Hardware Implementation for HD Real-Time Processing" Electronics 14, no. 11: 2130. https://doi.org/10.3390/electronics14112130

APA Style

Wang, X., & Zhao, J. (2025). Adaptive Threshold Wavelet Denoising Method and Hardware Implementation for HD Real-Time Processing. Electronics, 14(11), 2130. https://doi.org/10.3390/electronics14112130

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