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To meet the demands of real-time and high-definition (HD) image processing applications, denoising methods must be both computationally efficient and hardware friendly. Traditional image denoising techniques are typically simple, fast, and resource-efficient but often fall short in terms of denoising performance and adaptability. This paper proposes an adjustable-threshold denoising method along with a corresponding hardware implementation designed to support the real-time processing of large-array images commonly used in image signal processors (ISPs). The proposed technique employs a LeGall 5/3 wavelet with a row-transform structure and multilevel decomposition. A 2D Pyramid VisuShrink thresholding algorithm is introduced, where the threshold is derived from the median value of the HH sub-band using a multi-stage segmentation approach. To further optimize performance, a quantization strategy with fixed-point parameter design is applied to minimize storage requirements and computational errors. A specialized hardware architecture is developed to enable the real-time denoising of 4K images while adhering to constraints on speed and resource utilization. The architecture incorporates a finite state machine (FSM) and a reusable median calculation unit to efficiently share threshold-related storage and computational resources. The system is implemented and verified on an FPGA, achieving real-time performance at a maximum frequency of 230 MHz. It supports flexible input data formats with resolutions up to 4096×4096 pixels and 16-bit depth. Comprehensive comparisons with other real-time denoising methods demonstrate that the proposed approach consistently achieves better PSNR and SSIM across various noise levels and image sizes. In addition to delivering improved denoising accuracy, the hardware implementation offers advantages in processing speed and resource efficiency while supporting a wide range of large-array images. Full article