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Morabito M, Lusardi N, Garzetti F, Fiumicelli G, Bonanno G, Ronconi E, Costa A, Geraci A. Optimal Implementation of Tapped Delay Line Time-to-Digital Converters in 20 nm Xilinx UltraScale FPGAs. Electronics. 2024; 13(24):4888. https://doi.org/10.3390/electronics13244888

Morabito, Mattia, Nicola Lusardi, Fabio Garzetti, Gabriele Fiumicelli, Gabriele Bonanno, Enrico Ronconi, Andrea Costa, and Angelo Geraci. 2024. "Optimal Implementation of Tapped Delay Line Time-to-Digital Converters in 20 nm Xilinx UltraScale FPGAs" Electronics 13, no. 24: 4888. https://doi.org/10.3390/electronics13244888

Morabito, M., Lusardi, N., Garzetti, F., Fiumicelli, G., Bonanno, G., Ronconi, E., Costa, A., & Geraci, A. (2024). Optimal Implementation of Tapped Delay Line Time-to-Digital Converters in 20 nm Xilinx UltraScale FPGAs. Electronics, 13(24), 4888. https://doi.org/10.3390/electronics13244888