The Impact of Gate Annealing on Leakage Current and Radio Frequency Efficiency in AlGaN/GaN High-Electron-Mobility Transistors

Round 1

Reviewer 1 Report

Comments and Suggestions for Authors

This study provides a good starting point for exploring the effects of gate annealing on the electrical properties of GaN RF HEMTs. However, there is a lack of a clear mechanism to explain the effect of gate annealing process on GaH HEMTs. As a result, some suggestions are listed as follows:

 1. Please clarify the mechanism of why and how the gate annealing process is attributed to the better quality of the gate interface and reduced defect densities.

 2. Authors can consider utilizing multi-frequency C–V measurements to assess the interface defects in the GaN HEMTs with and without gate annealing process, which is an effective technique to evaluate the trap density and can strengthen the argumentation of this research.

 3. Besides the DC and RF measurement, authors can consider conducting load-pull measurements to investigate the large-signal behaviors of the GaH HEMTs with and without gate annealing process, and find the correlation with the existing data. 

Comments on the Quality of English Language

That's fine.

Author Response

Dear Reviewer,

We would like to express our sincere gratitude for the insightful and constructive comments you provided on our manuscript titled "Gate Annealing Impact on Leakage Current and RF Efficiency in AlGaN/GaN High Electron Mobility Transistors". Your feedback has been invaluable in helping us improve the quality and clarity of our work. Below, we have outlined the revisions made in response to your comments:

 

This study provides a good starting point for exploring the effects of gate annealing on the electrical properties of GaN RF HEMTs. However, there is a lack of a clear mechanism to explain the effect of gate annealing process on GaH HEMTs. As a result, some suggestions are listed as follows:

Comment 1: Please clarify the mechanism of why and how the gate annealing process is attributed to the better quality of the gate interface and reduced defect densities.

Response 1: Thank you for the insightful comment. We appreciate your suggestion to clarify the mechanism behind how the gate annealing process contributes to the improved gate interface quality and reduced defect densities. We have strengthened the relevant sections in the Discussion and Introduction of the manuscript. Specifically, we now emphasize that during the gate annealing process, high-temperature annealing facilitates defect reconstruction and impurity removal at the GaN HEMT gate interface. This process leads to a reduction in interface trap density, improving the overall charge trapping characteristics at the interface.

Comment 2: Authors can consider utilizing multi-frequency C–V measurements to assess the interface defects in the GaN HEMTs with and without gate annealing process, which is an effective technique to evaluate the trap density and can strengthen the argumentation of this research.

Response 2: Thank you for the thoughtful recommendation regarding the use of multi-frequency C–V measurements. We agree that C–V characterization would provide deeper insights into the interface trap densities of the devices. However, conducting this experiment was beyond the scope of our current work. We have acknowledged this as a potential direction for future research, and mentioned it in the conclusion section. 

Comment 3: Besides the DC and RF measurement, authors can consider conducting load-pull measurements to investigate the large-signal behaviors of the GaH HEMTs with and without gate annealing process, and find the correlation with the existing data.

Response 3: Thank you for your suggestion to include load-pull measurements to further investigate the large-signal behaviors of the devices. We acknowledge that load-pull measurements would offer valuable insights into the large-signal performance of GaN HEMTs. While this was not included in the current study, we have added a note in the Conclusion indicating that this would be an interesting avenue for future exploration.

 

We believe these revisions have significantly improved the clarity and depth of our manuscript, and we hope that the changes satisfy the reviewers' concerns. We look forward to your feedback and appreciate the opportunity to improve our work.

Sincerely,

Junhyung Kim

Author Response File: Author Response.pdf

Reviewer 2 Report

Comments and Suggestions for Authors

The authors investigate and quantify the impact of gate annealing on leakage current and RF efficiency in AlGaN/GaN high electron mobility transistors (HEMTs). I have the following comments and suggestions for improvement:

1.      Introduction: The manuscript references several previous studies on gate annealing in AlGaN/GaN HEMTs (refs 15 to 23). However, it’s unclear what new insights this work provides compared to prior research. Could the authors elaborate on the novelty and unique contributions of this study?

2.      Methods: The term "non-contact mobility measurement" is mentioned, but no details are provided. A brief description of the measurement methodology would be helpful for clarity.

3.      Figure 2: The STEM image in Figure 2 lacks clarity, particularly in the critical gate region. As the SiC substrate is not the focus, I recommend using a higher magnification image highlighting the key areas, especially the gate region and the interface.

4.      Process Flow Description: The process flow explanation is somewhat lengthy. A simplified flow chart summarizing the main steps would greatly enhance readability and comprehension.

5.      Section 3.1: The comparison of DC characteristics using GmG_mGm​ curves for annealed vs. un-annealed devices is presented, but summarizing the Gm peaks in a box plot would make the differences more apparent. Additionally, since the Gm difference between samples is relatively minor, including more data and showing the statistical distribution of Gm would strengthen the conclusions.

6.      Clarification of Behavior: The authors state that annealed samples exhibit “different behavior” compared to un-annealed devices based on Gm data. Could the authors provide a more detailed explanation for the degradation in Gm after annealing and its subsequent recovery after completing all process steps?

7.      Figure 3: The legends and axis labels in the insets of Figure 3 are too small, making them difficult to read. Please consider enlarging these elements for clarity.

8.      Figure 4 and Text Consistency: Figure 4 shows the gate leakage current comparison, but the values (mA/um) differ from those reported in the text (µA). Please ensure consistency between the figure and the values stated in Section 3.1.

9.      Section 3.2: The authors attribute RF efficiency improvements to reduced defect densities and enhanced carrier mobilities. However, mobility values are only provided for as-deposited devices. To support this claim, it would be beneficial to include mobility data for the annealed samples.

 

10.  Conclusion: The improvement in HEMT performance is attributed to reduced interface trap densities. This conclusion would be stronger if supported by additional data, such as further STEM characterizations or Dit extractions.  If such data is not available, consider rephrasing this statement to reflect a more tentative interpretation.

 

 

Author Response

Dear Reviewer,

We sincerely appreciate the time and effort you have dedicated to reviewing our manuscript, titled “Gate Annealing Impact on Leakage Current and RF Efficiency in AlGaN/GaN High Electron Mobility Transistors”. Your insightful and constructive comments have been extremely valuable in improving the clarity and depth of our research. We have carefully considered each of your suggestions and have made the following revisions to the manuscript:

 

The authors investigate and quantify the impact of gate annealing on leakage current and RF efficiency in AlGaN/GaN high electron mobility transistors (HEMTs). I have the following comments and suggestions for improvement:

Comment 1: Introduction: The manuscript references several previous studies on gate annealing in AlGaN/GaN HEMTs (refs 15 to 23). However, it’s unclear what new insights this work provides compared to prior research. Could the authors elaborate on the novelty and unique contributions of this study?

Response 1: Thank you for your insightful comment. While many previous studies have indeed focused on the changes before and after post-annealing, our study not only investigates the effects before and after gate annealing but also examines the progression of these effects as the fabrication process continues. We quantitatively compare the leakage current characteristics of both annealed and non-annealed devices, showing that the most significant changes occur not immediately after annealing but rather upon the completion of the entire process. This suggests that the gate annealing process has a cumulative effect, which becomes more apparent after all fabrication steps are finalized.

Comment 2: Methods: The term "non-contact mobility measurement" is mentioned, but no details are provided. A brief description of the measurement methodology would be helpful for clarity.

Response 2: Thank you for your feedback. The mobility values mentioned in the manuscript were provided by the wafer manufacturer, SweGaN. To avoid any confusion, we have removed the reference to "non-contact mobility measurement" and clarified the source of the data.

Comment 3: Figure 2: The STEM image in Figure 2 lacks clarity, particularly in the critical gate region. As the SiC substrate is not the focus, I recommend using a higher magnification image highlighting the key areas, especially the gate region and the interface.

Response 3: Thank you for your suggestion. We agree with your comment and have replaced the image with a higher magnification version and added clear labels to highlight the critical regions, particularly around the gate area, to ensure the figure is more meaningful and informative.

Comment 4: Process Flow Description: The process flow explanation is somewhat lengthy. A simplified flow chart summarizing the main steps would greatly enhance readability and comprehension.

Response 4: Thank you for your suggestion. In response, I have summarized the process flow in a chart to provide a clearer overview. I appreciate your helpful recommendation.

Comment 5: Section 3.1: The comparison of DC characteristics using GmG_mGm​curves for annealed vs. un-annealed devices is presented, but summarizing the Gm peaks in a box plot would make the differences more apparent. Additionally, since the Gm difference between samples is relatively minor, including more data and showing the statistical distribution of Gm would strengthen the conclusions.

Response 5: Thank you for your valuable point. However, during the experiment, a wide variety of splits were performed for each wafer, which unfortunately did not allow us to collect enough data to provide robust statistical analysis. We kindly ask for your understanding of this limitation. Also, as you pointed out, the difference in gm is not particularly large. However, the focus of our findings is that, in the case where gate annealing was not performed, gm decreased as the process progressed, whereas in the case with gate annealing, gm increased. This distinction is central to our analysis.

Commnet 6: Clarification of Behavior: The authors state that annealed samples exhibit “different behavior” compared to un-annealed devices based on Gm data. Could the authors provide a more detailed explanation for the degradation in Gm after annealing and its subsequent recovery after completing all process steps?

Response 6: Thank you for your suggestion. As mentioned in the response to Comment 5, we aimed to emphasize that, in the case where gate annealing was not performed, gm decreased as the process progressed, while in the case with gate annealing, gm increased. To further support this finding, I have incorporated additional references and expanded the discussion accordingly.

Comment 7: Figure 3: The legends and axis labels in the insets of Figure 3 are too small, making them difficult to read. Please consider enlarging these elements for clarity.

Response 7: Thank you for pointing this out. We have revised the figure to enlarge the labels and make them more legible for better clarity.

Comment 8: Figure 4 and Text Consistency: Figure 4 shows the gate leakage current comparison, but the values (mA/um) differ from those reported in the text (µA). Please ensure consistency between the figure and the values stated in Section 3.1.

Response 8: Thank you for your careful review. We have corrected the values in the text to ensure consistency with the figure and have also added a table for further clarity.

Comment 9: Section 3.2: The authors attribute RF efficiency improvements to reduced defect densities and enhanced carrier mobilities. However, mobility values are only provided for as-deposited devices. To support this claim, it would be beneficial to include mobility data for the annealed samples.

 Response 9: Thank you for your valuable feedback. The mobility data in the method section was provided as an average value for the wafer group, and I realize that this may not have conveyed the information accurately. I have now revised the manuscript to present the mobility data separately for each wafer, providing a clearer and more precise representation of the results.

Comment 10: Conclusion: The improvement in HEMT performance is attributed to reduced interface trap densities. This conclusion would be stronger if supported by additional data, such as further STEM characterizations or Dit extractions. If such data is not available, consider rephrasing this statement to reflect a more tentative interpretation.

Response 10: Thank you for the thoughtful suggestion. While we conducted STEM analysis, we did not observe any significant differences resulting from the annealing process, which is why this data was not included in the paper. Additionally, we were unable to perform Dit extraction through C-V measurements in this current study. We have proposed these analyses as potential directions for future research in the conclusion. As you recommended, we have also revised the discussion to ensure that the statements regarding the reduction of interface traps do not cause any misunderstandings.

 

We hope that the revisions we have made address all of your concerns and improve the overall quality of our manuscript. We are grateful for your constructive feedback, which has helped us strengthen the clarity and depth of our work. Please let us know if further adjustments are required.

Sincerely,

Junhyung Kim

Author Response File: Author Response.pdf

Reviewer 3 Report

Comments and Suggestions for Authors

 

This paper describes the effect of gate annealing on the DC, like transconductance, threshold voltage variation, and RF performance. After annealing, DC and RF performance indeed have some enhancements. However, it cannot confirm annealing process can enhance device reliability, as discussed in abstract, since this paper does not include the reliability test, like stress and temperature dependence test. So, this paper cannot be accepted at current form.

1.  I strongly recommend you do some stress testing and observe what happens to your two kinds of HEMTs if you want to emphasize the reliability issues. Otherwise, you should include it in the future research direction.

2.      More background information to emphasize the importance of gate annealing should be discussed, such as, “Effect of the post-gate annealing on the gate reliability of AlGaN/GaN HEMTs”, “Improving Current ON/OFF Ratio and Subthreshold Swing of Schottky- Gate AlGaN/GaN HEMTs by Postmetallization Annealing”, etc.

3.      For Fig. 1(b), you should label the layer information, such as which layer is AlGaN or GaN.

4.      For line 57, can you describe the non-mobility measurement of mobility etc. in detail?

5.      Can you discuss the Vth variation (pls give what method to extract Vth) and list the Gm and Vth in a table to help reader understand?

6.      label of inset in Fig. 3 is not so clear, so you can choose at some point of OFF bias, such as VGT = VG-Vth = -1 V to extract the drain current and list it in table?

7.      In Fig.4 description, you should use mA/mm instead of µA.

8.      What is the x, y axis inf Fig. 5? please label it.

9.  Can you include more discussion in the reason why peak transconductance increase and Vth shift? Maybe you can refer “Irradiation-and Bias-Stress-Induced Charge Trapping and Gate Leakage in AlGaN/GaN HEMTs” , “Worst-case bias for high voltage, elevated-temperature stress of AlGaN/GaN HEMTs”, “Comparative Study on Charge Trapping Induced  Shift for GaN-Based MOS-HEMTs With and Without Thermal Annealing Treatment” to discuss it.

 

 

Author Response

Dear Reviewer,

We would like to express our sincere gratitude for your thorough review of our manuscript titled, " Gate Annealing Impact on Leakage Current and RF Efficiency in AlGaN/GaN High Electron Mobility Transistors". Your insightful comments have been invaluable in improving the quality of our work. Below, we provide a detailed response to each of your comments and outline the corresponding revisions made to the manuscript.

This paper describes the effect of gate annealing on the DC, like transconductance, threshold voltage variation, and RF performance. After annealing, DC and RF performance indeed have some enhancements. However, it cannot confirm annealing process can enhance device reliability, as discussed in abstract, since this paper does not include the reliability test, like stress and temperature dependence test. So, this paper cannot be accepted at current form.

Response 1: I strongly recommend you do some stress testing and observe what happens to your two kinds of HEMTs if you want to emphasize the reliability issues. Otherwise, you should include it in the future research direction.

Comment 1: Thank you for your insightful comment. I agree that the term "enhanced reliability" used in the paper may cause some misunderstanding, as reducing leakage current alone does not necessarily indicate improved device reliability. I have revised the wording to avoid this confusion. As you suggested, I will include additional stress testing and reliability-related experiments in future research to address this point more comprehensively. I mentioned this content as further work in the conclusion.

Comment 2: More background information to emphasize the importance of gate annealing should be discussed, such as, “Effect of the post-gate annealing on the gate reliability of AlGaN/GaN HEMTs”, “Improving Current ON/OFF Ratio and Subthreshold Swing of Schottky- Gate AlGaN/GaN HEMTs by Postmetallization Annealing”, etc.

Response 2: I have incorporated more background information to emphasize the significance of gate annealing in improving the performance of AlGaN/GaN HEMTs. Specifically, I have referred to studies “Improving Current ON/OFF Ratio and Subthreshold Swing of Schottky-Gate AlGaN/GaN HEMTs by Postmetallization Annealing,” which demonstrate the impact of postmetallization annealing in reducing interface traps and improving device stability.

Comment 3: For Fig. 1(b), you should label the layer information, such as which layer is AlGaN or GaN.

Response 3: I have updated Figure 1(b) to include labels that clearly indicate the different layers, including the AlGaN barrier and GaN channel. These additions will help clarify the device structure for the readers.

Comment 4: For line 57, can you describe the non-mobility measurement of mobility etc. in detail?

Response 4: Thank you for your feedback. The mobility values provided in the manuscript were obtained from the manufacturer, SweGaN, and reflect the material’s specifications. To avoid any potential confusion, I have revised the text to provide a clearer explanation and removed the mention of "non-contact mobility measurement." The revised version now presents the mobility values more straightforwardly, ensuring clarity for the reader.

Comment 5: Can you discuss the Vth variation (pls give what method to extract Vth) and list the Gm and Vth in a table to help reader understand?

Response 5: Thank you for your suggestion. In response, I have added a detailed explanation regarding the threshold voltage extraction method below the drain current description. The threshold voltage was determined using the constant current method, with a criterion of 1 mA/mm at Vds = 10 V. Additionally, I have included a table summarizing the transconductance (Gm) and threshold voltage (Vth) values for both the annealed and non-annealed devices to enhance clarity for the readers.

Comment 6: label of inset in Fig. 3 is not so clear, so you can choose at some point of OFF bias, such as VGT = VG-Vth = -1 V to extract the drain current and list it in table?

Response 6: Thank you for your suggestion. In response, I have modified the figure to use Vgt on the x-axis to facilitate easier comparison. While there was no significant difference in the on-current, I have highlighted the differences in the off-bias region in the table for clarity.

Comment 7: In Fig.4 description, you should use mA/mm instead of µA.

Response 7: Thank you for pointing out the unit inconsistency. I have corrected the unit from µA to mA/mm in the description of Figure 4. I appreciate your careful review and attention to detail.

Comment 8: What is the x, y axis inf Fig. 5? please label it.

Response 8: Thank you for your detailed review. I have carefully reviewed your suggestion regarding Figure 5. The axes in the figure represent the following: the x-axis corresponds to frequency, and the y-axis represents the Gain. I have updated the figure accordingly and added clear labels to both axes.

Comment 9: Can you include more discussion in the reason why peak transconductance increase and Vth shift? Maybe you can refer “Irradiation-and Bias-Stress-Induced Charge Trapping and Gate Leakage in AlGaN/GaN HEMTs” , “Worst-case bias for high voltage, elevated-temperature stress of AlGaN/GaN HEMTs”, “Comparative Study on Charge Trapping Induced  Shift for GaN-Based MOS-HEMTs With and Without Thermal Annealing Treatment” to discuss it.

Response 9: Thank you for your valuable suggestion. I have reviewed the papers you recommended and incorporated relevant discussions into the manuscript's discussion section. Regarding the threshold voltage shift, please note that initial differences between the devices due to process variation made direct comparison challenging. I appreciate your understanding of this limitation.

 

We hope that these revisions have adequately addressed your concerns, and we appreciate the constructive feedback you have provided. Your comments have significantly improved the clarity and quality of our manuscript.

Thank you once again for your time and valuable input.

Sincerely,
Junhyung Kim

 

Author Response File: Author Response.pdf

Round 2

Reviewer 1 Report

Comments and Suggestions for Authors

The revised version addressed the review.

Comments on the Quality of English Language

That's fine.

Reviewer 2 Report

Comments and Suggestions for Authors

The authors have addressed all my comments and revised the manuscript accordingly. 

Reviewer 3 Report

Comments and Suggestions for Authors

I have no further suggestions for this paper now.