An 18–19.2 GHz Voltage-Controlled Oscillator with a Compact Varactor-Only Capacitor Array

Abstract

This paper presents a K-band CMOS cross-coupled pair voltage-controlled oscillator (VCO) that utilizes the varactor-only capacitor network. The proposed circuit features low parasitics and a compact capacitor network, such that the varactor in the analog tuning path directly affects the oscillation frequency with a large gain of the VCO, and the varactor in the digital tuning path results in minimal noise sources, thus achieving low phase noise for the automotive FMCW radar application. This VCO was designed using TSMC 65 nm technology, and the post-layout simulation results show a stable oscillation across 18–19.2 GHz, a minimum phase noise of −105.9 and −128 dBc/Hz at 1- and 10-MHz offset frequencies while dissipating 21 mW of power from a 1 V supply. Furthermore, no notable variations in phase noise are observed across the oscillation frequency tuning range. It reveals a figure of merit (FOM) of −178.3 dBc/Hz while using a varactor-only capacitor array and occupying a small chip area.

1. Introduction

A low-phase noise voltage-controlled oscillator (VCO) with a wide oscillation frequency range is essential for the automotive frequency-modulated continuous wave (FMCW) radar application. The gain of the VCO, also known as $K_{VCO}$, plays the key role in the phase noise (PN) and loop characteristic of the phase-locked loop (PLL). To ensure a good phase noise performance, low $K_{VCO}$ is desired. However, increasing $K_{VCO}$ provides a more linear FMCW chirp signal and better PVT (process, voltage, temperature) performance [1].

Several approaches to improve the PN while not losing the power (current) efficiency have been reported earlier [1,2,3,4,5,6]. Among them, the Class-C technique operates the cross-coupled transistors with a less than 180-degree conduction mode and thus shapes the drain current into an impulse-like waveform and a tail capacitor [1,2]. The transformer-feedback technique can provide a better PN by obtaining a large oscillation amplitude with a reduced supply voltage, as demonstrated in [3,4]. Other VCOs utilizing the transformer as the wave shaper or impulse sensitivity function (ISF) manipulator have been presented [5,6]. These works achieve class-F_2,3 operation and, thereby, provide the symmetric rising and falling time with a steeper transition, which reduces the thermal noise injection from the transistors and 1/f noise up-conversion [7].

However, the aforementioned techniques are not suitable for FMCW radar applications around the K band. Firstly, significant parasitics, due to the transformers, limit the frequency tuning range. Furthermore, manual tuning (calibration) is often necessary for the transformer-based VCO to provide precise harmonic tuning and shaping. For the case of a class-C VCO, the use of tail current along with the added capacitor entails the accompanying noise, which can be up-converted to the oscillation frequency.

In this work, we present a low-power and compact VCO with a compact capacitor array. The proposed varactor-only capacitor array controls the gain of the VCO ($K_{VCO}$) and executes coarse- and fine-tuning. The shunt-feedback buffer is employed to provide the broadband output impedance without the use of off-chip matching components. The remainder of this paper is organized as follows: Section 2 reviews the proposed VCO architecture. The implementation of the VCO and relevant circuits is described in Section 3. Section 4 presents the simulation results of the proposed VCO, and conclusions are presented in Section 5.

2. Proposed Architecture

Figure 1 shows the proposed oscillator architecture, which includes the on-chip bias circuitry (bandgap reference and low drop-out regulator). The VCO core employs the varactor-only capacitor array, while the output buffer provides $50 \mathsf{\Omega }$ output impedance without any further matching network off-chip. On-chip bias circuitry provides a stable supply voltage to the VCO core and output buffer, such that the oscillator is immune to supply (VDD) pushing [8].

Figure 2 depicts two different implementations of capacitor arrays that can be used for millimeter-wave VCO. The conventional capacitor array on the left of Figure 2 is composed of an ac-coupled varactor and a high-Q capacitor that is switched on or off. The ac-coupled capacitor array benefits from a configuration where one side of the varactor is at the fixed dc-bias ($V_{BIAS}$), while the other side can be tuned with analog voltage ($V_{tune}$). However, due to the same configuration, the effective capacitance is reduced to $C_{fix}$ ∥ $C_{var}$ and thus suffers from a reduced tuning range and more parasitics. The capacitor ($C_{digital}$) for digital control can utilize high-Q capacitors such as MIM (metal-insulator-metal) and MOM (metal-oxide-metal) capacitors but requires complementary switching circuits with transistors and capacitors. Then, although the capacitor itself may provide superior performance to the varactor, additional circuitries degrade the performance of its tuning range, noise, and area.

To resolve the aforementioned issues as well as to support the high-frequency K-band operation, our proposed capacitor array utilizes only the varactors in its analog tuning ($V_{tune}$) and digital tuning ($\mathrm{EN}$), which is shown in Figure 2 (right). The varactors implemented in our VCO are based on the accumulation mode varactor, with its detailed behavior described in [9]. The number of fingers and the dimensions are carefully investigated to offer the best quality factor.

With digital tuning ($\mathrm{EN}$), the actual tuning range is determined by the value of the minimum- and maximum-capacitances of the varactor. With the compact configuration, void of transistors and resistors, the proposed capacitor array occupies less area and incurs less noise for the VCO. For the case of analog tuning ($V_{tune}$), the varactors are dc-coupled to the output node and thus provide a better tuning range than the conventional one.

3. Circuit Implementation

Figure 3 shows the detailed schematic of the proposed VCO. CMOS (Complementary Metal-Oxide-Semiconductor) cross-coupled pairs without a tail current are used to offer negative resistance with minimum parasitics at a millimeter-wave frequency range. An ultra-thick top metal (M9) is used to implement the inductor. From the simulation results, the inductance and quality factor of the implemented inductor is 100 pH and 30 at 18 GHz frequency, respectively.

The output of the VCO is delivered to the shunt-feedback output buffer in order to provide the impedance-matched interface ($50 \mathsf{\Omega }$) to the off-chip. The adopted buffer topology shown in Figure 4 provides broadband operation and low harmonic distortions with minimal loading effect to the VCO [10]. Furthermore, a real impedance can be provided across a wide frequency range. Neglecting the parasitic components, the shunt-feedback buffer stage provides the output resistance of

$$R_{out}=\frac{R_S+R_F}{1+g_m{R}_S},$$

(1)

where $g_m$ and $R_S$ are the small-signal trans-conductance of the core transistor ($M_{N1}$) and the effective output resistance of the VCO (previous stage).

Using the open-circuit time-constant method [11], there are three time-constants in the circuit due to $C_{IN}$, $C_{OUT}$, and $C_F$ that contribute to the signal attenuation. Since the output resistance is dominated by the port impedance of $50 \mathsf{\Omega }$, the dominant time constants are from $C_{IN}$ to $C_F$. The former is dictated by a large effective capacitance due to the Miller effect [10], and the latter is dictated by the large effective resistance that is expressed as

$$R_{eff}=R_S+R_S+g_m{R}_S{R}_L\approx g_m{R}_S{R}_L,$$

(2)

In our designed buffer, the 3-dB bandwidth of the buffer is simulated to be 17 GHz, where the contribution due to $C_{IN}$ is the most dominant.

4. Simulation Results

The proposed LC VCO is implemented using a 65 nm CMOS process and its device dimensions for the VCO core circuit as well as a shunt-feedback buffer are indicated in

Table 1. Device dimensions.

Device (VCO)	Dimension	Device (Buffer)	Dimension
MN0 MP0	$\left(2 \mathsf{\mu }\mathrm{m}/60 \mathrm{nm}\right)\times 60$	MN1	$\left(2 \mathsf{\mu }\mathrm{m}/60 \mathrm{nm}\right)\times 16$
	$\left(4 \mathsf{\mu }\mathrm{m}/60 \mathrm{nm}\right)\times 60$
Cvar	280 $\mathrm{fF}$	CIN	150 $\mathrm{fF}$
Ccoarse	27 $\mathrm{fF}$	RF	$3.6 \mathrm{K}\mathsf{\Omega }$
Cfine	15 $\mathrm{fF}$	RL	$150$
L	100 $\mathrm{pH}$

. A unit finger width of 2 $\mathsf{\mu }\mathrm{m}$ is unanimously used for all the active devices (transistors), which gives the best transistor speed [12]. The chip layout is illustrated in Figure 5. The total area of the chip is 610 × 630 ${\mathsf{\mu }\mathrm{m}}^2$, including the VCO core, on-chip bias circuits (bandgap reference and regulator), shunt-feedback buffer to interface the VCO outputs to off-chip ports, and pads. The active area of the VCO core is only 270 × 220 ${\mathsf{\mu }\mathrm{m}}^2$.

The proposed VCO is equipped with a fixed inductor ($L$) of 100 pH along with a varactor ($C_{var}$), fine-tuning capacitor ($C_{fine}$), and coarse-tuning capacitor ($C_{coarse}$), whose dimensions are illustrated in Table 1. $C_{fine}$ is controlled by a 7-bit thermometer code to ensure the monotonic response in the VCO oscillation frequency, while $C_{coarse}$ is switched on/off by 2-bit binary code. The oscillation frequency of the VCO varies from 18 GHz to 19.2 GHz when it is simulated with $E{N}_{coarse}=0, E{N}_{fine}=0, V_{tune}=0.1 \mathrm{V}$ and $E{N}_{coarse}=3, E{N}_{fine}=255, V_{tune}=0.9 \mathrm{V}$, respectively. Figure 6 shows the frequency tuning range and $K_{VCO}$ for the different settings of the coarse-tuning capacitor settings and varactor control voltages ($V_{tune}$).

The phase noise performance of the proposed VCO is simulated at both the lowest and highest digital code settings. As shown in Figure 7, the phase noise of the VCO is consistent across the codes, and the degradation in phase noise is less than 0.5 dB. Figure 8 shows the phase noise of the VCO at 1- and 10-MHz offset frequencies across the change in control voltage ($V_{TUNE}$). At the offset frequency of 1 MHz, the PN varies from −105.9 to −104.9 dBc/Hz, while at the offset frequency of 10 MHz, the PN varies from −128 to −127.3 dBc. The simulated PN versus control voltage is consistent and varies less than 1 dB. This result shows that the tuning capacitor, varactor ($C_{var}$), exhibits stable and consistent quality factors across the control range.

As described earlier, a shunt feedback buffer provides stable and broadband real impedance at its output port and thus can be connected to the output port without any off-chip components. The void of additional off-chip components results in a small form factor of the test board and a low bill of material (BOM). Figure 9 shows the simulated matching performance of the buffer. Across the VCO oscillation frequency range (18–19.2 GHz), the output matching ($\left|S_{11}\right|$) is less than −9 dB, while the output resistance (real impedance) is less than 77$\mathsf{\Omega }$.

To compare the performance of our proposed VCO with the state-of-the-art VCO at a similar frequency range, a well-known figure of merit (FoM) of the VCO defined as below is utilized:

$$FoM=L\left\{∆f\right\}-20\mathit{l}\mathit{o}\mathit{g}\left(\frac{f_0}{∆f}\right)+10log\left(\frac{P_{DC}}{1mW}\right),$$

(3)

where $L\left\{∆f\right\}$ is the phase noise at offset ($∆f$) from the carrier frequency ($f_0$), and $P_{DC}$ is the power consumption. From 1 MHz offset with 19.2 GHz carrier frequency, an FoM of −178.34 dBc/Hz is achieved.

Table 2. Performance comparison table.

Parameter	This Work S	[1] M	[2] M	[3] M	[13] M	[14] M	[15] M	[16] S	[17] M
Frequency [GHz]	18–19.2	21.9–24.2	19.3–22	24.27	21–31.6	20.85	18.7–20.3	13–19	25.5
PN @ 1 MHz [dBc/Hz]	−105.9	−100.8	−106.3	−100.3	−89.5	−100.7	−107.24	−110	−96
$V_{DD}$ [V]	1	1	1	0.65	1	1	1.8	0.8	1.2
Power [mW]	21	8	3.8	7.8	4.1	8.1	23.4	24	12
Area $[{\mathrm{mm}}^2$]	0.378 a 0.0596 b	0.19 b	0.06 b	0.42 a	0.25 a	0.48 a	0.19 b	0.14 b	0.45 a
FOM [dBc/Hz]	−178.34	−179.4	−186.4	−179.11	−171.4	−178	−179	−181.3	−173.3
Technology	65 nm CMOS	65 nm CMOS	65 nm CMOS	40 nm CMOS	65 nm bulk CMOS	90 nm CMOS	28 nm CMOS	40 nm CMOS	0.13 μm SiGe BiCMOS

^S: Simulated result. ^M: Measurement result. ^a: Total area. ^b: Active area.

shows the overall results and compares the performance of the proposed VCO with previous works. Reference [13] proposed a VCO with a varactor and switched substrate-shield inductor tuning; at 1 MHz frequency offset, our work achieved 6.94 dBc/Hz better FoM. Reference [14] proposed a VCO with a varactor and triple-coupled inductors, and references [1] and [15] proposed a VCO using a varactor and MIM capacitor for tuning; they achieved a similar FoM with a price of a larger area while our work only occupies 0.059 mm² of area for the VCO core. In [16], a VCO utilizing a linearized transconductance technique is proposed, which achieves comparable performance to our design but with a wider tuning range. However, their use of an inductor in the coarse bank results in a larger area consumption compared with our approach. In contrast, while the work in [17] proposed a differential VCO with a varactor of enhanced bandwidth, our design exhibits superior performance in terms of phase noise with a 1 MHz FoM offset. Reference [2] achieved higher FoM since the proposed VCO LC tanks are realized with a high-Q capacitor array. Our work shows a fine FoM while using a varactor-only capacitor array and occupying a small chip area.

5. Conclusions

This work presents a low phase noise LC VCO that uses a varactor-only capacitor array to eliminate the detrimental effects of the conventional capacitor array. The proposed technique significantly improves the phase noise of the prototype circuit by 2 dB at 1 MHz offset frequency, and there are no significant changes in the tuning range compared to the conventional method. The differential VCO achieves a frequency range of 1.2 GHz while consuming only 21 mW of power, and its compact size of 0.378 ${\mathrm{mm}}^2$ is a notable advantage over existing state-of-the-art oscillators that use complicated coupling transformers and tuning circuits [3,4,5,6]. Additionally, the proposed LC VCO offers a highly competitive FoM of −178.34 dBc/Hz, making it an attractive option for a range of applications where low phase noise and low power consumption are critical design considerations.