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Communication

An Encryption Application and FPGA Realization of a Fractional Memristive Chaotic System

1
Nanoelectronics Integrated Systems Center, Nile University, Giza 12588, Egypt
2
Engineering Mathematics and Physics Department, Faculty of Engineering, Cairo University, Giza 12613, Egypt
3
School of Engineering and Applied Sciences, Nile University, Giza 12588, Egypt
*
Author to whom correspondence should be addressed.
Electronics 2023, 12(5), 1219; https://doi.org/10.3390/electronics12051219
Submission received: 27 December 2022 / Revised: 19 February 2023 / Accepted: 24 February 2023 / Published: 3 March 2023
(This article belongs to the Special Issue Feature Papers in Circuit and Signal Processing)

Abstract

:
The work in this paper extends a memristive chaotic system with transcendental nonlinearities to the fractional-order domain. The extended system’s chaotic properties were validated through bifurcation analysis and spectral entropy. The presented system was employed in the substitution stage of an image encryption algorithm, including a generalized Arnold map for the permutation. The encryption scheme demonstrated its efficiency through statistical tests, key sensitivity analysis and resistance to brute force and differential attacks. The fractional-order memristive system includes a reconfigurable coordinate rotation digital computer (CORDIC) and Grünwald–Letnikov (GL) architectures, which are essential for trigonometric and hyperbolic functions and fractional-order operator implementations, respectively. The proposed system was implemented on the Artix-7 FPGA board, achieving a throughput of 0.396 Gbit/s.

1. Introduction

Fractional calculus with real orders offers higher controllability of mathematical relations and a more accurate description of natural phenomena than classical integer calculus. Lorenz, in 1960, was the first to describe chaos as a nonlinear dynamical process [1]. Chaos is used to describe very delicate systems in which even a little alteration to the parameters or initial conditions may have a dramatic effect on the final outcome. Chaotic systems, including fractional-order ones, have been utilized in many applications, such as communications [2], face recognition [3] and encryption [4,5]. One of the fractional-order derivative/integral definitions used for system modeling is Grünwald–Letnikov (GL), which yields a smaller area and better performance in digital applications than the other definitions. The simple hardware-friendly version of GL, as follows, is given in [6]:
G L t L D t q x ( t ) = 1 h q j = 0 L W j ( q ) x ( t j h ) ,
which is based on the short-memory principle [7] with window size L, fractional order q and step size h. The binomial coefficients W j ( q ) are given by the following:
W 0 ( q ) = 1 , W j ( q ) = 1 q + 1 j W j 1 ( q ) , j = 1 , 2 , , L .
The memristor, the fourth basic circuit element, has received a lot of interest in the study of nonlinear systems [8]. Based on the symmetry of circuit elements, Chua predicted the memristor’s appearance in 1971 [9]. In 2008, the HP firm developed the first physical model of the memristor, proving Chua’s prediction [10]. Since then, the physical design and mathematical modeling of memristors have been areas of interest in the realm of electrical circuits and computers [11]. Some functions, such as the hyperbolic sine function [12], the hyperbolic cosine function [13] and the hyperbolic tangent function [14], were utilized for memristor modeling, which is necessary for generating chaos from a memristive circuit.
Chaotic systems are widely utilized for encryption owing to their randomness, aperiodicity and high sensitivity to parameters and initial values [15,16,17]. Memristive chaotic systems exhibit more complex behavior, higher unpredictability and randomness [18] and have higher security when applied to image encryption [19,20]. Specifically, fractional-order systems with transcendental nonlinearities can improve the performance in encryption applications [21,22,23].
Fixed-point operations are commonly employed for the practical hardware realization of chaos to save costs, improve speed and avoid implementation sensitivity consequences [24,25,26,27]. Many works have realized GL-based fractional-order chaotic systems [24]. However, there is barely any FPGA realization of fractional-order memristive chaos with transcendental nonlinearities. A coordinate rotation digital computer (CORDIC) computes approximate values of transcendental functions iteratively using shifting and addition operations [28,29]. A reconfigurable CORDIC architecture, working in all modes of operations, was employed to realize a memristive chaotic system, including various transcendental functions [30]. To realize a fractional-order extended version of the memristive system, both reconfigurable CORDIC [30] and GL [24,31] blocks are required.
The memristive chaotic system with transcendental nonlinearities presented in [32] is extended to a fractional order domain in this work, showing its chaotic properties using bifurcation analysis and spectral entropy (SE). In addition, the proposed system was employed as a pseudo-random number generator (PRNG) in an image encryption algorithm that also included a generalized Arnold permutation operation. The encryption scheme was tested using statistical tests. Moreover, the proposed system was realized, including the reconfigurable CORDIC and GL blocks, on an Artix-7 FPGA board. The results were validated experimentally on an oscilloscope.
The paper is organized as follows. The analysis of the fractional-order extended memristive system is provided in Section 2. Section 3 introduces an encryption method based on the presented system and assesses its performance as a PRNG. Section 4 depicts the implementation of the system based on the reconfigurable CORDIC and the GL blocks. Moreover, it presents the results, experimental setup and utilized resources. Finally, Section 5 summarizes the main contributions.

2. The Proposed Fractional-Order Memristive Chaotic System

A fractional-order extension of the memristive chaotic system [32] is proposed as follows:
D q 1 x = y 2 a z 2 , D q 2 y = z 2 b y tanh ( w ) + c , D q 3 z = y z + d cos ( x ) , D q 4 w = y 2 w .
Both the trigonometric cosine function in the z equation and the hyperbolic function (memristor term) in the y equation enhance the maximum Lyapunov exponent, while maintaining the structure of conditional symmetry [32]. The state variables x , y , z and w are the voltage states of system (3). Moreover, the tanh ( w ) term represents the voltage and current constraints in the memristor, which is a typical 8-like hysteresis loop [32]. This system can be solved using the GL definition as follows:
x i + 1 = ( y i 2 a z i 2 ) h q 1 j = 1 L W j ( q 1 ) x i , y i + 1 = ( z i 2 b y i tanh ( w i ) + c ) h q 2 j = 1 L W j ( q 2 ) y i , z i + 1 = ( y i z i + d cos ( x i ) ) h q 3 j = 1 L W j ( q 2 ) z i , w i + 1 = ( y i 2 w i ) h q 4 j = 1 L W j ( q 4 ) w i ,
where the parameter b and initial condition x 0 are modified from the ones in [32] for a strong chaotic behavior at L = 20 such that a = 0.5 , b = 0.9 , c = 3 , d = 6.2 , ( x 0 , y 0 , z 0 , w 0 ) = ( 1 π , 1 , 1 , 0 ) , q 1 = 0.95 , q 2 = 0.9 , q 3 = 1.25 , q 4 = 0.85 and h = 0.01 . The choice of L = 20 is to prepare a hardware-friendly version of the presented system. Figure 1 shows the projections of the system in each two-dimensional view.
Figure 2 shows the bifurcation diagrams computed versus 0.8 < q 1 < 0.99 , where all the other parameters equal the values mentioned before. Figure 3 shows SE, which measures randomness rapidly and accurately using Shannon entropy [26], where values approaching one indicate a flat power spectrum. It can be inferred that the system behaved chaotically for wide ranges of fractional orders and parameters.
SE represents the disorder in the Fourier transformation domain. A flatter spectrum has a greater SE value, which indicates that the time series is more complex. Thus, for a time series x ( n ) , n = 0 , 1 , 2 , , N 1 of length N, the mean value x ˜ is removed to obtain x ( n ) = x ( n ) x ˜ . Its corresponding discrete fourier transformation (DFT) is given by [33], as follows:
X ( k ) = n = 0 N 1 x ( n ) e j 2 π n k / N ,
where k = 0 , 1 , , N 1 and j is the imaginary unit. If the power of a discrete power spectrum with the k t h frequency is | X ( k ) | 2 , then the “probability” of this frequency is defined as follows:
P k = | X ( k ) | 2 k = 0 N / 2 1 | X ( k ) | 2 ,
where the summation runs from k = 0 to k = N / 2 1 after applying the DFT. SE is given by the following:
SE = k = 0 N / 2 1 P k ln P k ln ( N / 2 ) ,
where ln ( N / 2 ) is the entropy of the completely random signal. In this article, SE is computed using N = 4 × 10 4 after discarding the first 10 4 iterations.

3. A PRNG and the Encryption Scheme

3.1. Encryption Scheme

Figure 4 depicts the proposed substitution and the permutation-based algorithm. The fractional memristive system is the chaotic generator in the substitution phase. Its fractional orders, initial conditions and parameters are determined from the encryption key consisting of twelve sub-keys. Each computed value is the addition of fixed and key parts, for example, q 1 = q 1 fix + Δ q 1 , where q 1 fix is the same q 1 value given near (4) and Δ q 1 is the corresponding sub-key scaled by 2 26 . Each pixel of the original image is XORed with the 8 least significant bits (LSBs) of the chaotic output and delayed feedback from the previously encrypted pixel. The channel order is selected by their own LSBs based on the table in Figure 4. Afterwards, permutation of the output image takes place using a generalized Arnold’s map [34] given by the following:
u v = 1 γ β 1 + γ β u v mod N + 1 1 , γ = mod P sum + γ , N 1 + 1 , β = mod P sum + β , N 1 + 1 ,
where ( u , v ) and ( u , v ) are the new and old pixel locations, respectively, for an N × N image, mod is the remainder and γ and β equal 73 and 35, respectively. The value P sum = R sum + G sum + B sum and enhances the resistance to differential attacks through plain image dependence (sum of channels) [34,35]. Decryption is straightforward as it is the reverse of the process.

3.2. Performance Evaluation

The utilized performance metric equations are summarized in Table 1.

3.2.1. Statistical Tests

The scheme’s performance was assessed for four 1024 × 1024 standard RGB test images: Baboon, Peppers, Barb and Lake [36]. An image’s histogram reveals how the values of its individual pixels are distributed over the picture as a whole. The correlation coefficient is used to determine the strength of the connection between vector variables, as presented in Table 1, and has a range of (−1, 1). In a secure encryption system, this number should be zero, as this indicates no correlation. While Figure 5 shows that the encrypted test images were random, Figure 6 depicts that their channel histograms were uniform. Their correlation coefficients are reported in Table 2 and successfully approach zero. As presented in Table 2, the correlation coefficients were measured between adjacent pixels in the vertical, horizontal and diagonal directions for the image’s three channels. In order to measure how far off the fault a decrypted image was from the the original, we used a metric called mean square error (MSE). A higher number here resulted in a more effective encryption technique. The entropy of an encrypted picture is close to 8, which indicates that the image’s pixels possess a high degree of uncertainty. Table 3 presents a performance comparison of this work and [34]. Table 3 shows that the MSE values were high enough and the entropy approached the ideal value of 8. The National Institute of Standards and Technology (NIST) has published an SP-800-22 statistical test suite for random and pseudo-random number generators for encryption applications [37]. The tests are intended to check the randomness proprieties of a sequence of bits by computing the P-value distribution (PV) and the proportion of passing sequences (PP). To execute the test on a cipher image, the same test image is used but with a size of 1024 × 1024 and 24 bits for each random number, which is the pixel value of red, green and blue concatenated. The NIST test suite is carried out on the PRNG and encrypted images and the results are presented in Table 4. The PV and the PP results given in Table 4 indicate their randomness.

3.2.2. Key Space and Key Sensitivity

Key space is used to describe the total number of potential encryption keys in a given cryptosystem. Sensitivity analysis is used to find the largest possible key space. The fractional orders, initial conditions and parameters of the chaotic generator consist of a fixed part and a key part, which is determined from the twelve sub-keys. Eight of the sub-keys are limited to 21-bit, while the other four are limited to 22-bits, resulting in a key space of 2 256 . Table 3 reports the MSE and entropy values, which indicated an incorrectly decrypted image when the LSB in the first sub-key was changed.

3.2.3. Resistance to Differential Attacks

Researching the impact of varied inputs on a target’s output is the focus of a differential attack. As a result, the LSB of a randomly chosen pixel in the input image was altered to determine the system’s resilience to differential attacks. After this, the number of pixels change rate (NPCR) and the unified average changing intensity (UACI) were measured between the two images that were encrypted using the original input image and the slightly modified input image [38]. The range of the NPCR’s proportion of dissimilar pixels is [0, 100], where 100 % indicates entirely different images. The UACI is a metric with a range of [0, 100], where the target value is 33.33 % and it measures the average intensity difference between the original and modified encrypted images down to a single pixel [38].
The NPCR and the UACI are reported in Table 3, averaged over 50 trials, by changing the LSB of a randomly chosen pixel in the plain image. The values successfully approached the standard 99.6094% and 33.4635%, respectively [38].

4. FPGA Implementation and Results

Figure 7 shows the hardware architecture designed for the fractional-order system, which includes four 32-bit fixed point registers (8b integer, 24b fractional) to store x, y, z and w. The proposed design includes 9 adders, 13 multipliers, 8 inverters, 4 GL blocks [24] and a single reconfigurable CORDIC block [30]. The GL implementation of [24] consists of the following: the binomial coefficients given by (2) and stored in a LUT, in addition to the summation of (1), which multiplies each input by all the binomial coefficients. The value of h q is stored in a register to be used in upcoming calculations. The reconfigurable CORDIC allows reusing the same block rather than multiple differently configured single-mode CORDIC blocks [30]. Hyperbolic, linear and circular configurations were used to compute sinh and cosh and their division as tanh and cos, respectively. The reuse within the same clk was maintained by a control unit and select signal.
The proposed system design was coded in Verilog HDL, simulated on Xilinx ISE 14.7, Advanced Micro Devices, Inc., CA, USA and realized on Xilinx FPGA Artix-7 XC7A100TCSG324 using ChipScope. The FPGA setup and experimental results are displayed in Figure 8 using the Artix-7 FPGA board and oscilloscope. Table 5 presents the FPGA resources of the proposed system, where it consumed higher resources than [30] because of the extensive arithmetic operations needed for the fractional system solution compared to an integer. The fractional memristive system has twice the number of parameters than [30], which increases the key space and enhances its performance in encryption applications. The proposed realization achieved a throughput of 0.396 Gbit/s.

5. Conclusions

An extended fractional-order version of a memristive chaotic system with transcendental nonlinearities was proposed with its mathematical analyses, including bifurcation and spectral entropy. The proposed system was applied as a PRNG in an image encryption algorithm with substitution and permutation operations. The fractional-orders acted as extra parameters in the systems, which improved the key space and performance of the encryption system. The system was also tested using statistical tests, the NIST test suite and robustness to differential attacks. The reconfigurable CORDIC and GL blocks were used for realizing the proposed system on an Artix-7 FPGA board with a throughput of 0.396 Gbit/s.

Author Contributions

Conceptualization, W.S.S., L.A.S. and A.G.R.; methodology, L.A.S., A.H.M. and A.G.R.; software, W.S.S., S.M.M. and L.A.S.; validation, W.S.S., S.M.M., A.H.M. and L.A.S.; formal analysis, W.S.S. and A.G.R.; investigation, W.S.S., S.M.M. and A.H.M.; resources, L.A.S., A.H.M. and A.G.R.; data curation, W.S.S. and S.M.M.; writing—original draft preparation, W.S.S., S.M.M., L.A.S. and A.H.M.; writing—review and editing, W.S.S., L.A.S., A.H.M. and A.G.R.; visualization, S.M.M., L.A.S. and A.H.M.; supervision, W.S.S. and L.A.S.; project administration, L.A.S.; funding acquisition, L.A.S. All authors have read and agreed to the published version of the manuscript.

Funding

This paper was based upon work supported by the Science, Technology, and Innovation Funding Authority (STIFA) under grant number (#38161).

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

All the data are presented in the paper.

Acknowledgments

This paper was based upon work supported by Science, Technology, and Innovation Funding Authority (STIFA) under grant number (#38161).

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. The fractional memristive system in five projections.
Figure 1. The fractional memristive system in five projections.
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Figure 2. Bifurcations of the fractional memristive system versus q 1 .
Figure 2. Bifurcations of the fractional memristive system versus q 1 .
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Figure 3. The SE of the fractional memristive system versus parameters.
Figure 3. The SE of the fractional memristive system versus parameters.
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Figure 4. Encryption scheme and multiplexing table.
Figure 4. Encryption scheme and multiplexing table.
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Figure 5. Plain and encrypted Peppers, Barb and Lake images.
Figure 5. Plain and encrypted Peppers, Barb and Lake images.
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Figure 6. Histograms of the R, G and B of the encrypted Baboon image.
Figure 6. Histograms of the R, G and B of the encrypted Baboon image.
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Figure 7. Hardware architecture of the fractional memristive system.
Figure 7. Hardware architecture of the fractional memristive system.
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Figure 8. The FPGA experimental results: x z projection.
Figure 8. The FPGA experimental results: x z projection.
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Table 1. Performance metrics of the image encryption systems.
Table 1. Performance metrics of the image encryption systems.
Performance MeasureEquation
Correlation coefficient ρ = cov ( x , y ) ( D ( x ) ) ( D ( y ) ) , where c o v ( x , y ) = 1 S i = 1 S x i 1 s j = 1 S x j y i 1 S j = 1 S y j ,
D ( x ) = 1 s i = 1 S x i 1 S j = 1 S x j 2 , S = M (height) × N ( width).
Mean squared errorMSE = 1 M × N i = 1 N j = 1 M ( P ( i , j ) D ( i , j ) ) 2 , where P ( i , j ) , D ( i , j ) are the original and
incorrectly decrypted image pixels.
Entropy E = i = 1 2 8 p s i log 2 p s i , where p s i is the probability of symbol s i .
Number of pixels
change rate NPCR = 1 N × M i = 1 N j = 1 M D ( i , j ) × 100 ,
Unified average
changing intensity UACI = 1 M × N i = 1 N j = 1 M C 1 ( i , j ) C 2 ( i , j ) 255 × 100 ,
where D ( i , j ) = 1 , C 1 ( i , j ) C 2 ( i , j ) 0 , C 1 ( i , j ) = C 2 ( i , j ) , C 1 is the ciphered pixel and
C 2 is the ciphered pixel corresponding to a slightly modified original image.
Table 2. Correlation coefficients of encrypted images.
Table 2. Correlation coefficients of encrypted images.
ImageHorizontalVerticalDiagonal
RGBRGBRGB
Baboon 0.0005 0.0021 0.0024 0.0023 0.0005 0.0019 0.0001 0.0033 0.0016
Peppers 0.0015 0.0049 0.0035 0.0008 0.0016 0.0013 0.0013 0.0016 0.0005
Barb 0.0021 0.0042 0.0027 0.0016 0.0028 0.00058 0.0008 0.0015 0.0001
Lake 0.0004 0.0002 0.0006 0.0005 0.0003 0.0008 0.0007 0.0011 0.0011
Table 3. Performance summary compared to a previous work.
Table 3. Performance summary compared to a previous work.
BaboonPeppersBarbLakeBaboon [34]Peppers [34]
Entropy 7.9998 7.9997 7.9998 7.9998 7.9998 7.9998
MSE86091015185401011587108798
Key sens.Entropy 7.9998 7.9997 7.9997 7.9997 7.9992 7.9991
MSE850299358408995087018034
DANPCR (%) 99.5641 99.6005 99.6017 99.5873 99.6101 99.6096
UACI (%) 33.4394 33.4793 33.5018 33.4418 33.4582 33.4593
Table 4. The NIST results for the fractional memristive system-based PRNG and encrypted images.
Table 4. The NIST results for the fractional memristive system-based PRNG and encrypted images.
TestPRNGBaboonPeppersBarbLake
PV PP PV PP PV PP PV PP PV PP
Frequency111 0.958 1
Block frequency111 0.958 0.917
Cumulative sums11111
Runs1 0.958 111
Longest run111 0.917 1
Rank11111
FFT1 0.958 11 0.917
Non-overlapping template 0.989 0.990 0.989 0.988 0.988
Overlapping template1 0.917 0.958 11
Universal 0.958 111 0.958
Approximate entropy 0.958 0.958 0.958 1 0.958
Random excursions 0.991 11 0.981 1
Random excursions variant 0.972 11 0.970 0.984
Serial 0.979 1111
Linear complexity 0.917 1111
Final resultPassed Passed Passed Passed Passed
Table 5. The FPGA resources summary of the fractional memristive system.
Table 5. The FPGA resources summary of the fractional memristive system.
Total
Slices
Total
Slice
LUTs
Total
Slice
Regs
DSPsMax Freq
(MHz)
Throughput
(Gbit/s)
OrderParams.
Proposed626923,929459914412.3680.396Fractional8
[30]95134403748414.0090.4483Integer4
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Mohamed, S.M.; Sayed, W.S.; Madian, A.H.; Radwan, A.G.; Said, L.A. An Encryption Application and FPGA Realization of a Fractional Memristive Chaotic System. Electronics 2023, 12, 1219. https://doi.org/10.3390/electronics12051219

AMA Style

Mohamed SM, Sayed WS, Madian AH, Radwan AG, Said LA. An Encryption Application and FPGA Realization of a Fractional Memristive Chaotic System. Electronics. 2023; 12(5):1219. https://doi.org/10.3390/electronics12051219

Chicago/Turabian Style

Mohamed, Sara M., Wafaa S. Sayed, Ahmed H. Madian, Ahmed G. Radwan, and Lobna A. Said. 2023. "An Encryption Application and FPGA Realization of a Fractional Memristive Chaotic System" Electronics 12, no. 5: 1219. https://doi.org/10.3390/electronics12051219

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