Xin, K.; Lai, M.; Lv, F.; Guo, K.; Pang, Z.; Xu, C.; Zhang, G.; Wang, W.; Li, M.
A Cryo-CMOS, Low-Power, Low-Noise, Phase-Locked Loop Design for Quantum Computers. Electronics 2023, 12, 3237.
https://doi.org/10.3390/electronics12153237
AMA Style
Xin K, Lai M, Lv F, Guo K, Pang Z, Xu C, Zhang G, Wang W, Li M.
A Cryo-CMOS, Low-Power, Low-Noise, Phase-Locked Loop Design for Quantum Computers. Electronics. 2023; 12(15):3237.
https://doi.org/10.3390/electronics12153237
Chicago/Turabian Style
Xin, Kewei, Mingche Lai, Fangxu Lv, Kaile Guo, Zhengbin Pang, Chaolong Xu, Geng Zhang, Wenchen Wang, and Meng Li.
2023. "A Cryo-CMOS, Low-Power, Low-Noise, Phase-Locked Loop Design for Quantum Computers" Electronics 12, no. 15: 3237.
https://doi.org/10.3390/electronics12153237
APA Style
Xin, K., Lai, M., Lv, F., Guo, K., Pang, Z., Xu, C., Zhang, G., Wang, W., & Li, M.
(2023). A Cryo-CMOS, Low-Power, Low-Noise, Phase-Locked Loop Design for Quantum Computers. Electronics, 12(15), 3237.
https://doi.org/10.3390/electronics12153237