Design of a Baseband Signal for the 406 MHz Satellite Emergency Radio Transmitter Based on STM32

Abstract

The baseband signal of the 406 MHz COSPAS-SARSAT emergency beacon is a 144-bit or 112-bit data with 0 and 1 code, including the information bits and error correcting check bits. In order to improve the coding efficiency of the baseband signal for the 406 MHz transmitter in the STM32 micro-controller, this paper proposes a calculation method for the first BCH error correcting code (BCH-1) and the second BCH error correcting code (BCH-2) of the COSPAS-SARAST transmitter. First, conduct the data coding process by 64-bit integral data; then, compute the BCH (127, 106) code and the BCH (63, 51) code to obtain the respective error correcting codes for improving coding rate; next, generate the baseband signal according to the GB 14391-2021 coding format; finally, modulate the baseband signal into a 406 MHz-RF signal, send it out and complete the task of distress alerting. The experimental results show that the proposed STM32 microcontroller-based baseband signal generation method is effective, and the EPIRB (Emergency Position Indicating Radio Beacon) designed based on this method has reached the industry standard.

1. Introduction

The COSPAS-SARSAT system [1,2], which consists of space segment and ground segment, provides a distress alert and the position information for a distressed ship or person with beacon equipment [3,4,5,6]. The second generation 406 MHz beacon allows for the coding of position data in the transmitted 406 MHz message, thus providing for quasi-real time alerts and position information from the GEOSAR system [7,8]. The baseband signal coding of the 406 MHz COSPAS-SARSAT emergency beacon includes the information bit coding and the BCH error correcting coding. As a classic cyclic code with error-correcting ability, the BCH code is widely used in traditional communication, quantum communication, optical fiber communication and storage fields [9,10,11,12]. In 2016, Wan, F. et al. designed an improved 8b/10b coding structure to meet the current coding requirements of high-rate and low-bit error rate and introduced the BCH coding module into the 8b/10b encoder to reduce the bit error rate of the system, so as to improve the reliability of data transmission in a digital communication system [13]. However, this coding is mainly for the BCH (7, 4) code, which contains only a few information bits. In 2022, Wang, W. et al. proposed an optimized structure of BCH code based on the RTL platform [14], which can process 16-bit data in parallel per clock cycle during encoding and decoding operations. While in 2023, Zhang, L. et al. presented an efficient BCH code encoding and decoding algorithm of STT-MRAM polynomial division based on division distance [12], which can effectively improve the efficiency of BCH coding. Using this algorithm, the BCH (63, 51) and BCH (127, 106) coding calculations can be completed in 1.2 microseconds and 1.3 microseconds, respectively.

In general, the linear feedback shift register [14,15,16,17] is employed to complete the BCH coding, but this method relies heavily on FPGA or other special hardware unit circuits. Compared with the powerful real-time data processing ability of FPGA, MCU, which focuses on industrial control, is more suitable for baseband signal coding. In addition, in terms of cost, MCU is also superior to FGPA.

This paper performed a baseband signal generation of the 406 MHz COSPAS-SARSAR transmitter based on STM32 microcontroller with low power consumption and high performance. Compared with the optimization structure of BCH code based on RTL proposed by Wang. W. et al., the proposed code based on STM32 can process 32-bit data in parallel. Compared with the BCH coding algorithm proposed by Zhang. L. et al., which is applied to the field of STT-MRAM with microsecond-level coding efficiency, the BCH coding algorithm proposed in this paper is a BCH coding algorithm with millisecond-level coding efficiency applicable to COSAS-SARSAT transmitter. In order to improve the coding efficiency of the baseband signal for the 406 MHz transmitter in the STM32 microcontroller, this paper proposed a calculation method for first BCH error-correcting coding (BCH-1) and second BCH error-correcting coding (BCH-2) of the COSPAS-SARAST transmitter. First, conduct the data coding process by 64-bit integral data; then, compute the BCH (127, 106) code and the BCH (63, 51) code to obtain the respective error-correcting codes for improving the coding rate; next, generate the baseband signal according to the GB 14391-2021 coding format; finally, modulate the baseband signal into a 406 MHz-RF signal, send it out and complete the task of distress alerting. The experimental results show that the proposed STM32 microcontroller-based baseband signal generation method is effective, and the EPIRB (Emergency Position Indicating Radio Beacon) designed based on this method has reached the industry standard.

The structure of this paper is as follows. Section 2 describes the coding rules for the 406 MHz emergency beacon. Section 3 analyzes the generation details of the baseband signal for COSPAS-SARSAT transmitter. Section 4 provides the experimental results to verify the correctness and validity of the proposed method. Section 5 summarizes this work.

2. Coding Rules for Satellite Emergency Position Indicating Radio Beacons

EPIRB specifications [18]: EPIRB Signal Parameters (Technical Index) Carrier frequency: 406.025 MHz ± 2 KHz or 406.028 MHz ± 1 KHz; Output Power: 5 W ± 2 dB (35 dBm~39 dBm); Message Time: short message: 440 × (1 ± 1%) ms, long message: 520 × (1 ± 1%) ms; The modulation method is Bi Phase L modulation. Similar to the BPSK method, the Bi Phase L modulation is also a BPSK (Binary Phase Shift keying) modulation. But its phase varies between +1.1 rad (+63°) and −1.1 rad (−63°) instead of between +Π and −Π [11].

The baseband signal generation of the COSPAS-SARSAT transmitter is converting the position information and the related information into the baseband signal. The format conforms to GB 14391-2021.

The information frame is the smallest unit transmitted by the COSPAS-SARSAT transmitter and can be divided into the long messages and the short messages. The short messages include: system bits, data bits, error correcting codes and emergency codes; the long messages include: system bits, data bits, error correcting codes, emergency codes and additional long message selection codes.

According to [18], the agreement of the bits is explained in

Table 1. The format of the message frame.

Type	System Bits		Data Bits	Error Correcting Codes	Emergency Codes	Additional Selection Code
Short message	B1–B15	B16–B24	B25–B85	B86–B106	B107–B112	/
	15 bits	9 bits	61 bits	21 bits	6 bits	/
	Bit synchronization	Frame synchronization	1 (Frame length flag) + 1 (User Logo) + 10 (Country code) + 49 (Indicator Code)	BCH-1	Emergency codes	/
Long message	B1–B15	B16–B24	B25–B85	B86–B106	B107–B132	B133–B144
	15 bits	9 bits	61 bits	21 bits	26 bits	12 bits
	Bit synchronization	Frame synchronization	1 (Frame length flag) + 1 (User Logo) + 10 (Country code) + 49 (Indicator Code)	BCH-1	PDF-2	BCH-2

.

In the short and long messages, the data bits are the first protection field, and the error correcting coding is the first BCH error correcting coding (BCH-1). In the long messages, the emergency code is the second protection field, and the additional selection coding for long messages is the second BCH error correcting coding (BCH-2). The BCH-1 coding is the triple error correcting coding with 61 information bits and 21 check bits of BCH (127, 106) codes. The BCH-2 coding is BCH (38, 26) codes with 26 code bits and 12 check bits [18].

3. Baseband Signal Generation METHOD

3.1. Structure of the COSPAS-SARSAT Transmitter

The structure of the COSPAS-SARSAT transmitter is shown in Figure 1, which consists of an acquisition module, a pre-processing module and a processing module. The acquisition module is used to receive the GPS signal; the pre-processing module is conducted in the STM32 MCU, which mainly extracts the position information received from the GPS and generates the baseband signal of the 406 MHz transmitter and transmits it to the next stage circuit. At last, the processing module sends out the 406 MHz distress signal.

3.2. The Principle of BCH Check Bits Coding

BCH—named after its discoverers, Bose, Ray-Chaudhuri and Hocquenghem—is a cyclic code capable of correcting multiple random errors and is widely used because of its strong error-correcting power and easy construction. The procedure of error correcting coding is adding some redundant detection codes in addition to the signal number during transmission. The detection codes, carrying no information, are only used to detect errors if there is an error in the information code during the transmission [19]. This kind of code has a strict algebraic structure, high coding efficiency, and can be performed by linear shift registers. Its coding algorithm has been one of the most important topics in the coding theory field. BCH coding has been widely employed in practice, such as satellite and deep space communications, data storage and data transmission, mobile communications, digital audio and video transmission [20]. Triple error correcting coding of BCH (127, 106) codes and BCH (63, 51) codes are used in the baseband signal coding of COSPAS-SARSAT transmitters.

The BCH code is defined as follows:

Given any finite field GF(q) and its extension $GF\left(q^m\right)$, where q is a prime number or a power of a prime number and m is a positive integer. If any code element is taken from the cyclic code (n,k) of $GF\left(q^m\right)$, $n=2^m-1$, its generating polynomial g(x) has 2t continuous roots $\left\{a^1,a^2,\cdots ,a^{\left(2t-1\right)},a^{2t}\right\}$, t is the number of corrected bits and the cyclic code generated by the generating polynomial $g\left(x\right)$, marked as $\left(n,k,t\right)$ is called a q-ary BCH code [21].

In this paper, the first protection field of the 406 MHz baseband signal message uses the BCH (127, 106) binary error correcting code, and the second protection field uses the BCH (63, 51) codes. In the first protection field, the BCH (127, 106) codes can be expressed as BCH (127, 106, 3) code in which the number of error correcting bits t = 3, the code length is n = 127, the message length k = 106, and the check digital length m – k = m × t = 21. In the second protection field, the check bits is 12, m × t = 12, n = 26, so m = 6, t = 2, and the message length k = 51. Hence in the BCH code of this paper, BCH (38, 26) code is also BCH (63, 51) code, which can correct two errors, so the BCH (63, 51) code is also BCH (63, 51, 2) code.

3.3. Data Bits Design

3.3.1. System Bit Design

The system bits design includes synchronization bit, frame synchronization bit and fixed bit. The synchronization bit is a 15-bit code of “1”, and the frame synchronization bit is a 9-bits code of “000101111”. In summary, the system can be expressed as “0xfffe2f” in 32 bits.

3.3.2. Design of the First Protected Data Field

Bits 25–85 of the information bits, which are also bits 0 to 60 of the first protected data field, is illustrated in

Table 2. The bit of the first data protection field.

Bit	The Present	Value
0	Message format:	0: short message; 1: long message
1	Protocol: Location Protocol	0
2–11	Country code	412: China
12–15	Type of location protocol	0010: EPIRB
16–35	MID
36–39	Specific Beacon	0000
40	Latitude Sign	0: North; 1: South
41–47	Latitude Degree
48, 49	Latitude Minutes
50	Longitude Sign	0: East; 1: West
51–58	Longitude Sign
59, 60	Longitude Minutes

in detail.

Variables are set up according to the data bits and are used to calculate the BCH code. The latitude and longitude information is obtained from the GPS receiver; the other data is set up according to the registration information of the transmitter; and the sequence is obtained as m₁(x)

3.3.3. The Design of BCH-1 Coding

Since the data bits to be checked are 61 bits, add the check bits, the total number of the bits is 82. In this paper, two 64-bit integers are designed to calculate the BCH check code, which means that 61 bits of data are XORed with the codeword polynomial in the previous time to get the check bit, and 21 zeros are added after the check bit obtained in the previous time to continue to XOR with the codeword polynomial.

First, find the information polynomial.

The BCH binary code is constructed as follows; the information polynomial is:

$$\mathrm{m}\left(\mathrm{x}\right)={\mathrm{m}}_{\mathrm{k}-1}{\mathrm{x}}^{\mathrm{k}-1}+{\mathrm{m}}_{\mathrm{k}-2}{\mathrm{x}}^{\mathrm{k}-2}+\cdots +{\mathrm{m}}_0$$

(1)

where $m_i\in GF\left(2\right)$, the BCH code information polynomial, varies depending on the location of the COSPAS-SARSAT transmitter settings.

In this paper, the data bits are 61 bits, i.e., the information polynomial is:

$${\mathrm{m}}_1\left(\mathrm{x}\right)={\mathrm{m}}_{60}{\mathrm{x}}^{60}+{\mathrm{m}}_{59}{\mathrm{x}}^{59}+\cdots +{\mathrm{m}}_0$$

(2)

Second, find the codeword polynomial g(x), denoted as:

$$\mathrm{g}\left(\mathrm{x}\right)={\mathrm{g}}_{\mathrm{n}-\mathrm{k}}{\mathrm{x}}^{\mathrm{n}-\mathrm{k}}+{\mathrm{g}}_{\mathrm{n}-\mathrm{k}-1}{\mathrm{x}}^{\mathrm{n}-\mathrm{k}-1}+\cdots +{\mathrm{g}}_1\mathrm{x}+{\mathrm{g}}_0$$

(3a)

$$\mathrm{g}\left(\mathrm{x}\right)=\mathrm{LCM}\left[{\mathrm{m}}_1\left(\mathrm{x}\right),{\mathrm{m}}_3\left(\mathrm{x}\right),\cdots ,{\mathrm{m}}_{2\mathrm{t}-1}\left(\mathrm{x}\right)\right]$$

(3b)

Determine g₁(x) according to the look-up table:

$${\mathrm{g}}_1\left(\mathrm{x}\right)=\mathrm{LCM}\left[{\mathrm{m}}_1\left(\mathrm{x}\right),{\mathrm{m}}_3\left(\mathrm{x}\right),{\mathrm{m}}_5\left(\mathrm{x}\right)\right]=(11554743{)}_8$$

(4)

The codeword polynomial can be expressed as:

$${\mathrm{g}}_1\left(\mathrm{x}\right)={\mathrm{x}}^{21}+{\mathrm{x}}^{18}+{\mathrm{x}}^{17}+{\mathrm{x}}^{15}+{\mathrm{x}}^{14}+{\mathrm{x}}^{12}+{\mathrm{x}}^{11}+{\mathrm{x}}^8+{\mathrm{x}}^7+{\mathrm{x}}^6+{\mathrm{x}}^5+{\mathrm{x}}^1+1$$

(5)

After the first modulo operation, we can get

c₁ (x) = m₁ (x)mod g(x)

(6)

As the number of check digits is less than 21, 21 bits of 0 are added to continue the XOR operation to obtain the check bits.

After the second modulo operation, we can get

$$\mathrm{r}\left(\mathrm{x}\right)=\left({\mathrm{x}}^{21}{\mathrm{c}}_1\left(\mathrm{x}\right)\right)\mathrm{mod} \mathrm{g}\left(\mathrm{x}\right)$$

(7)

If the number of the check bits is less than 21, the result obtained by preceding 0s to the beginning of the code until the number of the check bits is 21.

The specific implementation procedure in the STM32 microcontroller flows is as follows:

(1)

Define variables and assign initial values to these variable according to the requirements of the baseband information.

(2)

Calculate the information polynomials and define them using 64-bit data to simplify XOR operation that follows.

(3)

Calculate the codeword polynomial.

(4)

Take the data with the same number of the information polynomial as the polynomial to perform XOR operation with the codeword polynomial. Then, take the obtained results as the higher bits of the new information, and act the part without XOR operation in the original data as the lower bits of the new information polynomial.

(5)

Continue to take the information polynomial with the same number of bits as the codeword polynomial, and then continue to perform the XOR operation until the final number of bits of the XOR is less than the number of bits of the codeword polynomial.

(6)

Shift the result obtained from 5 by 21 bits to the left to form a new information polynomial and continue to repeat steps 4 and 5 for the XOR operation.

(7)

If the resulting number of data bits is less than or equal to 21, this data is the data we need.

(8)

If the resulting number of data bits is less than 21, after the 0s at the beginning of the code, this number is the BCH checksum bit.

3.3.4. Design of the Second Protected Data Field

The variables are set up according to the data bits and are used to calculate the BCH code. The second data protection field is 26 bits; the latitude and longitude information is obtained from the GPS receiver; and the sequence is set as g₂(x)

The message bits are from bit 107 to bit 132, and the second data protection field is from bit 0 to bit 25. The data represented by each of the second data protection field are listed in

Table 3. The bit of the second protected data field.

Bit	The Present	Value
0–3	Fixed bits	1101:pass
4	Position data	From Internal Navigation Device
5	Aux device	1: 121.5 MHz homer
6	Latitude Offset Sign
7–11	Latitude Offset Minutes
12–15	Latitude Offset Second
16	Longitude Offset Sign
17–21	Longitude Offset Minutes
22–25	Longitude Offset Second

.

Variables are set up according to the data bits and are used to calculate the BCH code. The latitude and longitude information is obtained from the GPS receiver; the other data are set up according to the registration information of the transmitter; and the sequence is obtained as m₂(x).

3.3.5. The Design of BCH-2

Since the data bits to be checked are 26 bits, if adding the check bits, the total number of the bits is 38. First, add 12 zeros after 26 bits of the second protected data, then the check bit will be gotten by XOR with the codeword polynomial.

First, find the information polynomial:

$${\mathrm{m}}_2\left(\mathrm{x}\right)={\mathrm{m}}_{25}{\mathrm{x}}^{25}+{\mathrm{m}}_{24}{\mathrm{x}}^{24}+\cdots +{\mathrm{m}}_0$$

(8)

Second, find the codeword polynomial and determine by the look-up table method:

$${\mathrm{g}}_2\left(\mathrm{x}\right)={\mathrm{x}}^{12}+{\mathrm{x}}^{10}+{\mathrm{x}}^8+{\mathrm{x}}^5+{\mathrm{x}}^4+{\mathrm{x}}^3+1$$

(9)

As the STM32 microcontroller is a 32-bits for parallel processing, the check polynomial can be obtained after an XOR operation.

$${\mathrm{r}}_2\left(\mathrm{x}\right)=\left({\mathrm{x}}^{12}{\mathrm{m}}_2\left(\mathrm{x}\right)\right){\mathrm{mod} \mathrm{g}}_2\left(\mathrm{x}\right)$$

(10)

If the number of the check bits is not enough for 12, the result is the check digital by preceding 0s at the beginning of the code until the number of check bits is 12.

The specific implementation procedure in the STM32 microcontroller is as follows:

(1)

Define variables and assign initial values to them according to the coding rules for satellite emergency position indicating radio beacons.

(2)

Calculate the second protected data, and define this data using 64-bit data. Then shift left 12 bits.

(3)

Calculate the codeword polynomial.

(4)

Take the data with the same number of the information polynomial as the polynomial to perform XOR operation with the codeword polynomial. Then, take the obtained results as the higher bits of the new information, and act the part without XOR operation in the original data as the lower bits of the new information polynomial.

(5)

Continue to take the data with the same number of bits as the codeword polynomial, and continue to perform the XOR operation until the final data is less than the number of bits of the codeword polynomial.

(6)

If the resulting number of data bits is less than 12, this number is the BCH checksum bit.

3.3.6. Design of Emergency Code

In the message of bit 107 to bit 112, namely the emergency data from bit 0 to bit 5. The data present in the emergency code are listed in

Table 4. The data presentation of the emergency code.

Bit	The Presentation	Value
0	Emergency Code	0: National use, Default 0 1: Emergency code sign
1	Activation Type	0: Manual activation 1: Automatic and manual activation
2–5	IMO nature	1–9: Each represents a type of distress nature and is set according to the location of the distress.

.

Table 5. The table of emergency codes recommended by IMO for the nature of distress.

IMO Indication Position	Binary Code	Uses
1	0001	Fire
2	0010	Crash
3	0011	Stranded
4	0100	Tilt/Tipping
5	0101	Sink
6	0110	Loss of control and drift
7	0111	Nature of unspecified distress
8	1000	Abandon ship
9	1001~1111	For future rescue purposes or for other information if needed for search purposes

shows the table of emergency codes recommended by the IMO for the type of distress [11].

3.4. Baseband Sequence Generation

The COSPAS-SARSAT transmitter coding process includes: setup, receiving position information from GPS receiver, protection bit calculation, BCH generation and baseband sequence generation. The flowchart of the implementation is shown in Figure 2:

Step 1: Set up system bits, country code, long and short messages, etc.

Step 2: The GPS receiver receives the position information.

Step 3: Generate protection bits.

Step 4: Calculate the BCH checksum bits based on the codeword polynomial and the information polynomial.

Step 5: The baseband sequence is obtained from the system bits, the message polynomial, the BCH check bits and the short message emergency code.

Step 6: Based on the baseband sequence, transmit an emergency message.

The baseband sequence of long messages consists of 5 integers. The 24 bits of the system bit is the first integer. The 61 bits of the data bits is the second integer. The 21 bits of the error correcting code is the third integer. The 26 bits of the emergency code is the fourth integer. The 12 bits of the additional selection codes is the fifth integer. The baseband sequence of the long messages consists of 4 integers. The 24 bits of the system bit is the first integer. The 61 bits of the data bits is the second integer. The 21 bits of the error correcting code is the third integer. The 6 bits of the emergency code is the fourth integer.

3.5. Baseband Signal Generation

The baseband array generated by Section 3.4 is calculated integer by integer, bit by bit, to determine whether it is 0 or 1, and then the signal is sent out through the transmitter. Figure 3 shows the signal flow diagram of the real COSPAS-SARSAT transmitter, and Figure 4 shows the program flow diagram of the COSPAS-SARSAT transmitter.

4. Experiment and Comparison

Figure 5 shows the ITU list of MID country code numbers. The BCH-1 is “00010001101000100010”, which converted to hexadecimal is 0x31a22; the BCH-1 is “011001101100”, which converted to hexadecimal is 0x66c.

Figure 6 shows the results of the first BCH error correcting code and the second BCH error correcting code calculated after setting the setup write program in Figure 6 in the STM32 and printed from the serial port.

It can be seen that the first error-coded BCH check digit calculated by BCH-1 is expressed as 0x31a22 in hexadecimal number, which is consistent with the list of ITU Central country codes; the BCH check digit calculated by the second error-coded BCH is expressed as 0x66c in hexadecimal number, which is consistent with the list of ITU Central country code numbers. Therefore, the BCH check digit can be calculated using this method.

Figure 7 shows the actual measurement circuit of the 406 MHz EPIRB in this paper. From Figure 7, it can be found that the STM32 microcontroller is the signal pre-processing module; the COSPAS-SARSAT transmitter is the signal processing module which consist of DDS, LNA, RF bandwidth power amplifier and 406 MHz washboard antenna; and the BeiDou GPS dual-mode positioning module is the acquisition module.

Figure 8 shows the distress message sent by the 406 MHz EPIRB detected by the CLP beacon detector after the coded baseband signal was transmitted in this way. The main information includes: the measured frequency (406.024326 MHz), the country code (403-China), the longitude (30.5° N), the latitude (114.25° E) and the MMSI (the ship’s marine mobile identification code = 123456) code. The test result shows “PASS”, which means the CLP beacon detector has received the distress alerting signals successfully.

Table 6. Comparison analysis of the proposed approach.

BCH	Implementation Way	Encoding Time	Application Fields	Basic Requirement Level
BCH (63, 51)	[12]	1.2 us	STT-MRAM	us
	Traditional method	1.544 ms	COSPAS-SARSAT-SARSAT transmitter	ms
	Proposed method	0.215 ms	COSPAS-SARSAT-SARSAT transmitter	ms
BCH (127, 106)	[12]	1.3 us	STT-MRAM	us
	Traditional method	10.976 ms	COSPAS-SARSAT-SARSAT transmitter	ms
	Proposed method	0.448 ms	COSPAS-SARSAT-SARSAT transmitter	ms

shows the comparison analysis of the proposed approach. The coding algorithm is written in C language based on STM32 microcontroller. For BCH (127, 106) codes and BCH (63, 51) codes, which are applied in the reference [12] in the STT-MRAM field and in this paper in the COSPAS-SARSAT transmitter field, the former runs once at a rate required to be as fast as possible and completed at least at us-level rate, while the latter is time-affluent to complete the coding at the ms-level rate. The former finished the BCH (63, 51) code calculation in 1.2us and the BCH (127, 106) code calculation in 1.3us. While this paper proposed a calculation method for the first BCH error correcting code (BCH-1) and the second BCH error correcting code (BCH-2) for improving the coding efficiency of the baseband signal for 406 MHz transmitter. The 64-bit integer data is used to process the encoded data, and the error correcting codes are obtained by calculating BCH (127, 106) codes and BCH (63, 51) codes, where the BCH (63, 51) codes and the BCH (127, 106) code are completed in 0.215 ms and 0.448 ms, respectively. But in the traditional way, the BCH (63, 51) codes are carried out in 1.544 ms, and the BCH (127, 106) is finished in 10.976 ms. The encoding rate is effectively improved.

5. Conclusions

This paper designed a method of generating the baseband signal of the COSPAS-SARSAR transmitter based on the STM32 microcontroller. The coding process of the baseband signal includes: firstly, calculating the first error correcting coding BCH (127, 106) and the second error correcting coding BCH (63, 51) by 64-bit integer data; secondly, generating the baseband signals according to GB 14391-2021 coding format; and comparing the required time for calculation of BCH check bits, respectively, based on 64-bit integer data and the string-comparison operation. The experimental results show that the BCH check bit calculation method based on the 64-bit integer data can improve the rate of the BCH check bit calculation. At present, this method has been applied to emergency position-indicating radio beacon (EPIRB) and personal locator beacon (PLB), which can run stably.