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Article
Peer-Review Record

Complex Dynamics in Digital Nonlinear Oscillators: Experimental Analysis and Verification

Electronics 2023, 12(11), 2459; https://doi.org/10.3390/electronics12112459
by Tommaso Addabbo, Ada Fort, Riccardo Moretti *, Filippo Spinelli and Valerio Vignoli
Reviewer 1:
Reviewer 2:
Electronics 2023, 12(11), 2459; https://doi.org/10.3390/electronics12112459
Submission received: 29 April 2023 / Revised: 27 May 2023 / Accepted: 27 May 2023 / Published: 30 May 2023
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)

Round 1

Reviewer 1 Report

  In this manuscript, the authors describe the implementation of a specific topology of digital nonlinear oscillators (DNO) using commercially available digital devices, experimentally verifying and demonstrating the ability of these circuits to support complex dynamics, independent of their implementation techniques. In general, this manuscript is prepared with a good idea, but the necessary supplements should be added before publication.

1. In the introduction, the first and second paragraphs can be combined and the previous work can be summarized together. The introduction only mentions the problems that have been studied and fails to mention the problems that have not been solved at present.

2. In the introduction, part 1.1 is too long and needs to be brief, the formula in the article is marked incorrectly, and the position of part 1.1 mechanism explanation is not appropriate.

3. In the whole literature, many pictures placed in experiments are fuzzy.

4. "Since the propagation delays in CMOS logic decrease with Vdd −Vss" in the article lacks the figure explanation.

5. Figure 9 lacks explanation in the text.

6, in the reference, need to pay attention to the punctuation and size, as well as the format of the reference.

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Reviewer 2 Report

1.      Due to different logic implementations, two ring oscillators have different frequencies.  How did 3.6MHz come about? Please explain.

2.      With the same VDD value, what happens to the gate delay of each component under difference temperature?

3.      Could you please provide any frequency's equation that relates to the structure of the oscillator and the gate delay?

 

4.      Please provide the comparison table.

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Round 2

Reviewer 2 Report

Reviewers' comments have been well-addressed. The revised manuscript can be accepted now.

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