Leakage Current Stability Analysis for Subthreshold SRAM

Round 1

Reviewer 1 Report

The author have revised their manuscript, but there are still some points that they have to be addressed. More specifically:

• Introduction, is still very weak regarding the state-of-the-art methodologies. Authors should include general background.
• In Introduction, they should add a last paragraph regarding the structure of their paper
• Section 2.2 name is "Static stability analysis of conventional". It seems that something missing after conventional.
• Equations 4, 5, 6 needs to be explained further. Please add a paragraph regarding the different coefficients.
• In experimental results, the 28nm process is still the TSMC library.
• Please add the abbreviations regarding the different process corners.

Author Response

Please see the attachment！

Author Response File: Author Response.pdf

Reviewer 2 Report

My comments have been addressed, I have no further concerns.

Author Response

Please see the attachment！

Author Response File: Author Response.pdf

Round 2

Reviewer 1 Report

The authors have revised their manuscript and it can now be accepted for publication.

This manuscript is a resubmission of an earlier submission. The following is a list of the peer review reports and author responses from that submission.

Round 1

Reviewer 1 Report

 Comments to the authors

• The paper presents leakage current as a challenging issue on the stability of due to decreasing on/off current ratio of the device – and hence stability analysis of the subthreshold SRAMs is an appealing area, particularly in the light of increasing adoption of low-power memories
• Mentioning that static analysis is conventional and requires data processing instead of giving direct results, which the authors present as the reason of stability analysis on the leakage current in the subthreshold SRAMS
• The method suggests that the conventional method of stability analysis through measuring the magnitude of static noise tolerance is not suitable for stability analysis in the subthreshold devices
• The on/off current rations of PMOS and NMOS transistors are measured separately at the cmos 28nm process, as shown in Figure 1.
• During the READ operation cycle, the static noise tolerance measurement for a conventional 6T SRAM as shown in Figure 3 (it should be Figure 2) is described, saying that
• Following the technique of [7], a scan voltage from 0 to 1.2 V is added at node QR, and the voltage variation at node QL is measured, and a scan voltage from 0 to 1.2 V is added at node QL, and the voltage variation at QR is measured, and the plots of the two voltage transmission characteristics are as plotted in Figure 3 (not Figure 4).
• Likewise, for the write operation cycle [9], the voltage transfer characteristic curve, VTC, is 78 plotted by first adding a scan voltage from 0 to 1.2 V at node QL and then by measuring the voltage change at point QR. Similarly, the voltage transfer characteristic curve VTC2, is plotted by first adding a sweep voltage from 0 to 1.2 V at node QR and measuring the voltage change at point QL, with plots as shown in Figure 4 (not Figure 5)
• The stability measurement based on leakage current is shown in Figure 5 (not Figure 6), with Simulation of stability curve based on leakage current given in Figure 6 (not Figure 7)
• The plots of stability analysis by conventional and leakage current methods are shown in Figure 7 (not Figure 8). (a) Static stability at 1.2v; (b) Stability of leakage current at 1.2v; (c) Static stability at 0.5v; 145 (d) Stability of leakage current at 0.5v.
• The stability simulations are perfumed for designs of 8T, 9T, and 10T subthreshold SRAMs, with similar plots shown in Figure 9 for 8 T, Figure 10 for 9 T, and Figure 11 for 10 T, however, in all the text referring to these plots, the authors use 8 T, which should be corrected
• The simulation data is given in Table 5, summarizing in conclusions that in the subthreshold region, the static stability method considering only voltage is not applicable, and the measurement results are not accurate. The leakage current-based stability analysis, which considers both current and voltage together, further demonstrates that the leakage current-based stability analysis is more accurate than the static stability method in the subthreshold region.
• The stability analysis result of the leakage current is 121.75% of the static stability, which is more 2sensitive to the change of process angle; under different designs, the stability analysis accuracy of the leakage current is 120.58% of the static stability.
• Therefore, the leakage current-based stability analysis method for subthreshold SRAM proposed in this paper is more accurate and convenient, and can be applied to the measurement of low-power memory stability under subthreshold, which provides a new idea for the testing of VLSI.

 

Is the subject matter presented in a comprehensive manner?

• It is a good paper for contribution to the body of knowledge and understanding related to the precise and concise worded title “Leakage current stability analysis for Subthreshold SRAM” and the subject under discussion for the stability analysis of subthreshold regions SRAM. There is a good flow and highly well-connected presentation for a meaningful outcome, the conclusion is reflective of what is promised in the Abstract. I suggest the authors to do the corrections indicated without referring the paper back to me for resubmission. The Associate is post-reviewer supervisor in the case of my suggested corrections in red color writing.

Are the references provided applicable and sufficient?

• The authors take support from fifteen (15) mostly current and branded references, including none (0) from Electronics.

Reviewer Confidential comments to the editor

• Further, the Abstract should be visibly divided into Background/Motivation, Method, Results/Application, and Utility/Impact. The Conclusion is drawn based on the Results and Discussion, making sure that what has been promised in Abstract is delivered in Conclusion.

Reviewer 2 Report

The authors propose stability analysis method based on leakage current for the stability measurement of subthreshold SRAMs. However, the paper needs significant revision in order to be comprehensible. My specific comments are:

• In the abstract the acronyms need to be defined.
• In Section 1, at the Introduction the authors do not provide any background regarding the stat-of-the-art methodologies. This sections needs significant revision by adding all the relevant references.
• In Section 2.1, author claim that current rations are measured at cmos 28nm process. Authors should provide the technology node specifications. Which library they used and what transistor models.
• In Section 2.2, again there are a lot abbreviations. What is SNM and WSNM? Moreover, equation(1) is hardly explained. How SNM1 and 2 are calculated?
• Table 1 is badly scaled and very hard to read.
• Experimental results are very weak. Authors do not provide any comparisons with other similar methods to prove the strengths. 
• Table 5 has again a lot of abbreviations that are not explained. What are those values. It is not clear how they are calculated and what they represent.
• Table 5 also needs to be renamed to Table 4.

Reviewer 3 Report

The submitted paper deals with leakage current stability analysis for subthreshold SRAM.  The paper requires substantial improvement before it can be submitted to a journal.  For instance, the introduction is very short and does not reflect at all the up-to-date work in the field. A research article should have a comprehensive literature review that presents up-to-date work in the field. Furthermore, all sections of the paper require improvements including the quality of the presentation and the resolutions of the figures.