# A Universal Electronically Controllable Memelement Emulator Based on VDCC with Variable Configuration

## Abstract

**:**

## 1. Introduction

## 2. Proposed Configuration

_{p}and α

_{n}denotes the non-ideal current gain between x, w

_{p}and w

_{n}terminals (ideally α

_{p}= α

_{n}= 1), respectively. The transconductance gain of the VDCC can be computed as follows:

_{MN}is defined as (W/L)

_{M1}= (W/L)

_{M2}, W and L are width and length of transistors, and B is denoted as the current mirroring ratio between M

_{3,4}and M

_{5,6}transistors. In addition, μ

_{n}and C

_{OX}are electron mobility, an oxide gate capacitance per unit area of MB

_{1}transistor, respectively.

_{el}(realized with two p-MOS transistors) between the chosen node of VDCC and ground in Figure 1 can be tuned by a control voltage V

_{c}, being defined by:

_{MR}is defined as (W/L)

_{MR1}= (W/L)

_{MR2}, while V

_{c}is the control voltage of equivalent resistor. Instead of the proposed grounded capacitances in Figure 1, we can use the MOS capacitance when the simulator circuits are operated in the high-frequency region, which brings additional benefits from the integrated circuit.

#### 2.1. Charge-Controlled Grounded Memristor—Case A

_{n}, the port x is connected to capacitance C

_{1}and at the same time with bias voltage V

_{B11}, the port z is shortly connected with port w

_{p}, while ports p and n change positions between the input voltages and ground. In this configuration, we obtain:

#### 2.2. Flux-Controlled Grounded Memristor with Electronic Control—Case B

#### 2.3. Electronically Flux-Controlled Floating/Grounded Memristor—Case C

#### 2.4. Floating/Grounded Electronically Controlled Meminductor—Case D

#### 2.5. Electronically Controlled Grounded Memcapacitor—Case E

#### 2.6. Floating/Grounded Memcapacitor with Hard/Soft Switching Mechanism—Case F

_{m}cosωt and the value of the voltage converges to zero [24], the obtained transient characteristic approaches the q-axis. By such adjustment, it is possible to obtain the hard switching characteristic. On this basis, the value of the input voltage at the moment when the direction of movement of the operating point on the transient characteristic changes is defined as

_{B11}(t). However, it should be noted that even without this option, it is possible to switch the circuit to inverse operation due to the functional dependence between the input voltage and the charge and provide an incremental mode of operation (in direct mode, the memcapacitor emulator operates in decremental mode), since the value of the memcapacitance then increases from the initial negative value—Equation (19).

## 3. Non-Ideal and Parasitic Analysis

_{p}, R

_{n}, R

_{z}, R

_{wp}and R

_{wn}and the parasitic capacitances C

_{p}, C

_{n}, C

_{z}, C

_{wp}and C

_{wn}[25,26] appear in parallel at the corresponding terminals p, n, z, w

_{p}and w

_{n}(in an ideal VDCC, all of these parasitic resistances are approximately equal to infinity, while all parasitic capacitances are approximately equal to zero—in the form of a shunt R-C network at all of the terminals with external circuit elements), while at port x, parasitic resistance R

_{x}and parasitic inductance L

_{x}appear in series (in ideal VDCC, R

_{x}and L

_{x}are approximately equal to zero). If we take into consideration the influence of the parasitic existence of parasitic port impendences, we come to a position where it is possible to analyze the operation of the proposed universal memelement emulator in a situation when it operates in a high-frequency environment (at high frequencies, parasitic port resistances can be neglected) and define the equivalent functional dependencies as:

_{1}, C

_{2}and C

_{3}must be chosen in such a way that they are several times higher than the parasitic capacitances of the ports to which they are connected. Owing to this setting, the parasitic capacitance effects can be absorbed at working frequencies. The resistance of the equivalent electronically controlled resistor must be greater than the series resistance of the x port. In order to reduce the impact of the parasitic resistances, the values of C

_{1}, C

_{2}and C

_{3}must be selected in such a way that the equivalent impedance of these capacitors is several times smaller than the parasitic resistances of the VDCC ports.

_{m0}is the transconductance gain and k

_{0}is the gain factor of the OTA cell at zero (low) frequency, while ω

_{g}= 1/τ

_{g}and ω

_{k}= 1/τ

_{k}are the corresponding pole frequencies (the τ

_{g}, and τ

_{k}are delays corresponding to pole frequencies, respectively). Simply replacing values for parameters g

_{m}and k in the above Equations (28)–(33), more complete images will be obtained about the frequency characteristics of the realized emulators and their dependence on present non-idealities. It is completely clear that the useful operating frequency range of the emulator in Figure 1 can be defined as ω << min(ω

_{g}, ω

_{k}). In general, the values of these pole frequencies in (34) will depend on the practical implementation of the VDCC. The bandwidth of the VDCC can be improved by inserting a compensation resistor R, one voltage buffer and additional MOS transistor pair, as proposed in [27] in the VDCC CMOS structure shown in Figure 2. With this modification, the transconductance gain is changed—the new value of this parameter becomes defined as g

_{m}= g

_{m0}/(1 + g

_{m0}R). In this way, the bandwidth of the OTA cell (first stage of the VDCC) can be changed because it depends on g

_{m}.

## 4. Simulation and Experimental Results

_{B2}voltages of the circuit were chosen as ±0.9 V and 0 V, respectively. The bulk terminals of the PMOS and NMOS transistors were connected to their sources terminals and the most negative voltage point (V

_{SS}), respectively. The capacitor value and the aspect ratios of the VDCC were chosen as in [17,26], and M

_{B1}, M

_{B2}, MR

_{1}, and MR

_{2}were selected as 3.6 μm/1.8 μm, 3.06 μm/0.72 μm, 60 μm/2 μm, and 60 μm/2 μm, respectively. An electronic resistor that is implemented by only two PMOS transistors can be tuned by the control voltage, where its control voltage of 0.65 V resulted in equivalent resistance of R

_{el}= 1.47 kΩ. The power consumption of the proposed VDCC (Figure 2) was 0.869 mW. The layout of the VDCC (in 0.18 μm technology) along with electronically controlled resistor and switch was shown in [28] excluding the capacitor, and occupied a 42.2 μm × 27.5 μm chip area.

_{2}in case A, when the proposed design simulated grounded charge-controlled memristance. In Figure 8b, the simulation check was performed for different frequencies in case B, at a constant value of the capacitance used and the amplitude of the excitation voltage signal of 0.2 V. With the increase in the working frequency, it was concluded that the area covered by the lobes on the i-v plane was becoming reduced, which is a well-known characteristic of memristive elements. The VDCC as an active device was also used in the implementation of memristive emulators described in [21,28], but the configurations proposed here (cases A and B) are far superior in terms of performance in virtually all aspects: extended frequency range, simpler implementation with fewer passive components, lower impact of existing non-idealities. The maximum operating frequency of the proposed emulator circuits was 50 MHz (Figure 8c) for the proposed configuration in case C, as a consequence of realistically achievable capacitance values in the integrated technique, directly resulting from the size of the capacitor used (C

_{1}), since it becomes the order of magnitude of parasitic capacitances that exist on VDCC ports (Table 1).

_{2}= C

_{3}= 50 pF, f = 1 MHz, I

_{m}= 0.25 mA, V

_{B12}= −0.28 V). It is also important to note that with falling temperature levels, the current flow in the memcapacitor was enhanced.

_{m}= 200 µA with 90° phase shift was used in the course of simulation of the configuration proposed in case F—floating memcapacitance. To demonstrate the transition from one switching mechanism to another in case F, in Figure 11a, different values of ground capacitances C

_{1}and C

_{2}were used. By increasing and decreasing the capacitor values, the pinched hysteresis curve area decreased and increased, respectively, reducing the capacitance. The bending point on the transient characteristic became closer to the q axis, i.e., the value of the voltage corresponding to that point converged to 0, as predicted through theoretical analysis (relation (18)). The same effect can be obtained by changing the frequency of the input current signal because the linear time-invariant part of the emulated memcapacitance becomes dominant over the linear time-variant part (Equation (19)). As was predicted with the theoretical analysis, the memcapacitor emulator proposed in case F can operate in inverting mode. The performance check of this working regime was performed for different frequencies and amplitudes of the excitation signal, at a constant value of the capacitance used (C

_{1}= C

_{2}= 100 pF) (Figure 11b). On the basis of the simulation results, we can conclude that with an increase in the working frequency, the area covered by the lobes on the q-v plane is reduced. In the case of an increase in the operating frequency, the pinched hysteresis curve area decreases, and the memcapacitor behaves like an ordinary capacitor because the variable part in Equation (17) diminishes as the frequency of operation increases.

_{1}= C

_{2}= 1 nF, V

_{B11}= −0.28 V). As we can see from the presented simulation results, the memcapacitance value remained constant even in the absence of a pulse signal—the proposed circuit showed strong memory properties between pulses. Practically, the proposed configuration (as all others proposed in this paper) is suitable for the study and design of neuromorphic circuits provided with synaptic plasticity, and in particular, a long-term potentiation (LTP). Additionally, by switching the proposed emulation circuit into the inverting mode, it is possible to provide an incremental mode of operation, since then the memcapacitance value increases from the initial negative value (Equation (19)).

#### 4.1. Process Variation

_{1}= C

_{2}= C

_{3}= 10 pF, V

_{m}= 0.2 V and I

_{m}= 0.3 mA. Based on the obtained simulation results, depending on the simulated configuration, we can conclude that the voltage/current flow in the case of FF mode is larger than in SS mode, as expected, yielding a lower voltage/current flow in the SS process corner when compared with the FF process corner.

#### 4.2. Experimental Results

_{m}= 0.4 mA to I

_{m}= 0.5 mA, while in cases of experimental checks of flux-controlled emulators, the input voltage signal possessed amplitudes of V

_{m}= 0.4 V and V

_{m}= 0.5 V.

_{el}value was replaced with a resistance of 100 Ω, and the g

_{m}value was adjusted to 10 mS for the experiment.

## 5. Conclusions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Conflicts of Interest

## References

- Chua, L.O. Memristor: The missing circuit element. IEEE Trans. Circuit Theory
**1971**, CT-18, 507–512. [Google Scholar] [CrossRef] - Chua, L.O. Device modeling via nonlinear circuit elements. IEEE Trans. Circuit Syst.
**1980**, 27, 1014–1044. [Google Scholar] [CrossRef] - Chua, L.O.; Kang, S.M. Memristive Devices and Systems. Proc. IEEE
**1976**, 64, 209–223. [Google Scholar] [CrossRef] - Di Ventra, M.; Pershin, Y.V.; Chua, L.O. Circuit elements with memory: Memristors, memcapacitors, and meminductors. Proc. IEEE
**2009**, 97, 1717–1724. [Google Scholar] [CrossRef] - Khalil, N.A.; Fouda, F.E.; Said, L.A.; Radwan, A.G.; Soliman, A.M. A general emulator for fractional-order memristive elements with multiple pinched points and application. AEU–Int. J. Electron. Commun.
**2020**, 124, 153338. [Google Scholar] [CrossRef] - Taskıran, Z.G.; Çam;Sagbas, M.; Ayten, U.E.; Sedef, H. A new universal mutator circuit for memcapacitor and meminductor elements. AEU–Int. J. Electron. Commun.
**2020**, 119, 153180. [Google Scholar] [CrossRef] - Romero, F.J.; Medina-Garcia, A.; Escudero, M.; Morales, D.P.; Rodriguez, N. Design and implementation of a floating meminductor emulator upon Riordan gyrator. AEÜ-Int. J. Electron. Commun.
**2021**, 133, 153671. [Google Scholar] [CrossRef] - Singh, A.; Rai, S.K. VDCC-Based Memcapacitor/Meminductor Emulator and Its Application in Adaptive Learning Circuit. Iran, J. Sci. Technol. Trans. Electr. Eng.
**2021**, 45, 1151–1163. [Google Scholar] [CrossRef] - Zhao, Q.; Wang, C.; Zhang, X. A universal emulator for memristor, memcapacitor, and meminductor and its chaotic circuit. Chaos Interdiscip. J. Nonlinear Sci.
**2019**, 29, 013141. [Google Scholar] [CrossRef] - Sharma, P.K.; Ranjan, R.K.; Khateb, F.; Kumngern, M. Charged Controlled Mem-Element Emulator and Its Application in a Chaotic System. IEEE Access.
**2020**, 8, 171397–171407. [Google Scholar] [CrossRef] - Raj, N.; Ranjan, R.K.; Khateb, F.; Kumngern, M. Mem-Elements Emulator Design with Experimental Validation and Its Application. IEEE Access.
**2021**, 9, 69860–69875. [Google Scholar] [CrossRef] - Liu, Y.; Iu, H.C.; Guo, Z.; Si, G. The Simple Charge-controlled Grounded/Floating Mem-element Emulator. IEEE Trans. Circuits Syst. II Express Briefs
**2020**, 68, 2177–2181. [Google Scholar] [CrossRef] - Yu, D.; Zhao, X.; Sun, T.; Iu, H.H.C.; Fernando, T. A simple floating mutator for emulating memristor, memcapacitor, and meminductor. IEEE Trans. Circuits Syst. II Express Briefs
**2020**, 67, 1334–1338. [Google Scholar] [CrossRef] - Zheng, C.; Yu, D.; Iu, H.H.C.; Fernando, T.; Sun, T.; Eshraghian, J.K. A novel universal interface for constructing memory elements for circuit applications. IEEE Trans. Circuits Syst. I Regul. Pap.
**2019**, 66, 4793–4806. [Google Scholar] [CrossRef] - Bhardwaj, K.; Srivastava, M. New electronically adjustable memelement emulator for realizing the behavior of fully floating meminductor and memristor. Microelectron. J.
**2021**, 114, 105126. [Google Scholar] [CrossRef] - Bhardwaj, K.; Srivastava, M. New grounded passive elements-based external multiplier-less memelement emulator to realize the floating meminductor and memristor. Analog Integr. Circuits Signal Process.
**2022**, 110, 409–429. [Google Scholar] [CrossRef] - Bhardwaj, K.; Srivastava, M. New multiplier-less compact tunable charge-controlled memelement emulator using grounded passive elements. Circuits Syst. Signal Process.
**2022**, 41, 2429–2465. [Google Scholar] [CrossRef] - Bhardwaj, K.; Srivastava, M. Compact Floating Dual Memelement Emulator Employing VDIBA and OTA: A Novel Realization. Circuits Syst. Signal Process.
**2022**, 41, 5933–5967. [Google Scholar] [CrossRef] - Gupta, M.; Dogra, P.; Singh, A.T. Novel current mode universal filter and dual-mode quadrature oscillator using VDCC and all grounded passive elements. Aust. J. Electr. Electron. Eng.
**2019**, 16, 220–236. [Google Scholar] [CrossRef] - Kumar, A.; Chaturvedi, B.; Mohan, J. Minimal realizations of integrable memristor emulators. J Comput Electron.
**2022**. [Google Scholar] [CrossRef] - Bhardwaj, K.; Srivastava, M. Compact Charge-Controlled Memristance Simulator with Electronic/Resistive Tunability. J. Circuits Syst. Comput.
**2022**, 31, 2250094. [Google Scholar] [CrossRef] - Petrović, P.B. A new electronically controlled floating/grounded meminductor emulator based on single MO-VDTA. Analog Integr. Circ. Sig. Process.
**2022**, 110, 185–195. [Google Scholar] [CrossRef] - Vista, J.; Ranjan, A. Simple charge controlled floating memcapacitor emulator using DXCCDITA. Analog Integr. Circ. Sig. Process.
**2020**, 104, 37–46. [Google Scholar] [CrossRef] - Petrović, P.B. Electronically Adjustable Grounded Memcapacitor Emulator Based on Single Active Component with Variable Switching Mechanism. Electronics
**2022**, 11, 161. [Google Scholar] [CrossRef] - Kacar, F.; Yesil, A.; Minaei, S.; Kuntman, H. Positive/negative lossy/lossless grounded inductance simulators employing single VDCC and only two passive elements. AEU–Int. J. Electron. Commun.
**2014**, 65, 73–78. [Google Scholar] [CrossRef] - Pitaksuttayaprot, K.; Phanrattanachai, K.; Jaikla, W. Electronically Adjustable Multiphase Sinusoidal Oscillator with High-Output Impedance at Output Current Nodes Using VDCCs. Electronics
**2022**, 11, 3227. [Google Scholar] [CrossRef] - Srivastava, M.; Prasad, D.; Bhaskar, D.R. New electronically tunable grounded inductor simulator employing single vdta and one grounded capacitor. J. Eng. Sci. Technol.
**2017**, 12, 113–126. [Google Scholar] - Yesil, A.; Babacan, Y.; Kacar, F. Electronically tunable memristor based on VDCC. AEÜ–Int. J. Electron. Commun.
**2019**, 107, 282–290. [Google Scholar] [CrossRef] - Vista, J.; Ranjan, A. High Frequency Meminductor Emulator Employing VDTA and its Application. IEEE Trans. Comp.-Aid. Des. Int. Circ. Sys.
**2020**, 39, 2020–2028. [Google Scholar] [CrossRef] - Valencia-Ponce, M.A.; Tlelo-Cuautle, E.; Gerardo de la Fraga, L. On the Sizing of CMOS Operational Amplifiers by Applying Many-Objective Optimization Algorithms. Electronics
**2021**, 10, 3148. [Google Scholar] [CrossRef] - Biolek, D.; Kohl, Z.; Vavra, J.; Biolková, V.; Bhardwaj, K.; Srivastava, M. Mutual Transformation of Flux-Controlled and Charge-Controlled Memristors. IEEE Access
**2022**, 10, 68307–68318. [Google Scholar] [CrossRef] - Demir, E.; Yesil, A.; Babacan, Y.; Karacali, T. Operational Transconductance Amplifier Based Electronically Controllable Memcapacitor and Meminductor Emulators. J. Circ. Syst. Comput.
**2021**, 30, 2150222. [Google Scholar] [CrossRef]

**Figure 4.**(

**a**) Flux-controlled frequency floating/grounded memristor. (

**b**) Floating/grounded electronically controlled meminductor.

**Figure 7.**(

**a**) Frequency response for the current transfer gain (α). (

**b**) Frequency response for the tracking error of the transconductance gain of the VDCC (β) and the voltage transfer gain (γ).

**Figure 8.**Pinched hysteresis loops generated by the proposed memristor emulators (

**a**) for different capacitances, f = 1 MHz—case A; (

**b**) for different frequencies of the input voltage signal and grounded capacitance C

_{2}= 100 pF—case B; (

**c**) for frequency of 50 MHz and amplitude V

_{m}= 300 mV—case C.

**Figure 9.**Transient responses of the proposed emulator circuits: (

**a**) the input current–flux relationships for the floating/grounded meminductance emulator—case D, for different bias voltages of VDCC (C

_{1}= C

_{2}= 50 pF, f = 1 MHz, V

_{m}= 0.5 V, V

_{B11}= −0.28 V); (

**b**) time-domain response of the proposed meminductor emulator.

**Figure 10.**(

**a**) Time-domain response of the proposed memcapacitor emulator in case E, (

**b**) hysteresis loop at various temperatures.

**Figure 11.**Pinched hysteresis loops generated by the charge-controlled memcapacitor emulators proposed in case F (

**a**) for different capacitances, f = 10 MHz, I

_{m}= 0.2 mA; (

**b**) for different frequencies and amplitudes of the input current signal in inverting mode of operation, C

_{1}= C

_{2}= 100 pF; (

**c**) variation of memcapacitance with time for pulse voltage of T

_{on}= 0.1 μs for circuits proposed in case F at 1 MHz.

**Figure 13.**(

**a**) Practical implementation of VDCC; experimental result of pinched hysteresis loop at 10 kHz obtained using commercial ICs: (

**b**) case D; (

**c**) case F.

Parameter | Value for V_{B1} = −0.28 V |
---|---|

p and n dc resistance, R_{p} = R_{n} | 4. 38 TΩ |

z output dc resistance R_{z} | 229.43 kΩ |

w_{p} and w_{n} output dc resistance | R_{wp} = 186.66 kΩR _{wn} = 175.28 kΩ |

p and n input capacitance C_{p} = C_{n} | 0.034 pF |

w_{p} and w_{n} output capacitance | C_{wp} = 0.0105 pFC _{wn} = 0.022 pF |

z output capacitance C_{z} | 0.025 pF |

x output dc resistance R_{x} | 43 Ω |

z output inductance L_{x} | 1.28 μH |

transconductance of OTA stage g_{m} | 282 µS |

corner frequency ω_{g}, ω_{k} | 5.6 rad/s |

Ref. | Number of Active Comp. | Emulated Elements | Number of Grounded/Floating Passive Elements | Power Supply | Max. Operating Frequency | Type of Emulator (F/G) | Electron. Tunability | Need for External Memristor |
---|---|---|---|---|---|---|---|---|

[5] | 3 CCII, 1 AM 1 OA, 1 divider | MR MC ML | 5 G | ±5 V | 5 kHz | G | No | No |

[6] | 1 CBTA | MC ML | 1 G | ±0.9 V | 300 kHz | F | Yes | Yes |

[8] | 1 VDCC | MC ML | 1 G | ±0.9 V | 700 kHz | F | Yes | Yes |

[9] ^{meas}. | 3 CCII, 1 AM | MR MC ML | 5 G | ±10 V | 5 kHz | G | No | No |

5 CCII, 1 AM, 1 OP | 6 G, 1 F | F | ||||||

[10] ^{meas}. | 2 CCII 1 AM | MR MC | 3 G, 2 F 2 G, 2 F | ±10 V | 25 kHz | G F | No | No |

[11] | 2 (1) CCII, 1 MOTA (OTA) | MR MC ML | 4 G (2 G) | ±1.2 V | 1 MHz | G(FMR) | No | No |

[12] ^{meas}. | 4 AD844, 1 AD633, 1 μA741 | MR MC ML | 2 G, 6 F | ±15 V | 10–560 kHz 48–360 kHz 20 k−1.5 MHz | F/G | No | No |

[13] ^{meas}. | 4 AD844, 1 TL084, 1 VD | MR MC ML | 4 G, 4 F | ±10 V | 10 kHz | F | No | No |

[14] ^{meas}. | 4 AD844, 1 μA741, 1 VD | MR MC ML | 1 G, 3 F (2 G,2 F) | ±15 V | 180 kHz | F | No | No |

[15] | 2 VDTA | MR ML | 2 G | ±0.9 V | 1.5 MHz | F | Yes | No |

[16] | 1 MVDCC, 1 OTA | MR ML | 3 G | ±0.9 V | 300 kHz | F | Yes | No |

[17] | 1 VDCC, 1 OTA | MR MC | 3 G | ±0.9 V | 1 MHz | G | Yes | No |

[18] | 1 VDBIA, 1 OTA, 2 MOS | MR ML | 1 G 2 G | ±1 V | 4–8 MHz 2 MHz | F | Yes | No |

[32] | 3 MOOTA, MOS | MC MI | 3 G | ±0.9 V | 500 kHz | G | Yes | No |

This work | 2 VDCC, 2 MOS FET | MR-A | 1 G | ±0.9 V | 2 MHz | G | No | No |

MR-B | 1 G | ±0.9 V | 50 MHz | G | Yes | No | ||

MR-C | 1 G | ±0.9 V | 50 MHz | F/G | Yes | No | ||

ML-D | 2 G | ±0.9 V | 50 MHz | F/G | Yes | No | ||

MC-E | 2 G | ±0.9 V | 2 MHz | G | Yes | No | ||

MC-F | 2 G | ±0.9 V | 50 MHz | F/G | Yes | No |

^{meas}. = measured on real devices.

Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. |

© 2022 by the author. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).

## Share and Cite

**MDPI and ACS Style**

Petrović, P.B. A Universal Electronically Controllable Memelement Emulator Based on VDCC with Variable Configuration. *Electronics* **2022**, *11*, 3957.
https://doi.org/10.3390/electronics11233957

**AMA Style**

Petrović PB. A Universal Electronically Controllable Memelement Emulator Based on VDCC with Variable Configuration. *Electronics*. 2022; 11(23):3957.
https://doi.org/10.3390/electronics11233957

**Chicago/Turabian Style**

Petrović, Predrag B. 2022. "A Universal Electronically Controllable Memelement Emulator Based on VDCC with Variable Configuration" *Electronics* 11, no. 23: 3957.
https://doi.org/10.3390/electronics11233957