S., G.; Chappa, A.; Rao, K.D.; Dawn, S.; Ustun, T.S.
Development of an Enhanced Selective Harmonic Elimination for a Single-Phase Multilevel Inverter with Staircase Modulation. Electronics 2022, 11, 3902.
https://doi.org/10.3390/electronics11233902
AMA Style
S. G, Chappa A, Rao KD, Dawn S, Ustun TS.
Development of an Enhanced Selective Harmonic Elimination for a Single-Phase Multilevel Inverter with Staircase Modulation. Electronics. 2022; 11(23):3902.
https://doi.org/10.3390/electronics11233902
Chicago/Turabian Style
S., Govind, Anilkumar Chappa, K. Dhananjay Rao, Subhojit Dawn, and Taha Selim Ustun.
2022. "Development of an Enhanced Selective Harmonic Elimination for a Single-Phase Multilevel Inverter with Staircase Modulation" Electronics 11, no. 23: 3902.
https://doi.org/10.3390/electronics11233902
APA Style
S., G., Chappa, A., Rao, K. D., Dawn, S., & Ustun, T. S.
(2022). Development of an Enhanced Selective Harmonic Elimination for a Single-Phase Multilevel Inverter with Staircase Modulation. Electronics, 11(23), 3902.
https://doi.org/10.3390/electronics11233902