# K-Shaped Silicon Waveguides for Logic Operations at 1.55 μm

^{1}

^{2}

^{3}

^{*}

## Abstract

**:**

## 1. Introduction

_{silicon}≈ 3.48 at 1.55 μm) and silica (i.e., cladding with n

_{silica}≈ 1.444 at 1.55 μm), silicon-on-silica optical waveguides have unique optical features [15]. Various optical waveguides have been recently used for implementing both all-optical logic gates and all-optical networks [16,17,18,19,20,21,22,23]. Therefore, in this paper, we simulate seven basic logic operations, including XOR, AND, OR, NOT, NOR, NAND, and XNOR, using K-shaped waveguides operated at the telecommunications wavelength of 1.55 μm. This waveguide has four terminals, each of which has an output port and three input ports composed of silicon patterned on silica. It is generally known that silicon has a relatively low optical loss (2 dB/cm) for wavelengths up to 8 μm, but silica’s optical loss increases rapidly beyond 3.6 μm [15]. The interferences, both constructive and destructive, which are created by the phase difference between the input beams, are the key for the realization of the considered logic operations. In order to demonstrate how the logic operations are executed, finite-difference time-domain (FDTD) solutions are obtained, using commercially available software, with the convolutional optimally matched layer as an absorbing boundary condition. The logic operations’ performance is assessed against the contrast ratio (CR) metric. According to the derived simulation results, the employed waveguide can achieve higher CRs at an extended data rate of 120 Gb/s and, hence, can outperform previously reported designs [16,17,18,19,20].

## 2. K-Shaped Waveguide

_{th}) value to 0.12 is necessary at first. The formula for the output transmission (T) is $T={I}_{out}/{I}_{in}$ [16], where ${I}_{out}={\left|{E}_{out}\right|}^{2}$ is the intensity at P

_{out}, and I

_{in}= I

_{1}+ I

_{2}+ I

_{3}is the sum of the intensities at the three input ports. The input beams must satisfy the requirements for phase-matching in order to maximize T. In essence, this implies ensuring sure that the interacting waves are kept in the proper relative phase throughout the direction of propagation. However, before high CR logic gates can be accomplished, the phase-matching condition necessitates a specific selection of the input wavelength and waveguide characteristics. The phase-matching in silicon waveguides is induced by the contributions of the waveguide birefringence, material dispersion, waveguide dispersion, and cross- and phase-self modulations [24]. It is, therefore, feasible to achieve phase-matching by designing the waveguide such that the birefringence and material dispersion terms cancel one another, according to the phase-matching analysis of silicon waveguides, as reported in [24]. When T > T

_{th}, P

_{out}generates a logical output of ‘1’, while in all other cases, it generates a ‘0’. The CR is an important metric for logic devices and is defined as $CR\left(dB\right)=10ln\left[{P}_{mean}^{1}/{P}_{mean}^{0}\right]$ [25], where ${P}_{mean}^{1}$ and ${P}_{mean}^{0}$ represent the mean peak powers of output logic bits ‘1’ and ‘0’, respectively. Compared to other metrics, such as the extinction ratio, the CR offers a better and more accurate evaluation of the performance of the optical logic operations [26]. For the proposed waveguide, Table 1 lists the default parameters’ values used in the simulation.

_{1}and θ

_{2}) play an important role in the K-shaped design in order to implement the considered logic gates with high CRs. Thus, the effect of the angle between the long and short slots (θ

_{1}) on a normalized spectral transmission (T) at an operating wavelength of 1550 nm is simulated, as shown in Figure 4. It is clear from Figure 4 that the highest T occurred at θ

_{1}= 50° (i.e., θ

_{2}= 80°), as optimized in this simulation.

## 3. Logic Operations

#### 3.1. XOR

_{in2}of Figure 1, while the other two beams are launched into P

_{in1}and P

_{in3}. The REF (all ‘1’s) is used to introduce a reference phase difference between the input signals, resulting in either constructive or destructive interference. Constructive interference happens when all input beams are injected at the same phase (resulting in an output of ‘1’); destructive interference happens when they are launched at different phases (resulting in an output of ‘0’). As a result, for an XOR operation, P

_{out}produces a ‘1’ (meaning T > T

_{th}) because of the constructive interference that occurs between the input beams when the combination of these input beams (01, 10) is injected along with the REF at the same phase (i.e., Φ

_{1}= Φ

_{3}= Φ

_{REF}= 180°). The destructive interference between the incident beams causes a ‘0’ output to be produced at P

_{out}(meaning T < T

_{th}) when the combination (11), with the REF at different phases (i.e., Φ

_{1}= 0°, Φ

_{3}= 90°, and Φ

_{REF}= 180°), is launched. This results in the XOR logic function. We notice the presence of light at ports having ‘0’ input, which is a natural result because the inner interfaces of the three input ports of the K-shaped waveguide are all opposite, and, therefore, the light is deflected inside them in an outward direction. The XOR field intensity distributions are displayed in Figure 5, using a K-shaped silicon-on-silica waveguide at 1.55 μm.

#### 3.2. AND

_{in1}and P

_{in3}as well as launching the REF (all ‘1’s) from P

_{in2}. P

_{out}creates a ‘1’ output, due to constructive interference, when all incident beams are released into the proposed waveguide at the same phase (i.e., Φ

_{1}= Φ

_{3}= Φ

_{REF}= 180°). In contrast, when these incident beams are injected at a different phase, P

_{out}outputs a ‘0’ because of destructive interference. This results in the AND operation. In Figure 6, the AND field intensity distributions are shown, using a K-shaped silicon-on-silica waveguide at 1.55 μm.

#### 3.3. OR

_{out}becomes a ‘1’. Thus, the OR logic function between the two input beams is realized. Figure 7 depicts the OR field intensity distributions, using the proposed waveguide at 1.55 μm.

_{in2}. Table 5 indicates the necessity of using the REF to obtain higher CRs.

#### 3.4. NOT

_{in1}of Figure 1. The Clk introduces an additional phase shift on the traveling beams, which changes the waveguide balance and results in an output. One beam is injected into P

_{in3}at an angle of 180° to perform the NOT operation. Due to the destructive interference that occurs as a result of the input beams’ various phase conditions, when P

_{in3}is set to ‘1’, P

_{out}produces a logical ‘0’ (i.e., T < T

_{th}). When P

_{in3}is ‘OFF’, the Clk (all ‘1’s) outputs a logical ‘1’ (i.e., T > T

_{th}) at P

_{out}, instead of going through a differencing phase. In this manner, the NOT gate is performed. Using a K-shaped silicon-on-silica waveguide, Figure 8 illustrates the NOT field intensity distributions at 1.55 μm.

#### 3.5. NOR

_{in2}and P

_{in3}to perform the NOR (NOT-OR) operation, and P

_{in1}is launched with Clk (all ‘1’s), as shown in Figure 1. When the input beams (01, 10, or 11) are combined and injected at different angles, destructive interference results in a logical ‘0’ at P

_{out}. If the launched beams’ combination is (00), the Clk beam with Φ

_{Clk}= 0° will cancel the phase balance of the three inputs, resulting in a logical ‘1’ at P

_{out}. Thus, the NOR logic operation is realized, as shown in Figure 9.

#### 3.6. NAND

_{in1}and the other two beams into P

_{in2}and P

_{in3}, respectively. When both P

_{in2}and P

_{in3}are ‘OFF’ (i.e., 00), the Clk with a Φ

_{Clk}= 0° cancels the phase balance of the three inputs, causing P

_{out}to become ‘1’. Constructive interference simply occurs when Clk and (01, 10) are launched at the same angle of 0°, yielding an output of ‘1’. A ‘0’ output is produced when (11) is launched with Clk at various phases, such as Φ

_{2}= 90°, Φ

_{3}= 180°, and Φ

_{Clk}= 0°, as illustrated in Figure 10.

#### 3.7. XNOR

_{in1}to create the XNOR (exclusive-XOR) logic function, while the other two beams are injected from P

_{in2}and P

_{in3}, respectively. Constructive interference causes P

_{out}to emit a ‘1’ when the combination of the input beams (11) is introduced with the Clk at the same phase of 0°. In contrast, P

_{out}produces a ‘0’ when the input beams’ combinations, (01) or (10), are inserted with a different phase, as depicted in Figure 11.

_{2}[M] [16], where M is the total number of signal levels, and B is the optical bandwidth, which is defined as $B=(c/{\lambda}^{2})\Delta \lambda $, where c is the speed of light in vacuum, λ = 1.55 μm is the optical carrier wavelength, and Δλ is the signal’s spectral width. Note log

_{2}[M] is in a binary form, i.e., log

_{2}[M] = log[M]/log[2]. This means that in our case, where B = 30 GHz and for four signal levels (00, 01, 10, and 11), the predicted speed is 120 Gb/s.

## 4. Conclusions

## Author Contributions

## Funding

## Data Availability Statement

## Acknowledgments

## Conflicts of Interest

## References

- Houbavlis, C.; Zoiros, K.E.; Kalyvas, M.; Theophilopoulos, G.; Bintjas, C.; Yiannopoulos, K.; Pleros, N.; Vlachos, K.; Avramopoulos, H.; Schares, L.; et al. All-optical signal processing and applications within the Esprit project DO ALL. J. Lightwave Technol.
**2005**, 23, 781–801. [Google Scholar] [CrossRef] - Clavero, R.; Mart´ınez, J.M.; Ramos, F.; Mart, J. All-optical packet routing scheme for optical label-swapping networks. Opt. Express
**2004**, 12, 4326–4332. [Google Scholar] [CrossRef] [PubMed] - Ji, W.; Zhang, M.; Ye, P. All-optical-packet header and payload separation for unslotted optical-packet-switched networks. J. Lightwave Technol.
**2007**, 25, 703–709. [Google Scholar] [CrossRef] - Ma, S.; Sun, H.; Chen, Z.; Dutta, N.K. High-speed all-optical PRBS generation based on quantum-dot semiconductor optical amplifiers. Opt. Express
**2009**, 17, 18469–18477. [Google Scholar] [CrossRef] - Singh, S.; Lovkesh; Ye, X.; Kaler, R.S. Design of ultrafast encryption and decryption circuits for secured optical networks. IEEE J. Quantum Electron.
**2012**, 48, 1547–1553. [Google Scholar] [CrossRef] - Aikawa, Y.; Shimizu, S.; Uenohara, H. Demonstration of all-optical divider circuit using SOA-MZI-type XOR gate and feedback loop for forward error detection. J. Lightwave Technol.
**2011**, 29, 2259–2266. [Google Scholar] [CrossRef] - Kim, S.H.; Kim, J.H.; Choi, J.W.; Son, C.W.; Byun, Y.T.; Jhon, Y.M.; Lee, S.; Woo, D.H.; Kim, S.H. All-optical half adder using cross gain modulation in semiconductor optical amplifiers. Opt. Express
**2006**, 14, 10693–10698. [Google Scholar] [CrossRef] - Gayen, D.K.; Bhattachryya, A.; Chattopadhyay, T.; Roy, J.N. Ultrafast all-optical half-adder using quantum-dot semiconductor optical amplifier-based Mach–Zehnder interferometer. J. Lightwave Technol.
**2012**, 30, 3387–3393. [Google Scholar] [CrossRef] - Berrettini, G.; Nguyen, A.T.; Lazzeri, E.; Meloni, G.; Scaffardi, M.; Pot, L.; Bogoni, A. All-optical digital circuits exploiting SOA-based loop memories. IEEE J. Sel. Top. Quantum Electron.
**2012**, 18, 847–858. [Google Scholar] [CrossRef] - Wang, Y.; Zhang, X.; Dong, J.; Huang, D. Simultaneous demonstration on all-optical digital encoder and comparator at 40 Gb/s with semiconductor optical amplifiers. Opt. Express
**2007**, 15, 15080–15085. [Google Scholar] [CrossRef] - Scaffardi, M.; Ghelfi, P.; Lazzeri, E.; Pot, L.; Bogoni, A. Photonic processing for digital comparison and full addition based on semiconductor optical amplifiers. IEEE J. Sel. Top. Quantum Electron.
**2008**, 14, 826–833. [Google Scholar] [CrossRef] - Zoiros, K.E.; Houbavlis, T.; Kalyvas, M. Ultra-high speed all-optical shift registers and their applications in OTDM networks. Opt. Quantum Electron.
**2004**, 36, 1005–1053. [Google Scholar] [CrossRef] - Kumar, S.; Willner, A.E. Simultaneous four-wave mixing and cross-gain modulation for implementing an all-optical XNOR logic gate using a single SOA. Opt. Express
**2006**, 14, 5092–5097. [Google Scholar] [CrossRef] [PubMed] - Jung, Y.J.; Son, C.W.; Jhon, Y.M.; Lee, S.; Park, N. One-level simplification method for all-optical combinational logic circuits. IEEE Photon. Technol. Lett.
**2008**, 20, 800–802. [Google Scholar] [CrossRef] - Mashanovich, G.Z.; Milošević, M.M.; Nedeljkovic, M.; Owens, N.; Xiong, B.; Teo, E.J.; Hu, Y. Low loss silicon waveguides for the mid-infrared. Opt. Express
**2011**, 19, 7112–7119. [Google Scholar] [CrossRef] [Green Version] - Yao, C.; Kotb, A.; Wang, B.; Singh, S.; Guo, C. All-optical logic gates using dielectric-loaded waveguides with quasi-rhombus metasurfaces. Opt. Lett.
**2020**, 45, 3769–3772. [Google Scholar] [CrossRef] - Yanga, W.; Shi, X.; Xing, H.; Chen, X. All-optical logic gates based on metallic waveguide arrays. Res. Phys.
**2018**, 11, 837–841. [Google Scholar] [CrossRef] - Abdulnabi, S.H.; Abbas, M.N. All-optical logic gates based on nanoring insulator–metal–insulator plasmonic waveguides at optical communications band. J. Nanophotonics
**2019**, 13, 016009. [Google Scholar] [CrossRef] [Green Version] - Al-Musawi, H.K.; Al-Janabi, A.K.; Al-Abassi, S.A.W.; Abusiba, N.A.A.; Al-Fatlawi, N.A.Q. Plasmonic logic gates based on dielectric-metal-dielectric design with two optical communication bands. Optik
**2020**, 223, 165416. [Google Scholar] [CrossRef] - Caballero, L.P.; Povinelli, M.L.; Ramirez, J.C.; Guimarães, P.S.S.; Neto, O.P.V. Photonic crystal integrated logic gates and circuits. Opt. Express
**2022**, 30, 1976. [Google Scholar] [CrossRef] - Asakawa, K.; Sugimoto, Y.; Nakamura, S. Silicon photonics for telecom and data-com applications. Opto-Electron. Adv.
**2020**, 3, 200011. [Google Scholar] [CrossRef] - Sun, C.; Yu, Y.; Zhang, X. Ultra-compact waveguide crossing for a mode-division multiplexing optical network. Opt. Lett.
**2017**, 42, 4913–4916. [Google Scholar] [CrossRef] [PubMed] - Green, W.M.J.; Rooks, M.J.; Sekaric, L.; Vlasov, Y.A. Ultra-compact, low RF power, 10 Gb/s silicon Mach-Zehnder modulator. Opt. Express
**2007**, 15, 17106–17113. [Google Scholar] [CrossRef] [PubMed] - Dimitropoulos, D.; Raghunathan, V.; Claps, R.; Jalali, B. Phase-matching and nonlinear optical processes in silicon waveguides. Opt. Express
**2004**, 12, 149–160. [Google Scholar] [CrossRef] [Green Version] - Kotb, A.; Guo, C. 100 Gb/s all-optical multifunctional AND, XOR, NOR, OR, XNOR, and NAND logic gates in a single compact scheme based on semiconductor optical amplifiers. Opt. Laser Technol.
**2021**, 137, 106828. [Google Scholar] [CrossRef] - Zoiros, K.E.; Papadopoulos; Houbavlis, T.; Kanellos, G.T. Theoretical analysis and performance investigation of ultrafast all-optical Boolean XOR gate with semiconductor optical amplifier-assisted Sagnac interferometer. Opt. Commun.
**2006**, 258, 114–134. [Google Scholar] [CrossRef] - Passaro, V.M.N.; Notte, M.L. Optimizing SOI slot waveguide fabrication tolerances and strip-slot coupling for very efficient optical sensing. Sensors
**2012**, 12, 2436–2455. [Google Scholar] [CrossRef] [Green Version] - Prinzen, A.; Waldow, M.; Kurz, H. Fabrication tolerances of SOI based directional couplers and ring resonators. Opt. Express
**2013**, 21, 17212–17220. [Google Scholar] [CrossRef] - Available online: https://www.edmundoptics.com/p/1550nm-0-250mw-fiber-coupled-laser/12219/ (accessed on 13 November 2022).
- Al-Hetara, A.M.; Shamsan, Z.A. Optical wavelength and dimensions tolerance criterion for multimode interference couplers. WSEAS Trans. Commun.
**2014**, 13, 567–571. [Google Scholar] - Kita, S.; Nozaki, K.; Takata, K.; Shinya, A.; Notomi, M. Ultrashort low-loss Ψ gates for linear optical logic on Si photonics platform. Commun. Phys.
**2020**, 3, 33. [Google Scholar] [CrossRef] [Green Version] - Donzella, V.; Sherwali, A.; Flueckiger, J.; Grist, S.M.; Fard, S.T.; Chrostowski, L. Design and fabrication of SOI micro-ring resonators based on sub-wavelength grating waveguides. Opt. Express
**2015**, 23, 4791–4803. [Google Scholar] [CrossRef] [PubMed] - Pan, D.; Wei, H.; Xu, H. Optical interferometric logic gates based on metal slot waveguide network realizing whole fundamental logic operations. Opt. Express
**2013**, 21, 9556. [Google Scholar] [CrossRef] [PubMed] [Green Version] - Gao, L.; Chen, L.; Wei, H.; Xu, H. Lithographically fabricated gold nanowire waveguides for plasmonic routers and logic gates. Nanoscale
**2018**, 10, 14771. [Google Scholar] [CrossRef] [PubMed] [Green Version] - Fu, Y.; Hu, X.; Lu, C.; Yue, S.; Yang, H.; Gong, Q. All-optical logic gates based on nanoscale plasmonic slot waveguides. Nano Lett.
**2012**, 12, 5784–5790. [Google Scholar] [CrossRef] [PubMed] - Hou, Z.; Sun, Y.; Li, Q.; Xudong, F.; Cheng, R. Smart bio-gel optofluidic Mach–Zehnder interferometers multiphoton-lithographically customized with chemo-mechanical-opto transduction and bio-triggered degradation. Lab Chip
**2020**, 20, 3815–3823. [Google Scholar] [CrossRef] - Liang, D.; Zhang, X.; Li, M.; Lin, Z.; Dai, H.; Wu, Z.; Pu, J. Visually Adjusting Coupling Conditions in Light-Emitting Micro-Components. IEEE Photon. Technol. Lett.
**2019**, 31, 1425–1428. [Google Scholar] [CrossRef] - Kowsari, A.; Saghaei, H. Resonantly enhanced all-optical switching in microfibre Mach–Zehnder interferometers. Electron. Lett.
**2018**, 54, 229–231. [Google Scholar] [CrossRef]

**Figure 1.**(

**a**) Schematic depiction and (

**b**) field-intensity distributions of K-shaped silicon-on-silica waveguide.

**Figure 2.**Normalized spectral transmission (T) and loss versus operating wavelength (λ), using K-shaped silicon-on-silica waveguide.

**Figure 4.**Normalized spectral transmission (T) versus angle between long and short slots (θ

_{1}), using K-shaped silicon-on-silica waveguide.

**Figure 5.**XOR field-intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (

**a**) ‘00’ input, (

**b**) ‘01’ input, (

**c**) ‘10’ input, and (

**d**) ‘11’ input.

**Figure 6.**AND field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (

**a**) ‘00’ input, (

**b**) ‘01’ input, (

**c**) ‘10’ input, and (

**d**) ‘11’ input.

**Figure 7.**OR field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (

**a**) ‘00’ input, (

**b**) ‘01’ input, (

**c**) ‘10’ input, and (

**d**) ‘11’ input.

**Figure 8.**NOT field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (

**a**) ‘1’ input and (

**b**) ‘0’ input.

**Figure 9.**NOR field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (

**a**) ‘00’ input, (

**b**) ‘01’ input, (

**c**) ‘10’ input, and (

**d**) ‘11’ input.

**Figure 10.**NAND field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (

**a**) ‘00’ input, (

**b**) ‘01’ input, (

**c**) ‘10’ input, and (

**d**) ‘11’ input.

**Figure 11.**XNOR field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (

**a**) ‘00’ input, (

**b**) ‘01’ input, (

**c**) ‘10’ input, and (

**d**) ‘11’ input.

Symbol | Definition | Value | Unit |
---|---|---|---|

L_{1} | Length of long slot | 2.5 | μm |

L_{2} | Length of short slot | 1.0 | μm |

W | Width of slot | 0.22 | μm |

D | Thickness of slot | 0.3 | μm |

θ_{1} | Angle between long and short slots | 50 | degree |

θ_{2} | Angle between short slots | 80 | degree |

n_{silicon} | Silicon refractive index at 1.55 μm | 3.48 | - |

n_{silica} | Silica refractive index at 1.55 μm | 1.444 | - |

λ | Operating wavelength | 1.55 | μm |

T_{th} | Threshold transmission | 0.12 | - |

P_{in1} | P_{in3} | P_{in2} (REF) | T | P_{out} | CR (dB) |
---|---|---|---|---|---|

0 | 0 | 1 | 0.021 | 0 | 34 |

0 | 1 | 1 | 0.464 | 1 | |

1 | 0 | 1 | 0.852 | 1 | |

1 | 1 | 1 | 0.023 | 0 |

P_{in1} | P_{in3} | P_{in2} (REF) | T | P_{out} | CR (dB) |
---|---|---|---|---|---|

0 | 0 | 1 | 0.021 | 0 | 31 |

0 | 1 | 1 | 0.022 | 0 | |

1 | 0 | 1 | 0.023 | 0 | |

1 | 1 | 1 | 0.521 | 1 |

P_{in1} | P_{in3} | P_{in2} (REF) | T | P_{out} | CR (dB) |
---|---|---|---|---|---|

0 | 0 | 1 | 0.021 | 0 | 33.73 |

0 | 1 | 1 | 0.464 | 1 | |

1 | 0 | 1 | 0.852 | 1 | |

1 | 1 | 1 | 0.521 | 1 |

Operation | CR (dB) with REF | CR (dB) without REF |
---|---|---|

XOR | 34 | 7.1 |

AND | 31 | 6.4 |

OR | 33.73 | 7 |

P_{in1} (Clk) | P_{in3} | T | P_{out} | CR (dB) |
---|---|---|---|---|

1 | 1 | 0.032 | 0 | 30.5 |

1 | 0 | 0.675 | 1 |

P_{in1} (Clk) | P_{in2} | P_{in3} | T | P_{out} | CR (dB) |
---|---|---|---|---|---|

1 | 0 | 0 | 0.675 | 1 | 33 |

1 | 0 | 1 | 0.032 | 0 | |

1 | 1 | 0 | 0.022 | 0 | |

1 | 1 | 1 | 0.022 | 0 |

P_{in1} (Clk) | P_{in2} | P_{in3} | T | P_{out} | CR (dB) |
---|---|---|---|---|---|

1 | 0 | 0 | 0.675 | 1 | 34 |

1 | 0 | 1 | 0.464 | 1 | |

1 | 1 | 0 | 0.852 | 1 | |

1 | 1 | 1 | 0.022 | 0 |

P_{in1} (Clk) | P_{in2} | P_{in3} | T | P_{out} | CR (dB) |
---|---|---|---|---|---|

1 | 0 | 0 | 0.675 | 1 | 31 |

1 | 0 | 1 | 0.032 | 0 | |

1 | 1 | 0 | 0.022 | 0 | |

1 | 1 | 1 | 0.521 | 1 |

**Table 10.**At various wavelengths, a comparison of our design and other waveguide-based logic function designs.

Operations | Design | Wavelength (nm) | CR (dB) | Ref. |
---|---|---|---|---|

XOR, AND, OR, NOR, NAND, XNOR | Dielectric-loaded waveguides | 471 | 24.41–33.39 | [16] |

OR, NOT, AND, XOR | Metallic waveguide arrays | 632.8 | 9.3–20 | [17] |

NOT, XOR, AND, OR, NOR, NAND, XNOR | Nanoring insulator–metal–insulator waveguides | 1550 | −1.1–18.75 | [18] |

NOT, XOR, AND, OR, NOR, NAND, XNOR | Dielectric–metal–dielectric design | 900 and 1330 | 5.37–22 | [19] |

AND, OR, NAND, NOR, XOR, Fan-Out, Half adder, Full adder | Photonic crystal circiuts | 1550 | 5.54–11.56 | [20] |

XOR, AND, OR, NOT, NOR, XNOR, NAND | K-shaped silicon waveguides | 1550 | 30.5–34 | This work |

Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. |

© 2022 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).

## Share and Cite

**MDPI and ACS Style**

Kotb, A.; Zoiros, K.E.
K-Shaped Silicon Waveguides for Logic Operations at 1.55 μm. *Electronics* **2022**, *11*, 3748.
https://doi.org/10.3390/electronics11223748

**AMA Style**

Kotb A, Zoiros KE.
K-Shaped Silicon Waveguides for Logic Operations at 1.55 μm. *Electronics*. 2022; 11(22):3748.
https://doi.org/10.3390/electronics11223748

**Chicago/Turabian Style**

Kotb, Amer, and Kyriakos E. Zoiros.
2022. "K-Shaped Silicon Waveguides for Logic Operations at 1.55 μm" *Electronics* 11, no. 22: 3748.
https://doi.org/10.3390/electronics11223748