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Article

K-Shaped Silicon Waveguides for Logic Operations at 1.55 μm

by 1,2,* and 3
1
GPL, State Key Laboratory of Applied Optics, Changchun Institute of Optics, Fine Mechanics, and Physics, Chinese Academy of Sciences, Changchun 130033, China
2
Department of Physics, Faculty of Science, University of Fayoum, Fayoum 63514, Egypt
3
Lightwave Communications Research Group, Department of Electrical and Computer Engineering, School of Engineering, Democritus University of Thrace, 67100 Xanthi, Greece
*
Author to whom correspondence should be addressed.
Electronics 2022, 11(22), 3748; https://doi.org/10.3390/electronics11223748
Received: 24 October 2022 / Revised: 14 November 2022 / Accepted: 14 November 2022 / Published: 15 November 2022
(This article belongs to the Special Issue Quantum and Optoelectronic Devices, Circuits and Systems)

Abstract

:
Silicon has properties that make it the preferable semiconductor material for realizing a wide suite of electronic devices. In this paper, all basic optical logic operations, including XOR, AND, OR, NOT, NOR, XNOR, and NAND, are demonstrated by means of simulation using K-shaped compact silicon waveguides operated at the 1.55 μm telecommunications wavelength. This waveguide comprises three waveguide strips, all made of silicon printed on silica. By adjusting the phase of the incident beams, the pursued logic operations can be realized. To evaluate how well the considered operations are performed, the contrast ratio (CR) is employed as a figure of merit. Compared to other reported waveguides, the suggested K-shaped waveguide achieves higher CRs and a speed of the order of 120 Gb/s.

1. Introduction

By enabling the execution of signal-processing functionalities without troublesome optoelectronic conversions at the photonic nodes, all-optical gates serve as essential building blocks for the construction of lightwave broadband communications networks [1]. The accomplishment of the many signal processing tasks entirely in the optical domain, such as packet processing [2,3], pseudorandom binary sequence generation [1,4], encryption/decryption [5], error detection and correction [6], arithmetic operations [7,8], construction of optical memory elements [9], digital comparison [10,11], buffering [12], implementation of any other Boolean function [13], and construction of combinational logic circuits [14], is made possible by the XOR, AND, OR, NOT, NOR, NAND, and XNOR logic operations. On the other hand, the development of effective and low-loss platforms at a reasonable cost is claimed by silicon photonics. A type of structure known as silicon-on-silica technology is created by depositing a thin layer of crystalline silicon on an insulating layer, which is silica (silicon dioxide). Due to the significant infrared transparency of silicon and refractive index difference between silicon (i.e., core with nsilicon ≈ 3.48 at 1.55 μm) and silica (i.e., cladding with nsilica ≈ 1.444 at 1.55 μm), silicon-on-silica optical waveguides have unique optical features [15]. Various optical waveguides have been recently used for implementing both all-optical logic gates and all-optical networks [16,17,18,19,20,21,22,23]. Therefore, in this paper, we simulate seven basic logic operations, including XOR, AND, OR, NOT, NOR, NAND, and XNOR, using K-shaped waveguides operated at the telecommunications wavelength of 1.55 μm. This waveguide has four terminals, each of which has an output port and three input ports composed of silicon patterned on silica. It is generally known that silicon has a relatively low optical loss (2 dB/cm) for wavelengths up to 8 μm, but silica’s optical loss increases rapidly beyond 3.6 μm [15]. The interferences, both constructive and destructive, which are created by the phase difference between the input beams, are the key for the realization of the considered logic operations. In order to demonstrate how the logic operations are executed, finite-difference time-domain (FDTD) solutions are obtained, using commercially available software, with the convolutional optimally matched layer as an absorbing boundary condition. The logic operations’ performance is assessed against the contrast ratio (CR) metric. According to the derived simulation results, the employed waveguide can achieve higher CRs at an extended data rate of 120 Gb/s and, hence, can outperform previously reported designs [16,17,18,19,20].

2. K-Shaped Waveguide

In this work, we build a K-shaped waveguide with four terminals made of three silicon slots patterned on a silica substrate. The three input ports are excited by an electromagnetic wave that is polarized in the transverse magnetic mode at 1.55 μm. The wavelength and intensity of the incident beams are identical. The K-shaped silicon-on-silica waveguide is depicted schematically in Figure 1, along with its field intensity distributions.
To record the simulation outcomes, the FDTD monitors are employed. Setting the threshold transmission (Tth) value to 0.12 is necessary at first. The formula for the output transmission (T) is T = I o u t / I i n [16], where I o u t = | E o u t | 2 is the intensity at Pout, and Iin = I1 + I2 + I3 is the sum of the intensities at the three input ports. The input beams must satisfy the requirements for phase-matching in order to maximize T. In essence, this implies ensuring sure that the interacting waves are kept in the proper relative phase throughout the direction of propagation. However, before high CR logic gates can be accomplished, the phase-matching condition necessitates a specific selection of the input wavelength and waveguide characteristics. The phase-matching in silicon waveguides is induced by the contributions of the waveguide birefringence, material dispersion, waveguide dispersion, and cross- and phase-self modulations [24]. It is, therefore, feasible to achieve phase-matching by designing the waveguide such that the birefringence and material dispersion terms cancel one another, according to the phase-matching analysis of silicon waveguides, as reported in [24]. When T > Tth, Pout generates a logical output of ‘1’, while in all other cases, it generates a ‘0’. The CR is an important metric for logic devices and is defined as C R ( d B ) = 10   l n [ P m e a n 1 / P m e a n 0 ] [25], where P m e a n 1 and P m e a n 0 represent the mean peak powers of output logic bits ‘1’ and ‘0’, respectively. Compared to other metrics, such as the extinction ratio, the CR offers a better and more accurate evaluation of the performance of the optical logic operations [26]. For the proposed waveguide, Table 1 lists the default parameters’ values used in the simulation.
When all incident beams (i.e., two beams and a reference or clock light) are launched at the three input ports with the same phase of 180°, the normalized spectral transmission (T) and loss as a function of the operating wavelength (λ) are shown in Figure 2. The employed waveguide achieves a high T = 0.852 and a low loss = 0.69 dB/μm at 1.55 μm. Such small propagation losses are a direct result of the scattering at the inner slots’ interfaces and absorption within the materials. Figure 2 also shows that this waveguide achieves a high T and a low loss at a wide range of telecommunication wavelengths, from 1.3–1.6 μm.
Relaxed tolerances are crucial for both manufacturing and operating conditions. Manufacturing tolerances refer to the management of the geometrical dimensions during processing and their ensuing effect on device performance. Operation tolerances describe how the device responds to variations in wavelength, polarization, temperature, input field distribution, and refractive index [27,28]. Most laser sources have a significant practical wavelength tolerance. For example, a 1550 nm fiber laser may have a wavelength tolerance of ±20 nm, resulting in an actual wavelength of 1550 ± 20 nm [29]. Figure 3 shows the dependence of the loss on the wavelength tolerance using the proposed waveguide. This result has been taken based on Equations (4)–(7) from Ref. [30].
In this waveguide, we have used three acute angles, with a sum that is 180°, to perform the K letter. These angles (i.e., θ1 and θ2) play an important role in the K-shaped design in order to implement the considered logic gates with high CRs. Thus, the effect of the angle between the long and short slots (θ1) on a normalized spectral transmission (T) at an operating wavelength of 1550 nm is simulated, as shown in Figure 4. It is clear from Figure 4 that the highest T occurred at θ1 = 50° (i.e., θ2 = 80°), as optimized in this simulation.

3. Logic Operations

3.1. XOR

To carry out the XOR, AND, and OR logic operations, a reference beam (REF) must be injected into Pin2 of Figure 1, while the other two beams are launched into Pin1 and Pin3. The REF (all ‘1’s) is used to introduce a reference phase difference between the input signals, resulting in either constructive or destructive interference. Constructive interference happens when all input beams are injected at the same phase (resulting in an output of ‘1’); destructive interference happens when they are launched at different phases (resulting in an output of ‘0’). As a result, for an XOR operation, Pout produces a ‘1’ (meaning T > Tth) because of the constructive interference that occurs between the input beams when the combination of these input beams (01, 10) is injected along with the REF at the same phase (i.e., Φ1 = Φ3 = ΦREF = 180°). The destructive interference between the incident beams causes a ‘0’ output to be produced at Pout (meaning T < Tth) when the combination (11), with the REF at different phases (i.e., Φ1 = 0°, Φ3 = 90°, and ΦREF = 180°), is launched. This results in the XOR logic function. We notice the presence of light at ports having ‘0’ input, which is a natural result because the inner interfaces of the three input ports of the K-shaped waveguide are all opposite, and, therefore, the light is deflected inside them in an outward direction. The XOR field intensity distributions are displayed in Figure 5, using a K-shaped silicon-on-silica waveguide at 1.55 μm.
Due to the large difference between the mean peak powers of ‘1’ and ‘0’, the suggested waveguide achieves a high CR = 34 dB. The XOR simulation outcomes, employing the K-shaped silicon-on-silica waveguide at 1.55 μm, are shown in Table 2.

3.2. AND

Similar to the XOR operation, the AND operation involves injecting two beams into Pin1 and Pin3 as well as launching the REF (all ‘1’s) from Pin2. Pout creates a ‘1’ output, due to constructive interference, when all incident beams are released into the proposed waveguide at the same phase (i.e., Φ1 = Φ3 = ΦREF = 180°). In contrast, when these incident beams are injected at a different phase, Pout outputs a ‘0’ because of destructive interference. This results in the AND operation. In Figure 6, the AND field intensity distributions are shown, using a K-shaped silicon-on-silica waveguide at 1.55 μm.
For the logic AND operation, the proposed waveguide achieves CR = 31 dB at 1.55 μm. The further results of the AND simulation are listed in Table 3.

3.3. OR

When the combination of input beams (01, 10, or 11) is inserted with REF at the same phase of 180°, the result of the Pout becomes a ‘1’. Thus, the OR logic function between the two input beams is realized. Figure 7 depicts the OR field intensity distributions, using the proposed waveguide at 1.55 μm.
The suggested waveguide obtains a high CR = 33.73 dB due to the significant difference between the mean peak powers of ‘1’ and ‘0’. Table 4 provides an overview of the outcomes of the OR simulation at 1.55 μm, in terms of T and CR.
The REF is essential for realizing the XOR, AND, and OR operations. Therefore, using the suggested waveguide at 1.55 μm, we have compared the performance of these three operations in terms of CR in the presence of the REF beam (i.e., REF = ‘1’) and the absence of it, meaning there is no input beam injected into Pin2. Table 5 indicates the necessity of using the REF to obtain higher CRs.

3.4. NOT

To carry out all inverted logic operations, including NOT, NOR, NAND, and XNOR, a clock light (Clk) with an angle of 0° must be sent into the proposed waveguide from Pin1 of Figure 1. The Clk introduces an additional phase shift on the traveling beams, which changes the waveguide balance and results in an output. One beam is injected into Pin3 at an angle of 180° to perform the NOT operation. Due to the destructive interference that occurs as a result of the input beams’ various phase conditions, when Pin3 is set to ‘1’, Pout produces a logical ‘0’ (i.e., T < Tth). When Pin3 is ‘OFF’, the Clk (all ‘1’s) outputs a logical ‘1’ (i.e., T > Tth) at Pout, instead of going through a differencing phase. In this manner, the NOT gate is performed. Using a K-shaped silicon-on-silica waveguide, Figure 8 illustrates the NOT field intensity distributions at 1.55 μm.
The suggested waveguide results in a high CR = 30.5 dB for NOT operation. Table 6 provides a summary of the outcomes of the NOT simulation, using the proposed waveguide at 1.55 μm.

3.5. NOR

Two beams are launched into Pin2 and Pin3 to perform the NOR (NOT-OR) operation, and Pin1 is launched with Clk (all ‘1’s), as shown in Figure 1. When the input beams (01, 10, or 11) are combined and injected at different angles, destructive interference results in a logical ‘0’ at Pout. If the launched beams’ combination is (00), the Clk beam with ΦClk = 0° will cancel the phase balance of the three inputs, resulting in a logical ‘1’ at Pout. Thus, the NOR logic operation is realized, as shown in Figure 9.
The suggested waveguide achieves a high CR = 33 dB for the NOR operation, as a result of the large disparity between P m e a n 1   and P m e a n 0 . A summary of the simulation outcomes for this logic operation is given in Table 7.

3.6. NAND

The NAND (NOT-AND) can be produced by injecting the Clk into Pin1 and the other two beams into Pin2 and Pin3, respectively. When both Pin2 and Pin3 are ‘OFF’ (i.e., 00), the Clk with a ΦClk = 0° cancels the phase balance of the three inputs, causing Pout to become ‘1’. Constructive interference simply occurs when Clk and (01, 10) are launched at the same angle of 0°, yielding an output of ‘1’. A ‘0’ output is produced when (11) is launched with Clk at various phases, such as Φ2 = 90°, Φ3 = 180°, and ΦClk = 0°, as illustrated in Figure 10.
A summary of the NAND simulation outcomes utilizing the suggested waveguide, which achieves a high CR = 34 dB at 1.55 μm, is shown in Table 8.

3.7. XNOR

Similar to the NOR and NAND operations, the Clk enters Pin1 to create the XNOR (exclusive-XOR) logic function, while the other two beams are injected from Pin2 and Pin3, respectively. Constructive interference causes Pout to emit a ‘1’ when the combination of the input beams (11) is introduced with the Clk at the same phase of 0°. In contrast, Pout produces a ‘0’ when the input beams’ combinations, (01) or (10), are inserted with a different phase, as depicted in Figure 11.
Table 9 summarizes the XNOR simulation outcomes with a high CR = 31 dB, using the suggested waveguide.
The Nyquist formula gives the speed of a transmission system as 2B log2[M] [16], where M is the total number of signal levels, and B is the optical bandwidth, which is defined as B = ( c / λ 2 ) Δ λ , where c is the speed of light in vacuum, λ = 1.55 μm is the optical carrier wavelength, and Δλ is the signal’s spectral width. Note log2[M] is in a binary form, i.e., log2[M] = log[M]/log[2]. This means that in our case, where B = 30 GHz and for four signal levels (00, 01, 10, and 11), the predicted speed is 120 Gb/s.
Silicon and silica components are readily available, making it easier and more affordable to build the suggested waveguide. As a result, assuming that the necessary technology is available and that the major outcomes of this simulation are valid, the experimental verification of the suggested waveguide may be completed. This is a technology problem that can be resolved in practice, so it is not a crucial obstacle. Several logic operations, on the other hand, have been experimentally implemented based on various optical waveguides and components [31,32,33,34,35,36,37,38].
Table 10 compares the functionality of the considered waveguide, for realizing the intended logic operations at various wavelengths, to that of several waveguides reported on the same topic. This table suggests that the proposed waveguide can achieve faster logic operations with higher CRs than the other listed schemes.

4. Conclusions

Using K-shaped silicon-on-silica waveguides, seven fundamental logic operations, including XOR, AND, OR, NOT, NOR, NAND, and XNOR, were simulated at the 1.55 μm telecommunications wavelength. These operations were simulated by means of FDTD solutions obtained in commercially available software. The correct execution of these logic operations relies on the constructive and destructive interferences that are caused by the suitable phase difference of the launched optical input beams. Compared to other waveguides reported for the same purpose, the suggested K-shaped waveguide achieves logic operations with a higher contrast ratio and operating speed.

Author Contributions

Conceptualization, A.K.; data curation, A.K.; formal analysis, A.K.; funding acquisition, A.K.; investigation, A.K.; methodology, A.K.; project administration, A.K.; resources, A.K.; software, A.K.; supervision, K.E.Z.; writing—original draft, A.K.; writing—review and editing, K.E.Z. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Data Availability Statement

Not applicable.

Acknowledgments

A.K. thanks the Chinese Academy of Sciences President’s International Fellowship Initiative (Grant No. 2022VMB0013) for the support of this work.

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. Houbavlis, C.; Zoiros, K.E.; Kalyvas, M.; Theophilopoulos, G.; Bintjas, C.; Yiannopoulos, K.; Pleros, N.; Vlachos, K.; Avramopoulos, H.; Schares, L.; et al. All-optical signal processing and applications within the Esprit project DO ALL. J. Lightwave Technol. 2005, 23, 781–801. [Google Scholar] [CrossRef]
  2. Clavero, R.; Mart´ınez, J.M.; Ramos, F.; Mart, J. All-optical packet routing scheme for optical label-swapping networks. Opt. Express 2004, 12, 4326–4332. [Google Scholar] [CrossRef] [PubMed]
  3. Ji, W.; Zhang, M.; Ye, P. All-optical-packet header and payload separation for unslotted optical-packet-switched networks. J. Lightwave Technol. 2007, 25, 703–709. [Google Scholar] [CrossRef]
  4. Ma, S.; Sun, H.; Chen, Z.; Dutta, N.K. High-speed all-optical PRBS generation based on quantum-dot semiconductor optical amplifiers. Opt. Express 2009, 17, 18469–18477. [Google Scholar] [CrossRef]
  5. Singh, S.; Lovkesh; Ye, X.; Kaler, R.S. Design of ultrafast encryption and decryption circuits for secured optical networks. IEEE J. Quantum Electron. 2012, 48, 1547–1553. [Google Scholar] [CrossRef]
  6. Aikawa, Y.; Shimizu, S.; Uenohara, H. Demonstration of all-optical divider circuit using SOA-MZI-type XOR gate and feedback loop for forward error detection. J. Lightwave Technol. 2011, 29, 2259–2266. [Google Scholar] [CrossRef]
  7. Kim, S.H.; Kim, J.H.; Choi, J.W.; Son, C.W.; Byun, Y.T.; Jhon, Y.M.; Lee, S.; Woo, D.H.; Kim, S.H. All-optical half adder using cross gain modulation in semiconductor optical amplifiers. Opt. Express 2006, 14, 10693–10698. [Google Scholar] [CrossRef]
  8. Gayen, D.K.; Bhattachryya, A.; Chattopadhyay, T.; Roy, J.N. Ultrafast all-optical half-adder using quantum-dot semiconductor optical amplifier-based Mach–Zehnder interferometer. J. Lightwave Technol. 2012, 30, 3387–3393. [Google Scholar] [CrossRef]
  9. Berrettini, G.; Nguyen, A.T.; Lazzeri, E.; Meloni, G.; Scaffardi, M.; Pot, L.; Bogoni, A. All-optical digital circuits exploiting SOA-based loop memories. IEEE J. Sel. Top. Quantum Electron. 2012, 18, 847–858. [Google Scholar] [CrossRef]
  10. Wang, Y.; Zhang, X.; Dong, J.; Huang, D. Simultaneous demonstration on all-optical digital encoder and comparator at 40 Gb/s with semiconductor optical amplifiers. Opt. Express 2007, 15, 15080–15085. [Google Scholar] [CrossRef]
  11. Scaffardi, M.; Ghelfi, P.; Lazzeri, E.; Pot, L.; Bogoni, A. Photonic processing for digital comparison and full addition based on semiconductor optical amplifiers. IEEE J. Sel. Top. Quantum Electron. 2008, 14, 826–833. [Google Scholar] [CrossRef]
  12. Zoiros, K.E.; Houbavlis, T.; Kalyvas, M. Ultra-high speed all-optical shift registers and their applications in OTDM networks. Opt. Quantum Electron. 2004, 36, 1005–1053. [Google Scholar] [CrossRef]
  13. Kumar, S.; Willner, A.E. Simultaneous four-wave mixing and cross-gain modulation for implementing an all-optical XNOR logic gate using a single SOA. Opt. Express 2006, 14, 5092–5097. [Google Scholar] [CrossRef] [PubMed]
  14. Jung, Y.J.; Son, C.W.; Jhon, Y.M.; Lee, S.; Park, N. One-level simplification method for all-optical combinational logic circuits. IEEE Photon. Technol. Lett. 2008, 20, 800–802. [Google Scholar] [CrossRef]
  15. Mashanovich, G.Z.; Milošević, M.M.; Nedeljkovic, M.; Owens, N.; Xiong, B.; Teo, E.J.; Hu, Y. Low loss silicon waveguides for the mid-infrared. Opt. Express 2011, 19, 7112–7119. [Google Scholar] [CrossRef]
  16. Yao, C.; Kotb, A.; Wang, B.; Singh, S.; Guo, C. All-optical logic gates using dielectric-loaded waveguides with quasi-rhombus metasurfaces. Opt. Lett. 2020, 45, 3769–3772. [Google Scholar] [CrossRef]
  17. Yanga, W.; Shi, X.; Xing, H.; Chen, X. All-optical logic gates based on metallic waveguide arrays. Res. Phys. 2018, 11, 837–841. [Google Scholar] [CrossRef]
  18. Abdulnabi, S.H.; Abbas, M.N. All-optical logic gates based on nanoring insulator–metal–insulator plasmonic waveguides at optical communications band. J. Nanophotonics 2019, 13, 016009. [Google Scholar] [CrossRef]
  19. Al-Musawi, H.K.; Al-Janabi, A.K.; Al-Abassi, S.A.W.; Abusiba, N.A.A.; Al-Fatlawi, N.A.Q. Plasmonic logic gates based on dielectric-metal-dielectric design with two optical communication bands. Optik 2020, 223, 165416. [Google Scholar] [CrossRef]
  20. Caballero, L.P.; Povinelli, M.L.; Ramirez, J.C.; Guimarães, P.S.S.; Neto, O.P.V. Photonic crystal integrated logic gates and circuits. Opt. Express 2022, 30, 1976. [Google Scholar] [CrossRef]
  21. Asakawa, K.; Sugimoto, Y.; Nakamura, S. Silicon photonics for telecom and data-com applications. Opto-Electron. Adv. 2020, 3, 200011. [Google Scholar] [CrossRef]
  22. Sun, C.; Yu, Y.; Zhang, X. Ultra-compact waveguide crossing for a mode-division multiplexing optical network. Opt. Lett. 2017, 42, 4913–4916. [Google Scholar] [CrossRef] [PubMed]
  23. Green, W.M.J.; Rooks, M.J.; Sekaric, L.; Vlasov, Y.A. Ultra-compact, low RF power, 10 Gb/s silicon Mach-Zehnder modulator. Opt. Express 2007, 15, 17106–17113. [Google Scholar] [CrossRef] [PubMed]
  24. Dimitropoulos, D.; Raghunathan, V.; Claps, R.; Jalali, B. Phase-matching and nonlinear optical processes in silicon waveguides. Opt. Express 2004, 12, 149–160. [Google Scholar] [CrossRef]
  25. Kotb, A.; Guo, C. 100 Gb/s all-optical multifunctional AND, XOR, NOR, OR, XNOR, and NAND logic gates in a single compact scheme based on semiconductor optical amplifiers. Opt. Laser Technol. 2021, 137, 106828. [Google Scholar] [CrossRef]
  26. Zoiros, K.E.; Papadopoulos; Houbavlis, T.; Kanellos, G.T. Theoretical analysis and performance investigation of ultrafast all-optical Boolean XOR gate with semiconductor optical amplifier-assisted Sagnac interferometer. Opt. Commun. 2006, 258, 114–134. [Google Scholar] [CrossRef]
  27. Passaro, V.M.N.; Notte, M.L. Optimizing SOI slot waveguide fabrication tolerances and strip-slot coupling for very efficient optical sensing. Sensors 2012, 12, 2436–2455. [Google Scholar] [CrossRef]
  28. Prinzen, A.; Waldow, M.; Kurz, H. Fabrication tolerances of SOI based directional couplers and ring resonators. Opt. Express 2013, 21, 17212–17220. [Google Scholar] [CrossRef]
  29. Available online: https://www.edmundoptics.com/p/1550nm-0-250mw-fiber-coupled-laser/12219/ (accessed on 13 November 2022).
  30. Al-Hetara, A.M.; Shamsan, Z.A. Optical wavelength and dimensions tolerance criterion for multimode interference couplers. WSEAS Trans. Commun. 2014, 13, 567–571. [Google Scholar]
  31. Kita, S.; Nozaki, K.; Takata, K.; Shinya, A.; Notomi, M. Ultrashort low-loss Ψ gates for linear optical logic on Si photonics platform. Commun. Phys. 2020, 3, 33. [Google Scholar] [CrossRef]
  32. Donzella, V.; Sherwali, A.; Flueckiger, J.; Grist, S.M.; Fard, S.T.; Chrostowski, L. Design and fabrication of SOI micro-ring resonators based on sub-wavelength grating waveguides. Opt. Express 2015, 23, 4791–4803. [Google Scholar] [CrossRef] [PubMed]
  33. Pan, D.; Wei, H.; Xu, H. Optical interferometric logic gates based on metal slot waveguide network realizing whole fundamental logic operations. Opt. Express 2013, 21, 9556. [Google Scholar] [CrossRef] [PubMed]
  34. Gao, L.; Chen, L.; Wei, H.; Xu, H. Lithographically fabricated gold nanowire waveguides for plasmonic routers and logic gates. Nanoscale 2018, 10, 14771. [Google Scholar] [CrossRef] [PubMed]
  35. Fu, Y.; Hu, X.; Lu, C.; Yue, S.; Yang, H.; Gong, Q. All-optical logic gates based on nanoscale plasmonic slot waveguides. Nano Lett. 2012, 12, 5784–5790. [Google Scholar] [CrossRef] [PubMed]
  36. Hou, Z.; Sun, Y.; Li, Q.; Xudong, F.; Cheng, R. Smart bio-gel optofluidic Mach–Zehnder interferometers multiphoton-lithographically customized with chemo-mechanical-opto transduction and bio-triggered degradation. Lab Chip 2020, 20, 3815–3823. [Google Scholar] [CrossRef]
  37. Liang, D.; Zhang, X.; Li, M.; Lin, Z.; Dai, H.; Wu, Z.; Pu, J. Visually Adjusting Coupling Conditions in Light-Emitting Micro-Components. IEEE Photon. Technol. Lett. 2019, 31, 1425–1428. [Google Scholar] [CrossRef]
  38. Kowsari, A.; Saghaei, H. Resonantly enhanced all-optical switching in microfibre Mach–Zehnder interferometers. Electron. Lett. 2018, 54, 229–231. [Google Scholar] [CrossRef]
Figure 1. (a) Schematic depiction and (b) field-intensity distributions of K-shaped silicon-on-silica waveguide.
Figure 1. (a) Schematic depiction and (b) field-intensity distributions of K-shaped silicon-on-silica waveguide.
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Figure 2. Normalized spectral transmission (T) and loss versus operating wavelength (λ), using K-shaped silicon-on-silica waveguide.
Figure 2. Normalized spectral transmission (T) and loss versus operating wavelength (λ), using K-shaped silicon-on-silica waveguide.
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Figure 3. Optical loss versus wavelength tolerance, using K-shaped silicon-on-silica waveguide.
Figure 3. Optical loss versus wavelength tolerance, using K-shaped silicon-on-silica waveguide.
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Figure 4. Normalized spectral transmission (T) versus angle between long and short slots (θ1), using K-shaped silicon-on-silica waveguide.
Figure 4. Normalized spectral transmission (T) versus angle between long and short slots (θ1), using K-shaped silicon-on-silica waveguide.
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Figure 5. XOR field-intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
Figure 5. XOR field-intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
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Figure 6. AND field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
Figure 6. AND field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
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Figure 7. OR field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
Figure 7. OR field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
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Figure 8. NOT field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘1’ input and (b) ‘0’ input.
Figure 8. NOT field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘1’ input and (b) ‘0’ input.
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Figure 9. NOR field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
Figure 9. NOR field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
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Figure 10. NAND field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
Figure 10. NAND field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
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Figure 11. XNOR field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
Figure 11. XNOR field intensity distributions, using K-shaped silicon-on-silica waveguide at 1.55 μm: (a) ‘00’ input, (b) ‘01’ input, (c) ‘10’ input, and (d) ‘11’ input.
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Table 1. Simulation parameters.
Table 1. Simulation parameters.
SymbolDefinitionValueUnit
L1Length of long slot2.5μm
L2Length of short slot1.0μm
WWidth of slot0.22μm
DThickness of slot0.3μm
θ1Angle between long and short slots50degree
θ2Angle between short slots80degree
nsiliconSilicon refractive index at 1.55 μm 3.48-
nsilicaSilica refractive index at 1.55 μm1.444-
λOperating wavelength1.55μm
TthThreshold transmission0.12-
Table 2. XOR simulation outcomes (Tth = 0.12).
Table 2. XOR simulation outcomes (Tth = 0.12).
Pin1 Pin3Pin2 (REF)TPout CR (dB)
0010.021034
0110.4641
1010.8521
1110.0230
Table 3. AND simulation outcomes (Tth = 0.12).
Table 3. AND simulation outcomes (Tth = 0.12).
Pin1Pin3Pin2 (REF)TPoutCR (dB)
0010.021031
0110.0220
1010.0230
1110.5211
Table 4. OR simulation outcomes (Tth = 0.12).
Table 4. OR simulation outcomes (Tth = 0.12).
Pin1Pin3Pin2 (REF)TPout CR (dB)
0010.021033.73
0110.4641
1010.8521
1110.5211
Table 5. CR with and without REF.
Table 5. CR with and without REF.
OperationCR (dB)
with REF
CR (dB)
without REF
XOR347.1
AND316.4
OR33.737
Table 6. NOT simulation outcomes (Tth = 0.12).
Table 6. NOT simulation outcomes (Tth = 0.12).
Pin1 (Clk)Pin3TPoutCR (dB)
110.032030.5
100.6751
Table 7. NOR simulation outcomes (Tth = 0.12).
Table 7. NOR simulation outcomes (Tth = 0.12).
Pin1 (Clk)Pin2Pin3TPout CR (dB)
1000.675133
1010.0320
1100.0220
1110.0220
Table 8. NAND simulation outcomes (Tth = 0.12).
Table 8. NAND simulation outcomes (Tth = 0.12).
Pin1 (Clk)Pin2Pin3TPout CR (dB)
1000.675134
1010.4641
1100.8521
1110.0220
Table 9. XNOR simulation outcomes (Tth = 0.12).
Table 9. XNOR simulation outcomes (Tth = 0.12).
Pin1 (Clk)Pin2Pin3TPout CR (dB)
1000.675131
1010.0320
1100.0220
1110.5211
Table 10. At various wavelengths, a comparison of our design and other waveguide-based logic function designs.
Table 10. At various wavelengths, a comparison of our design and other waveguide-based logic function designs.
OperationsDesignWavelength (nm)CR (dB)Ref.
XOR, AND, OR, NOR, NAND, XNORDielectric-loaded waveguides47124.41–33.39[16]
OR, NOT, AND, XORMetallic waveguide arrays632.89.3–20[17]
NOT, XOR, AND, OR, NOR, NAND, XNORNanoring insulator–metal–insulator waveguides1550−1.1–18.75[18]
NOT, XOR, AND, OR, NOR, NAND, XNORDielectric–metal–dielectric design900 and 13305.37–22[19]
AND, OR, NAND, NOR, XOR, Fan-Out, Half adder, Full adderPhotonic crystal circiuts15505.54–11.56[20]
XOR, AND, OR, NOT, NOR, XNOR, NANDK-shaped silicon waveguides155030.5–34This work
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Kotb, A.; Zoiros, K.E. K-Shaped Silicon Waveguides for Logic Operations at 1.55 μm. Electronics 2022, 11, 3748. https://doi.org/10.3390/electronics11223748

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Kotb A, Zoiros KE. K-Shaped Silicon Waveguides for Logic Operations at 1.55 μm. Electronics. 2022; 11(22):3748. https://doi.org/10.3390/electronics11223748

Chicago/Turabian Style

Kotb, Amer, and Kyriakos E. Zoiros. 2022. "K-Shaped Silicon Waveguides for Logic Operations at 1.55 μm" Electronics 11, no. 22: 3748. https://doi.org/10.3390/electronics11223748

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