Microwave-Assisted Annealing Method for Low-Temperature Fabrication of Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors

Abstract

Compared with conventional silicon-based semiconductors, amorphous oxide semiconductors present several advantages, including the possibility of room-temperature fabrication, excellent uniformity, high transmittance, and high electron mobility. Notably, the application of oxide semiconductors to flexible electronic devices requires a low-temperature fabrication process. However, for the realization of semiconductor characteristics and stable products, the fabrication process requires annealing at temperatures of 300 °C or higher. To address this, a low-temperature microwave annealing method, which improves the electrical characteristics of a transistor and reduces the production time compared with the conventional annealing method, is presented herein. Microwave annealing is a well-known method of annealing that minimizes the heat energy transferred to a substrate via instantaneous heat transfer through the vibrations of the lattice in the material during microwave irradiation and is suitable as a low-temperature annealing method. In this study, we evaluate the electrical characteristics of devices subjected to conventional annealing at 200 °C and 300 °C for 1 h and microwave annealing at 200 °C for 10 min. For the device subjected to microwave annealing at 200 °C for 10 min, the threshold voltage, current on/off ratio, subthreshold swing, and saturation mobility are 13.9 V, 1.14 × 10⁵, 3.05 V/dec, and 4.23 cm²/V$·$s, respectively. These characteristic results are far superior to the characteristic results of the device subjected to conventional annealing at 200 °C for 1 h and are equivalent to those of the device treated at 300 °C for 1 h. Thus, this study develops a more effective annealing method, which facilitates low-temperature fabrication in a reduced period.

1. Introduction

Hydrogenated amorphous silicon (a-Si:H) has proven its ability to be produced as a TFT in extensive flexible electronics studies. However, its device performance is limited by the low mobility of channel materials (field effect mobility, μ_FE, ~1 cm²/V·s). In addition, Si-based windows are not transparent because of the small bandgap, so there is less interest in transparent circuits [1]. In particular, transparent ZnO-based thin-film transistors (TFTs) offer an attractive alternative to amorphous Si TFTs due to their high mobility (>10 cm²/V·s) and low process temperatures (<250 °C) compared to amorphous Si TFTs, making ZnO-based TFTs a very promising low-cost, large backplane for active-matrix organic light-emitting diode (AMOLED) displays [2]. Amorphous oxide semiconductors (AOS) are advantageous compared with conventional silicon-based semiconductors, and their advantages include the possibility of room-temperature fabrication, good uniformity, high transparency in the visible region (400–700 nm), and high electron mobility. Consequently, several studies have been conducted on amorphous indium–gallium–zinc–oxide (a-IGZO) materials [3,4,5,6]. The high electron mobility of a-IGZO can be attributed to the larger ns-orbital of the metal cation compared to the 2p-orbital of the oxygen anion [3]. Therefore, a-IGZO is typically adopted as the active layer in AOS thin-film transistors (TFTs). Recently, low-temperature fabrication techniques used to produce AOS-TFTs for applications in flexible electronics have attracted considerable attention. To this end, the development of flexible substrates has become necessary. However, most flexible substrates have a low glass transition temperature (Tg), which presents a limitation because the manufacture of AOS-TFTs requires an annealing temperature of 300 °C or more. The reason is that low-temperature deposited IGZO TFTs have a serious instability problem due to their current–voltage (I-V) characteristics. To solve this, it has been reported that the high-temperature annealing process reduces tail state defects, rearranges amorphous structures, and improves oxygen compensation in non-stoichiometric films [7,8,9,10,11]. Therefore, the development of flexible substrates with higher T_g values is crucial to the production of flexible electronics. The electrical properties of a-IGZO are controlled by the concentration of defects, such as oxygen vacancies, in the material. Previously, the manufacture of a-IGZO TFTs was typically carried out through thermal conduction methods, such as furnaces and rapid thermal annealing equipment. As mentioned above, most of the materials currently used as flexible substrates have extremely low T_g values, i.e., below 300 °C, making the fabrication of a-IGZO on flexible substrates extremely difficult [12,13,14]. However, the T_g of a polyimide substrate, which is a type of flexible substrate, is sufficient for the fabrication of an a-IGZO TFT. Furthermore, it possesses excellent mechanical and chemical properties and is cost-effective [15,16,17]. Although thermal annealing for the fabrication of an a-IGZO TFT is conventionally implemented through thermal conduction methods, such as furnace annealing and rapid thermal annealing [18,19], the energy loss and low efficiency of energy usage during such processes can be problematic [20]. Because the degree of microwave absorption depends on the rotation of the dipoles in a material, microwave annealing, which can be used to heat materials selectively, is a potential approach to enhance the efficiency of energy usage in a-IGZO TFT fabrication. Moreover, microwave heating is a non-contact, rapid heating process [20]; for example, the heating rate for amorphous carbon powders with dimensions smaller than 1 μm can reach 1258 °C min^–1 at room temperature subject to microwave irradiation at 2.45 GHz [21]. In addition, microwave-assisted annealing and sintering processes have been used to improve the crystallization of amorphous silicon [22].

In this paper, we describe the application of microwave annealing to enhance the efficiency of fabricating AOS-TFTs. In conventional thermal annealing processes, heat is transferred between objects by conduction, radiation, and convection mechanisms, whereas in microwave-assisted annealing, materials absorb electromagnetic energy and convert it into heat. Compared with conventional annealing methods, microwave annealing presents a higher heating rate, is more energy efficient, and requires no direct contact between the heating source and the heated material [20,23,24]. The technique also presents advantages, such as control of the heating process, significant reduction in energy consumption, compactness, low cost, ease of maintenance, selective heating of materials, and quick initiation and termination. The unique selectivity and short annealing times render this method suitable for efficient industrial production of oxide semiconductor-based devices.

2. Experiment

Figure 1a illustrates a schematic of the transistor device, and Figure 1b presents the concept of the microwave-assisted annealing technique adopted to enhance the efficiency of the annealing process.

A heavily doped P-type Si wafer (ρ < 0.01 Ωcm) and a thermally oxidized SiO₂ wafer with a dimension of 300 nm were used as the substrates. Ag paste was used as the metal for the gate connection. The substrates were cleaned with acetone, methanol, and isopropyl alcohol each in an ultrasonic bath for 15 min at 45 °C. Following this, an a-IGZO (In₂O₃:Ga₂O₃:ZnO = 1:1:1 mol%) thin film with a thickness of 50 nm was deposited via the radio-frequency (RF) magnetron sputtering method at room temperature. The basal vacuum in the chamber was set to less than 3.0 × 10⁻⁶ Torr, and the working pressure and RF-power were maintained at 5.0 × 10⁻³ Torr and 100 W, respectively, during sputtering. Before deposition, pre-sputtering was performed for 30 min to eliminate contaminants on the target. A mixed gas consisting of Ar and O₂ was used as the ambient gas, and the partial ratio of O₂ was maintained at 2%. The active layer was patterned using conventional photolithography and wet etching. As the source–drain electrode, a Ti (10 nm)/Au (100 nm) bilayer was deposited via electron beam and thermal evaporation at room temperature. A channel with a width (W) of 50 μm and length (L) of 50 μm was defined via photolithography and lift-off processes. After fabricating the devices, they were annealed using two methods: conventional thermal annealing at 200 °C and 300 °C, and microwave-assisted annealing (UMF-01, Unicera, Pyeongtaek, Korea). The thermal annealing and microwave-assisted annealing processes were performed for 60 and 10 min, respectively. During microwave-assisted annealing, the temperature was maintained at approximately 200 °C. However, because the equipment was designed and programmed for high-temperature processes, some fluctuation was observed in the low-temperature range. Analysis of surface roughness according to the heat treatment of a-IGZO thin film was performed using an atomic force microscope (AFM, XE-100). The electrical characteristics of the TFTs were analyzed using a semiconductor parameter analyzer (Keithley 4200 SCS, Beaverton, OR, USA) in a dark box.

During the analysis of the electrical performance of the devices, the turn-off voltage (V_turn-off), which is defined as the gate voltage required to bring about a transition from accumulation to complete depletion, was found to depend on N_d according to the following expression:

$$\left|V_{turn-off}-V_0\right|= \mathrm{q}{N}_d{t}_{active} \left(\frac{1}{C_i}+\frac{t_{active}}{2{\epsilon }_0{k}_s}\right)$$

(1)

where V₀ is a constant involving the effective fixed charge on the gate dielectric and the difference in work function between the gate and semiconductor, ε₀ denotes the vacuum permittivity, and k_s indicates the dielectric constant of the a-IGZO layer. Here, V_turn-off denotes the gate voltage before the drain current rise-up at V_DS = 0.1 V [6]. We assume k_s of the a-IGZO layer to be 11.5 [25]; therefore, we can estimate N_d of the a-IGZO thin film based on Equation (1). The saturation mobility (μ_SAT) can be evaluated using the conventional metal–oxide–semiconductor field effect transistor model described in Equation (2) [26]:

$${\mu }_{SAT}={\left(\frac{\partial \sqrt{I_{DS}}}{\partial V_G}\right)}^{\frac{1}{2}} \frac{2L}{W{C}_i}$$

(2)

where W denotes the channel width, L denotes the channel length, and C_i denotes the capacitance per unit area. The saturation mobility (μ_SAT) was estimated based on the transfer characteristics at V_DS = 10.1 V. The threshold voltage was defined by the gate voltage, which induced a drain current of W/L × 10 nA at a V_DS value of 10.1 V [6]. In several previous studies, V_TH was extracted from the linear fit of the square root of the drain current (I_D^1/2) [27,28,29]. However, a more quantitative extraction method was selected in this study.

3. Results and Discussion

Figure 2a–c show the surface roughness of the a-IGZO thin film after heat treatment obtained via AFM analysis. Figure 2a,b were subjected to a typical heat treatment at 200 °C and 300 °C for 1 h, and in the case of Figure 2c, microwave heat treatment was performed at 200 °C for 10 min. As a result of AFM surface analysis, the thin film in Figure 2a shows a value of 5.346 nm, that in Figure 2b shows a value of 0.653, and that in Figure 2c shows a value of 0.211 nm. As can be seen from the AFM analysis results, the RMS value of a thin film that was subjected to microwave heat treatment at 200 °C for 10 min was lower than that of the typical thin film heat treated at 200 °C and 300 °C for 1 h. These surface roughness characteristics affect the electrical characteristics evaluation, and, as shown in

Table 1. Summarized electrical characteristics of the a-IGZO TFT for various annealing methods.

Parameters	VTH (V)	ION/OFF	S.S (V/DEC)	MSAT (CM2/V·s)	Nd (cm−3)
THERMAL, 200 °C	34.9	8.04 × 103	8.813	0.12	3.32 × 1017
THERMAL, 300 °C	7.5	7.76 × 105	2.74	6.06	3.23 × 1016
M-WAVE, 200 °C	13.9	1.14 × 105	3.05	4.23	1.35 × 1017

, the results are similar to those of the device subjected to typical heat treatment at 300 °C for 1 h. Microwave heat treatment is very efficient, with only low temperatures and heat treatment being carried out for a short period of time. In addition, microwave heat treatment does not cause thermal damage even at high power, but with typical heat treatment, it does cause serious damage at high temperatures [30].

Figure 3 shows the O1s spectra of IGZO films annealed at conventional thermal annealing (CTA, OTF-1200X, MTI Corporation, Richmond, CA, USA) at 200 °C and 300 °C, and microwave annealing (MWA, UMF-01, Unicera, Pyeongtaek, Korea) at 200 °C. We decomposed the obtained O1s XPS spectra into three individual components with different binding energies of 529, 530, and 531 eV. The peaks at 529, 530, and 531 eV are associated with stoichiometric oxygen (contained in M-O); oxygen vacancies (Vo); and loosely bound oxygen impurities (M-OH), such as chemisorbed oxygen, H₂O, and CO₃, respectively. In general, it is well-known that the M-OH peak is associated with the electron trapping site. As shown in Figure 3, MWA-treated IGZO has a smaller M-OH than CTA-treated IGZO. This means that MWA can reduce defects in IGZO thin films more effectively than CTA.

In CTA, energy is transferred due to thermal gradients from the surface of the object to the interior, whereas MWA is an energy conversion, rather than heat transfer, in which MW energy is directly delivered to the volume of the materials through a molecular interaction with the electromagnetic field.

This process allows MWAs to heat thick materials quickly and uniformly, as MWAs can penetrate materials and accumulate energy without relying on thermal diffusion on the surface. In particular, two components, M-O_vac and M-OH, are expected to degrade the electrical properties of the IGZO film. Ionized O_vac is related to the M-O_vac ratio, which is known to affect positive bias stress (PBS) stability by creating electron traps [31]. O_vac also behaves similarly to electron donors with regard to negative bias stress (NBS) stability [32,33]. Furthermore, oxygen impurities in the IGZO channel layer are negatively charged by a chemical reaction of O₂ + e⁻ $\leftrightarrow$ O₂⁻ and reduce the number of conduction electrons in the channel, resulting in a clockwise hysteresis at the positive bias [34]. On the other hand, the loosely bound oxygen impurity contained in M-OH acts as a charge trap state in the solution-treated IGZO thin film to reduce the on-current of the TFT [35].

Figure 4a,b illustrate the output and transfer characteristics, respectively, of the a-IGZO TFT thermally annealed at 200 °C. In this case, the poor electrical performance of the device can be primarily attributed to the atomic rearrangement of the active layer. In previous studies, the saturation mobility of an a-IGZO TFT was found to be higher than 10 cm²/V$·$s. Prior to the heat treatment process, a-IGZO thin films have lattice gaps or defects between the lattice and decrease in reliability due to large amounts of oxygen vacancy. In addition, the surface is very rough, and cracks can also be present. However, the heat treatment process causes particle collisions, and the resulting consequences of shock heating can close the gaps between the lattice and cause a decrease in particle size [36,37].

This is because the annealing process is performed at temperatures over 300–350 °C [5,6]. This implies that high thermal energy is required to rearrange atoms in the local sites for a better electrical performance. In other words, the high annealing temperature causes internal modifications in the semiconductor structure, leading to an improved local atomic rearrangement [38].

Figure 5a,b present the output and transfer characteristics, respectively, of the a-IGZO TFT thermally annealed at 300 °C. In this case, better electrical performance parameters than those of the device annealed at 200 °C can be noted. These parameters include the threshold voltage, saturation mobility, and current on/off ratio. The threshold voltage, current on/off ratio, subthreshold swing, and saturation mobility were evaluated to be 7.5 V, 7.76 × 10⁵, 2.74 V/dec, and 6.06 cm²/V$·$s, respectively.

In Figure 4 and Figure 5, the drain current (I_DS) attains a peak and then decreases as the drain voltage (V_DS) increases. This can be explained based on the charge carriers generated by the defect states in the a-IGZO TFT. Note that defect states can create extra charge carriers, thereby increasing the carrier concentration. However, these defect states could also obstruct the flow of charge carriers from the source to the drain when the channel is pinched off. In other words, the carriers generated by the defects contribute to the diffusion current during linear operation. However, these states are also known to obstruct the flow of drift current, thus causing I_DS to decrease. The electrical characteristics of a-IGZO TFTs can be improved via atomic rearrangement. However, when sufficient energy is not supplied, several defect states function as carrier sources.

As presented in Table 1, N_d of the a-IGZO TFT annealed at 300 °C is estimated to be 3.23 × 10¹⁶ cm⁻³. The difference between the a-IGZO thin film annealed at 200 °C and the a-IGZO thin film annealed at 300 °C can be explained based on the density of defect states in the films [39,40]. Note that the number of defect states can be reduced by annealing, which involves supplying thermal energy to the atoms. In this study, we adopted microwave-assisted annealing instead of conventional thermal annealing. Although the a-IGZO TFT was annealed using a microwave-assisted process at 200 °C, the electrical characteristics of the device were comparable to those of the a-IGZO TFT annealed at 300 °C.

In Figure 6, I_DS does not decrease after peaking as it does in Figure 4 and Figure 5. Hence, the microwave-assisted process is more efficient than the thermal annealing process in terms of reducing the number of defect states. In general, the optical bandgap appears to be smaller than the actual bandgap owing to the light absorbed by a subgap state, such as a tail state, present near the conduction band or the appliance band in a material. This change in the subgap state can be indirectly identified through a change in the absorption coefficient. The change in the high optical bandgap and the absorption coefficient in the bandgap range compared to the high-temperature that occurs during microwave annealing, indicates that microwave annealing reduces the subgap state of IGZO semiconductors more effectively than conventional high-temperature annealing [41].

Therefore, microwave annealing minimizes the thermal energy transferred to the substrate owing to instantaneous heat transfer through the vibration of the lattice in the material and is suitable as a low-temperature heat annealing method [41,42,43].

4. Conclusions

In summary, herein, we utilized a microwave-assisted annealing method for low-temperature fabrication of an a-IGZO TFT. In order to confirm the general heat treatment conditions and the microwave heat treatment effect, the roughness of the surface was confirmed through AFM analysis, and the electrical properties were compared based on this.

After comparing the surface treated for 1 h at 200 °C and 300 °C with typical heat treatment with the surface treated for 10 min at 200 °C with microwave heat treatment, the roughness of the thin film that was microwave heat treated for a short time at 200 °C was much better, and it was found to be more efficient than conventional annealing methods in terms of reducing the proportion of defect conditions.

In addition, the effect of MWA was verified by comparing the chemical state of the CTA-treated a-IGZO TFT and the electrical characteristics of the prepared a-IGZO TFT.

MWA improved the quality of the IGZO film more effectively than CTA due to the difference in the heat energy transfer mechanism, and the removal efficiency of residual impurities and oxygen defects was higher in MWA than in CTA. Furthermore, the a-IGZO TFT fabricated using the microwave-assisted annealing method not only exhibited better electrical characteristics than the a-IGZO TFT annealed at 200 °C but was also comparable with the a-IGZO TFT annealed at 300 °C. This result can be useful for the fabrication of AOSs for applications in flexible devices.