# Single-Branch Wide-Swing-Cascode Subthreshold GaN Monolithic Voltage Reference

^{1}

^{2}

^{*}

## Abstract

**:**

^{2}), with a reduced current consumption of 2.7 µA (5 µA) in the typical (worst) case, independent of supply. The untrimmed temperature coefficient is 200 ppm/°C.

## 1. Introduction

_{REF}, that is used by other blocks to work correctly. Examples of systems that exploit voltage references for proper function include switching power converters, linear regulators, oscillators, PLLs, A/D and D/A converters, operational amplifiers, etc. The characteristics of V

_{REF}are usually measured in terms of insensitivity to supply voltage variations (either as line regulation, ΔV

_{REF}/ΔV

_{DD}, or power supply rejection, PSR, as a function of frequency) and to temperature (voltage drift or temperature coefficient, TC = ΔV

_{REF}/ΔT). Insensitivity to load variations (load regulation, ΔV

_{REF}/ΔI

_{LOAD}) is another important feature that is often achieved by a following voltage regulator circuit. Other sources of inaccuracy in IC implementations are caused by process variations and mismatches.

## 2. Previous Art

_{REF}. It is therefore essential to avoid the zener diode and to realize the voltage reference in a monolithic form to counteract these drawbacks.

#### 2.1. Schottky-Diode-Based GaN Voltage Reference

_{D1}, implements a current source and is operated in the subthreshold regime to obtain relatively low power consumption (0.8 mA at room temperature). It should be noted that Q

_{D1}must also provide enough current driving capability to the external load to prevent V

_{REF}from being affected by the load because no additional voltage regulator was used in this application. Diodes D

_{3}and D

_{4}implement a source degeneration of Q

_{D1}that stabilizes the current magnitude against process tolerances (for instance, variations of threshold voltage of Q

_{D1}). Moreover, D

_{3}and D

_{4}also allow for compensation of the effects that temperature changes have onto D

_{1}and D

_{2}.

_{REF}= − V

_{D}

_{1}− V

_{D}

_{2}.

_{3}and D

_{4}must be smaller than the magnitude of the threshold voltage of Q

_{D1}to ensure the transistor turn-on.

_{REF}would depend linearly on V

_{DD}, which means unitary line regulation. A relatively high temperature coefficient is also observed and Schottky diodes are not always offered by commercial GaN platforms. Finally, a high current consumption is found.

#### 2.2. Reference Voltage Generators Based on Current Mirrors

_{E1}–Q

_{E3}), in which the reference current I

_{REF}= I

_{Q,D}

_{1}is realized through Q

_{D1}and the current limiting resistor R

_{1}. As shown in [30], the circuit’s loop gain ensures that approximately the same current I

_{REF}flows in the two branches.

_{1}suitably large, we obtain a very small I

_{REF}value, so that Q

_{D1}is biased in the near threshold, i.e., V

_{GS,D}

_{1}is approaching the (negative) threshold voltage V

_{TH,D}, whereas V

_{GS,E}

_{1}and V

_{GS,E2}are approaching the threshold voltage V

_{TH,E}:

_{DS}= 1 V, it is seen that V

_{TH}

_{,D}increases with temperature by 1.1 mV/°C, whereas V

_{TH}

_{,E}increases with temperature by 4.1 mV/°C. As a result, I

_{REF}will exhibit a complementary to absolute temperature (CTAT) behavior.

_{E1}–Q

_{E2}of the Wilson current mirror ensure, at a first approximation, the same drain current I

_{DE}

_{1}and I

_{DE}

_{2}; hence, we have I

_{DE}

_{2}≈ I

_{DE}

_{1}= I

_{REF}. As a consequence, V

_{REF}is given by

_{2}/R

_{1}to 4.1/1.1 = 3.72.

_{REF}is still dependent on V

_{DD}because the drain-to-source voltage seriously affects the threshold voltage of the E-GaN (with a slope of −36.3 mV/V [30]). A large area occupation is caused by the required large values of R

_{1}and R

_{2}. Unavoidable mismatch affects I

_{DE}

_{1}and I

_{DE}

_{2}because Q

_{E1}and Q

_{E2}work at substantially different V

_{DS}values.

_{E1}–Q

_{E4}is used to suppress the V

_{DS}variations of Q

_{E1}–Q

_{E2}and to accurately set I

_{DE}

_{1}= I

_{DE}

_{2}. Moreover, Q

_{E3}in Figure 2 is changed into a depletion device, Q

_{D2}, in Figure 3. This choice allows us to decrease the minimum required V

_{DD}that can be now from 3.9 V to 24 V, thanks to the negative threshold of Q

_{D2}.

_{REF}for the circuit in Figure 3:

_{2}+ R

_{3})/R

_{1}, the TC of V

_{REF}can be ideally nullified.

_{REF}is residually dependent on V

_{DD}because current I

_{D}

_{1}in saturation linearly depends on V

_{DS}through the Early effect, and V

_{DS}is in turn the result of the V

_{DD}voltage divider between the output impedance of Q

_{D1}and that of the current mirror (drain of Q

_{E3}), which are both high impedances. A large area occupation is still caused by the required large values of the resistors. Two branches are used.

#### 2.3. 2-T Voltage Reference

_{D1}(acting as current source and a diode-connected enhancement device) and Q

_{E1}(acting as a diode-connected load). From inspection, we see that V

_{GS,E}

_{2}= −V

_{GS,D}

_{1}= V

_{REF}with both transistors currents equal. Assuming Q

_{E1}and Q

_{D1}in saturation with the expression of the currents in the form I

_{D}= k

_{n}(V

_{GS}− V

_{T})

^{2}, where k

_{n}is the transconductance factor, we have

_{n}

_{,E}/k

_{n}

_{,D}, the TC of the reference voltage can be minimized.

_{REF}is dependent on V

_{DD}because current I

_{D}

_{1}of Q

_{D1}in saturation linearly depends on V

_{DS}through the Early effect, and V

_{DS}is in turn equal to V

_{DD}− V

_{REF}. Though the minimum number of transistors is used and no resistors are exploited, a large area occupation is still necessary because large channel lengths are required to reduce the current consumption and to improve line regulation. It should also be noted that current I

_{REF}cannot be freely chosen, once the transconductance ratio is set for TC minimization.

## 3. Proposed Voltage Reference Generator

_{TH}

_{,D}, in which TC is about 250 µV/°C, much lower than the TC of V

_{TH}

_{,E}(that is 4.2 mV/°C). This technological behavior then makes approaches such as that in [30] almost useless because, using (3) or (4), the TC minimization of V

_{REF}would require an extremely large and unpractical resistor ratio (as high as 17).

#### 3.1. Circuit Description

_{D1}, Q

_{D2}, and R

_{1}) that generates the reference current and a lower side section (Q

_{E1}, Q

_{E2}, R

_{2}, and R

_{3}) which acts as an active load.

_{D1}-Q

_{D2}and current-limiting resistor R

_{1}, current I

_{REF}(flowing from V

_{DD}to ground) is equal to V

_{SG}

_{,D1}/R

_{1}. Unlike in (2), V

_{SG}

_{,D1}cannot be approximated by −V

_{TH}

_{,D}because the transistors will be all operated in subthreshold. Therefore, previous analyses such as those carried out in [30] and [31] cannot be adapted to this case and new design equations must be developed, as described in Section 3.2.

_{D2}in the current generator does not vary the value of I

_{REF}, but it allows for decreasing the second-order dependence of I

_{REF}(and hence of V

_{REF}) on the supply voltage. Indeed, Q

_{D2}shields the drain-source voltage of Q

_{D1}from V

_{DD}variations by setting V

_{DS,D}

_{1}constant and equal to V

_{SG,D}

_{2}, hence independent of V

_{DD}.

_{D1}and Q

_{D2}have the same aspect ratio and the same drain current, we have that

_{GS,D}

_{1}= −V

_{GS,D}

_{2}= V

_{DS,D}

_{1}

_{DS,D}

_{1}.

_{E1}–Q

_{E2}and resistors R

_{2}−R

_{3}, which act similarly to the previous circuit of Figure 3.

_{E2}is to make V

_{DS,E}

_{1}independent of the threshold voltage variations caused by the large process spreads. Indeed, a simple evaluation shows that

_{E1}and Q

_{E2}does not vary V

_{DS,E}

_{1}. On the contrary, V

_{DS,E}

_{2}depends on V

_{GS,E}

_{2}

#### 3.2. Analysis and Design Strategy

_{D1}operates in the subthreshold. In particular, ΔV

_{SUB}is the amount of subthreshold voltage:

_{REF}= 2.5 µA, using minimum size depletion transistors, and considering that in the adopted technology V

_{TH,D}= −691 mV, by setting ΔV

_{SUB}= −150 mV, we have from (10) that the required value of R

_{1}is about 340 kΩ.

_{REF}is set, assuming that V

_{GS,E}

_{1}and V

_{GS,E}

_{2}are almost equal, we can set V

_{DS,E}

_{1}from (7) through R

_{3}. For V

_{DS,E}

_{1}around 300 mV, R

_{3}= 300 mV/2.5 μA = 120 kΩ is required.

_{TH,D}is reflected into I

_{REF}that is almost constant with temperature. The last term of (11) is hence roughly constant with T, and consequently, the TC of V

_{REF}is dominated by the TC of V

_{GS,E}

_{1}. Note that following an approach such as that in (3) or (4) would lead to an impractically large R

_{2}+R

_{3}value that is 17 times R

_{1}, i.e., around 5.8 MΩ. We instead utilize (11) to compensate for the variations in V

_{REF}due to process corners. Specifically, SS, or slow-slow models, are characterized by the highest threshold magnitudes for both E- and D-type transistors, and FF, or fast-fast models, are characterized by the lowest threshold magnitudes. The large thresholds spread of the adopted technology is summarized in Table 1, which shows 42% and 28% variations in V

_{TH,E}and V

_{TH,D}, respectively, at room temperature. Considering the SS corner and (10) and (11), it is seen that V

_{TH,E}(V

_{TH,D}) tends to increase (decrease) V

_{REF}. The FF corner works in the opposite manner. As a result, there is an optimal value of R

_{2}+R

_{3}that minimizes the effect of the process spread at a specified temperature. By considering SS and TT corners and taking the absolute value of the threshold differences, from (10) and (11), we have

_{2}+ R

_{3}around 555 kΩ and, consequently, R

_{2}= 435 kΩ since R

_{3}is already known.

_{E}operating in the subthreshold.

_{T}is the thermal voltage, n

_{E}is the subthreshold slope coefficient, η

_{E}is the drain induced barrier lowering (DIBL) coefficient, and I

_{0,E}is proportional to (W/L) and ${V}_{T}^{2}$. We neglected body effect for simplicity. In the following, V

_{DS}>> V

_{T}is always met, and therefore, the factor in round brackets in (13) can be also neglected. Evaluating V

_{GS,E}

_{1}from (13) yields

_{GS,E}

_{2}. Now, substituting (8) in (14) and expressing V

_{GS,E}

_{1}− V

_{GS,E}

_{2}as ln[(W/L)

_{E2}/(W/L)

_{E1}], we have

_{E2}/(W/L)

_{E1}that is found through computer simulation, as the temperature coefficient of V

_{GS,E1}cannot be easily evaluated analytically.

## 4. Validation Results

_{min}equal to 1 µm and 0.55 µm for enhancement and depletion transistors, respectively. The transistor thresholds have been already given in Table 1. The aspect ratio and multiplicity of the transistors together with the resistor dimensions and their nominal values are summarized in Table 2.

_{E2}/(W/L)

_{E1}was found to be 3/10 through computer simulations.

_{REF}/ΔV

_{DD}= (2.706 − 2.685)/(24 − 3.9) = 1.05 mV/V, or equivalently, 0.105%V.

_{REF}versus supply voltage is shown in Figure 7, under the same room temperature and typical process conditions. I

_{REF}is roughly equal to 2.7 µA for V

_{DD}greater than 3.9 V. A current consumption independent of supply voltage is achieved.

_{REF}and I

_{REF}, we can infer from (10) that the value of V

_{GS,E}

_{1}is 1.14 V, confirming the subthreshold operation.

_{REF}is found for temperatures below 23 °C and is due to the fitting point of the device models at ambient temperature. Nevertheless, the reference voltage ranges from 2.47 V to 2.71 V, with less than ±4.5% variability in the whole temperature range and within the 3.9–24 V supply. The robustness of the solution and the viability of the design approach is hence confirmed to counteract process, temperature, and supply variations. Considering the worst-case curve (SS at 3.9 V), the TC is evaluated to be around 200 ppm/°C.

## 5. Conclusions

^{2}) and low current consumption (2.7 µA). Both features are becoming more and more important targets also in the automotive sector to save space inside the vehicle and to preserve the battery autonomy.

## Author Contributions

## Funding

## Conflicts of Interest

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**Figure 1.**Schottky-diode-based GaN voltage reference [29].

**Figure 2.**GaN voltage reference based on Wilson current mirror [30].

**Figure 3.**GaN voltage reference based on wide-swing-cascode current mirror [30].

**Figure 4.**2-T GaN voltage reference [31].

**Figure 8.**Corner analysis of reference voltage in the temperature range from −40 °C to 190 °C for two supply values (3.9 V and 24 V).

**Figure 9.**Corner analysis of power supply rejection, or PSR, at three temperatures and maximum supply of 24 V.

Thresholds | Typ | SS | FF |
---|---|---|---|

V_{TH,E} (V) | 1.62 | 2.28 | 0.918 |

V_{TH,D} (V) | −0.691 | −0.287 | −1.10 |

Device | W (µm) | L (µm) | Multiplicity | Value |
---|---|---|---|---|

Q_{D1}–Q_{D2} | 5 | 0.5 | 1 | |

Q_{E1} | 250 | 1 | 8 | |

Q_{E2} | 200 | 1 | 3 | |

R_{1} | 2 | 1000 | 1 | 320.22 kΩ |

R_{2} | 2 | 1400 | 1 | 448.42 kΩ |

R_{3} | 2 | 400 | 1 | 128.20 kΩ |

Ref. Year | This Work * 2022 | [21] 2022 | [31] 2022 | [30] 2020 | [29] 2010 |
---|---|---|---|---|---|

Supply (V) | 3.9~24 | 4~16 | 4.8~50 | 3.9~24 | −4.3~−10 |

V_{REF} (V) | 2.7 | 2.3 | 2.53 | 3.19 | −2.1 |

Tot. current (µA) | 2.7 (5, worst case) | 43 | 60 | 6.2 | 800 |

Line Regul. (%V) | 0.105 | NA | 0.063 | 0.32 | N/A |

PSR @100Hz (dB) | −45 (worst case) | NA | −42.8 | −45 | −35 |

Temp. Range (°C) | −40~190 | 25~550 | −25~250 | −50~200 | 25~250 |

TC (ppm/°C) | 200 ^{+} (worst case) | 242 ^{+} | 26.2 | 23.6 | 238 ^{+} |

Area (mm^{2}) | 0.05 | 0.03 | 0.104 | 0.52 (0.31 w/o PADs) | 0.164 |

^{+}Untrimmed.

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**MDPI and ACS Style**

Bimbi, C.; Pennisi, S.; Privitera, S.; Pulvirenti, F.
Single-Branch Wide-Swing-Cascode Subthreshold GaN Monolithic Voltage Reference. *Electronics* **2022**, *11*, 1840.
https://doi.org/10.3390/electronics11121840

**AMA Style**

Bimbi C, Pennisi S, Privitera S, Pulvirenti F.
Single-Branch Wide-Swing-Cascode Subthreshold GaN Monolithic Voltage Reference. *Electronics*. 2022; 11(12):1840.
https://doi.org/10.3390/electronics11121840

**Chicago/Turabian Style**

Bimbi, Cesare, Salvatore Pennisi, Salvatore Privitera, and Francesco Pulvirenti.
2022. "Single-Branch Wide-Swing-Cascode Subthreshold GaN Monolithic Voltage Reference" *Electronics* 11, no. 12: 1840.
https://doi.org/10.3390/electronics11121840