Gowda, K.M.V.; Madhavan, S.; Rinaldi, S.; Divakarachari, P.B.; Atmakur, A.
FPGA-Based Reconfigurable Convolutional Neural Network Accelerator Using Sparse and Convolutional Optimization. Electronics 2022, 11, 1653.
https://doi.org/10.3390/electronics11101653
AMA Style
Gowda KMV, Madhavan S, Rinaldi S, Divakarachari PB, Atmakur A.
FPGA-Based Reconfigurable Convolutional Neural Network Accelerator Using Sparse and Convolutional Optimization. Electronics. 2022; 11(10):1653.
https://doi.org/10.3390/electronics11101653
Chicago/Turabian Style
Gowda, Kavitha Malali Vishveshwarappa, Sowmya Madhavan, Stefano Rinaldi, Parameshachari Bidare Divakarachari, and Anitha Atmakur.
2022. "FPGA-Based Reconfigurable Convolutional Neural Network Accelerator Using Sparse and Convolutional Optimization" Electronics 11, no. 10: 1653.
https://doi.org/10.3390/electronics11101653
APA Style
Gowda, K. M. V., Madhavan, S., Rinaldi, S., Divakarachari, P. B., & Atmakur, A.
(2022). FPGA-Based Reconfigurable Convolutional Neural Network Accelerator Using Sparse and Convolutional Optimization. Electronics, 11(10), 1653.
https://doi.org/10.3390/electronics11101653