Peer-Review Record
Receiver Analog Front-End Cascading Transimpedance Amplifier and Continuous-Time Linear Equalizer for Signals of 5 to 30 Gb/s
Electronics 2022, 11(10), 1546; https://doi.org/10.3390/electronics11101546
Reviewer 1:
Anonymous
Reviewer 2:
Anonymous
Electronics 2022, 11(10), 1546; https://doi.org/10.3390/electronics11101546
Submission received: 15 March 2022
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Revised: 29 April 2022
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Accepted: 2 May 2022
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Published: 12 May 2022
(This article belongs to the Collection Analog IC Design—Analog and RF Interface for Electronic Systems)
Round 1
Reviewer 1 Report
Author investigate the Receiver Analog Front Ended Cascading Transimpedance Amplifier and Continuous-Time Linear Equalizer for Signals of 5 to 30 Gb/s. In my view the manuscript need a revision. The following point should be addressed before the decision.
- The introduction section is very poor, author should elaborate it. Mainly why author did this study.
- The history of similar work in the introduction is must.
- A detail and need of the component should be given. For example why CTLEs are required.
- The results should be explained with the help of physics (Fig. 10 to Fig. 17).
- Finally, I will recommend the English should be improved.
Author Response
please see the attached
Author Response File: 
Author Response.pdf
Reviewer 2 Report
This paper presents a transimpedance amplifier and linear equalizer architecture. The following concerns need to be addressed.
- The first line of each paragraph needs to be properly indented.
- In Section 1, the motivation and the contribution of the paper must be highlighted more clearly.
- The variables should be defined before being mentioned.
- The numbering of equations is better to be placed at the rightmost side. Many of equations look as if it is to subtract (x) from the formulae. For example, the DC gain looks like subtracting (4) from gmRL/(1+GMRS/2). The similar applies to other equations as well.
- In Figure 5, is it necessary to put the circuit above the curve?
- The CMOS technology used in this paper is not better than the compared works in Tables. However, the performance of the proposed circuit is comparable or even better than those. Considering the marginal novelty of the proposal, this is rather hard to believe. Please emphasize the key renovation that enables such improvements.
- The quality of Figures need to be enhanced. Most of them seem to be merely captured from a software.
Author Response
please see the attached
Author Response File: Author Response.pdf
Round 2
Reviewer 1 Report
Now the manuscript can be accepted.
Reviewer 2 Report
The concerns have been addressed.
