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Article

A Modified LADRC-Based DC-Link Voltage Controller for Photovoltaic Grid-Connected Inverters

Tianjin Key Laboratory for Control Theory & Applications in Complicated Industry Systems, School of Electrical and Electronic Engineering, Tianjin University of Technology, Tianjin 300384, China
*
Authors to whom correspondence should be addressed.
Electronics 2021, 10(8), 877; https://doi.org/10.3390/electronics10080877
Submission received: 16 March 2021 / Revised: 3 April 2021 / Accepted: 4 April 2021 / Published: 7 April 2021
(This article belongs to the Section Systems & Control Engineering)

Abstract

:
To enhance the robust stability of the dc-link voltage in the photovoltaic (PV) grid-connected system, a modified linear active disturbance rejection control (LADRC)-based regulation strategy is presented in this paper. The proposed control strategy is equipped with the cascaded extended state observer, which can supplement the disturbance information not estimated by the conventional one, thereby achieving a relatively fast and accurate disturbance reconstruction. The tracking performance and disturbance rejection performance of the modified LADRC are discussed and studied in the frequency domain. Finally, the experimental results are provided to verify the theoretical analysis.

1. Introduction

Extensive use of fossil fuels has caused more and more serious damage to the living environment of human beings and has led to ecological deterioration [1]. After years of exploration, grid-connected photovoltaic (PV) power plants have become the future development direction and research focus [2]. As the interface between renewable and the grid, grid-connected inverters play a vital role in the process of high-efficiency power conversion and high-quality power supply [3,4]. The control of the inverter is not only responsible for regulating the grid-connected current, but also must maintain a stable voltage across the dc-link capacitor [5]. Notably, if the dc-link voltage is not correctly controlled, the performance of the system would be severely degraded and even trigger related protection devices [6]. Therefore, the control performance of the dc-link voltage can be regarded as an important indicator to measure the reliability of grid-connected systems.
For PV grid-connected inverters, a dual-loop control structure under the dq synchronous reference frame (SRF) is generally adopted [7]. The outer voltage loop maintains a constant dc-link voltage by balancing the power flow in the system, and the inner current loop is responsible for power quality issues and harmonic protection [8]. However, in the presence of active power disturbances, the dc-link voltage is prone to fluctuations. These active power disturbances are mainly divided into three categories, namely: (1) Variations in climatic conditions, such as temperature and solar irradiance [9,10]; (2) voltage sag fault on the grid; and (3) inevitable power exchange fluctuations between the dc side of the inverter and the grid. Besides, the inverter itself is also a sensitive system with non-constant parameters and non-linear variations. All factors above have caused problems for realizing robust dc-link voltage control.
To enhance the robustness of the dc-link voltage under multi-source disturbances, a feedforward control is integrated into the outer loop to compensate for the disturbance caused by active power [11]. However, this feedforward control requires additional sensors, which is undesirable from the standpoint of reliability and cost. An adaptive control method that can support the dc-link voltage stability during grid sag fault is proposed in [12]. When an asymmetrical grid fault occurs, this control method can stabilize the dc-link voltage within the rated range by attenuating the double-line-frequency ripple. Also, some advanced control schemes have been developed for grid-connected power converters, such as sliding-mode control [13], internal model control [14], and neural networks [15].
Recently, control strategies, using observers, have also been implemented in dc-link voltage regulation [16,17,18]. Considering the fault condition of the dc-link voltage sensor, a control method based on Luenberger observer was employed in [16], which can improve system stability through fault-tolerant control. In [17], a control scheme using nonlinear disturbance observer (Dob) is conceived to suppress the fluctuation range of the dc-link voltage when the capacitance parameter variations. In particular, this method does not need to add additional sensors, which is conducive to realizing the “plug-and-play” of distributed generators in the microgrid. Besides, the work presented in [18] combines extended state observer (ESO) with sliding mode control to force the inner loop current to track the set point, thereby indirectly enhancing the transient performance of the dc-link voltage. ESO breaks the limitations of the Luenberger observer and DoB requiring accurate plant models, and has been widely used as an observer to estimate the disturbances. ESO was originally proposed in the structure of active disturbance rejection control (ADRC) [19].
In the ADRC framework, the internal uncertainties and external disturbances of the plant are regarded as a “generalized disturbance”, while ESO and feedback control law are constructed to estimate and compensate for it. Based on strong tolerance to disturbances, ADRC has shown broad prospects in engineering applications. However, the non-linear structure and complex parameter tunings pose challenges for its theoretical analysis. For the convenience of application, a linear ADRC (LADRC) is first discussed in [20] through the pole placement technique. The formula description of LADRC is relatively uncomplicated, and the characteristics of its resulting control system could be explored in the frequency domain, such as stability, tracking and disturbance rejection performance [21,22]. Obviously, the overall properties of LADRC-based control systems are closely related to the estimation ability of generalized disturbance [23].
In this paper, a modified LADRC-based dc-link voltage control strategy is particularly developed in a disturbed PV grid-connected system, in order to improve the dynamics and disturbance tolerance under variable operating conditions. Cascaded linear ESO (LESO) is employed to guarantee relatively accurate estimation of generalized disturbance. The remainder of this paper is organized as follows. In Section 2, the stability problem under active power disturbances is revealed through the dynamic modeling of the dc link, and the commonly used dual-loop control structure is briefly introduced. In Section 3 and Section 4, the design procedure and performance investigation of the modified LADRC are presented respectively. In Section 5, the experimental comparison results are provided to verify the effectiveness of the proposed modified LADRC. Finally, the conclusions are indicated in Section 6.

2. Problem Formulation

The analysis and research on the dc-link voltage in this paper are based on the two-stage PV grid-connected system, described in Figure 1, where the front stage and the rear stage have independent topology and control objectives [24]. The realization of maximum power point tracking (MPPT) and voltage boost conversion is the main attribute of the front stage dc/dc link [25]. The rear stage dc/ac link, which has the following tasks [8]:
  • dc-link voltage control within safe operational range;
  • active current control on the grid side;
  • ensure the high quality of the power injected into the grid;
  • grid synchronization.
There is a capacitor between the front stage and the rear stage, which can alleviate the transient fluctuation of the dc-link voltage and attenuate the high-frequency ripple component [6]. Before starting the robust controller design, the power disturbances of the dc link and its control investigation are briefly described.

2.1. Power Disturbances Analysis of DC Link

From Figure 1, the active power relationship across the dc link can be described as,
P s P d c = 1 2 C d u d c 2 d t
where, P S is the active power flowing through the boost circuit, P s = u d c i s . P d c is the inverter dc-side terminal power P d c = u d c i g .
In dq SRF, assuming that the grid voltage is balanced, the active power of the grid side can be expressed as,
P g = 3 2 ( e d i d + e q i q )
where e d and e q are the dq axis components of the grid voltage; i d and i q are the dq axis components of the grid current. Align the d-axis in the SRF with the grid voltage vector, then e d is equal to the phase voltage magnitude, e q = 0 [26]:
P g = 3 2 e d i d .  
If the power loss of the electronic converters and the ac-side filter is not considered, the dc-side terminal power P d c is equal to the grid-connected power P g [17]. Considering this scenario, Equation (1) can be rewritten as:
P s 3 2 e d i d = 1 2 C d u d c 2 d t .  
Equation (4) illustrates that the dynamics of the dc-link voltage is affected by the power relationship between the front stage and the rear stage.
When the PV grid-connected system is in a steady state, the dc-link voltage is maintained at the nominal value, with P s = P g . However, the variations of ambient temperature, solar irradiance, grid voltage and other uncertain factors would lead to the imbalance between P s and P g , forcing the dc-link voltage to fluctuate. At this time, the current flowing through the dc side capacitor changes more drastically, which seriously threatens the safety of the device. Therefore, it is of practical significance to design a robust dc-link voltage controller.

2.2. Control Investigation of DC link.

From Figure 1, the dynamic model of the dc link can be presented as:
C d u d c d t = i s i g .  
Assuming that the dc link has been well controlled, ( u d c = u d c * ) , the relationship between i s and i d * can be derived as:
i s = 3 e d 2 u d c * i d * .  
This approximation method ignores the interactive influence of the current loop and the voltage loop, which can reduce the complexity of the control system design without significantly affecting the performance [6].
Substituting Equation (6) into Equation (5) yields,
d u d c d t = 3 e d 2 C u d c * i d * i g C
which illustrates that the control of the dc-link voltage can actually be carried out around the d-axis component of the grid current. Furthermore, this can also explain why i d * can be used as the output of the outer-loop voltage controller in the dual-loop structure.
Figure 2 presents a commonly used dual-loop control structure, where the reference system conversion modules are used to generate the components of the control variable on the dq-axis and the modulation signal. The voltage controller is responsible for supporting the control stability of the dc-link voltage and synthesizing the required d-axis current reference. The current controller regulates the grid-side power by controlling the dq-axis current to track the given reference [27]. As for the q-axis current, its reference is generally set to zero to achieve unity power factor grid connection. The frequency and phase required to perform the coordinate system transformation are generated by a phase-locked loop (PLL).
It can be seen that the current loop can be considered an important hub between the voltage loop and the grid. If the voltage control system is not constructed correctly, the current loop would be adversely affected. In this paper, an emerging control algorithm LADRC is implemented in the voltage loop to enhance dc-link voltage control performance, and its design process and performance investigation are introduced in Section 3 and Section 4.

3. Modified LADRC-Based DC-Link Voltage Control Strategy

As stated previously, strong tolerance to a variety of disturbances is an indispensable key factor for the design of outer loop voltage controllers. This paper proposes the application of modified LADRC to guarantee superior dc-link voltage tracking and disturbance rejection performance. The kernel idea of LADRC is to treat a simple integral-chain as a canonical form, and then summarize the parts of the system dynamics that are different from the canonical form as generalized disturbance and perform compensation on it [20]. Therefore, LADRC can tolerate all uncertainties exceptionally well [28].
Considering the first-order controlled plant represented by Equation (7), the corresponding conventional LADRC consists of the following two parts, as shown in Figure 3:
  • LESO is mainly used to solve the critical problem of generalized disturbance esti-mation in controlled systems. Furthermore, LESO possesses good adaptability and robustness to a certain range of plants [29].
  • The linear state error feedback (LSEF) control law is constructed to compensate for the estimated disturbance z 2 by LESO, so that the controlled plant can be reduced to a canonical first-order integral. Meanwhile, a proportional controller responsible for processing the state estimation z 1 is integrated into the LSEF to improve dynamic response.
To further enhance the control performance, the cascaded LESO is implemented in the LADRC framework in this paper, which can relatively enhance the estimation accuracy of generalized disturbance. As presented in Figure 4, the residual disturbance part except z 2 is estimated by LESO2, denoted as v 2 . Then, the generalized disturbance is offset by the joint action of the two estimation signals. Besides, when the dc-link voltage is measurable, it can enter LSEF without being estimated.

3.1. Design Procedure of Cascaded LESO

Before establishing the cascaded LESO, the dynamic model (7) was reformulated into a first-order integral form with generalized disturbance,
y ˙ = f ( C ,   i g ,   w ,   t ) + b 0 u
where u and y represent the input i d * and output u d c of the plant respectively. f = ( 3 e d 2 C u d c * b 0 ) u i g C + w , denoted as the generalized disturbance. w is the unknown external disturbance. b 0 denotes the scaling factor, which transfers part of the system model deviation to the generalized disturbance, and promotes the transformation of the controlled plant to the canonical form.
According to the LESO design principle [20], the states x = [ x 1 ,   x 2 ] T = [ y ,   f ] T is defined. Therefore, Equation (8) can be re-expressed in the state space model as,
{ x ˙ = A x + B u + E f ˙ y = C x
where A = [ 0 1 0 0 ] , B = [ b 0 0 ] , E = [ 0 1 ] , C = [ 1 0 ] .
Based on the Equation (9), the conventional second-order LESO can be established as:
{ e 1 = z 1 x 1 z ˙ 1 = z 2 l 1 e 1 + b 0 u z ˙ 2 = l 2 e 1
where, z 1 and z 2 reconstruct the states of y , and f , respectively. The positive gains l 1 = 2 ω o and l 2 = ω o 2 are chosen so that the characteristic polynomial (11) is Hurwitz stable [29]:
λ ( s ) = s 2 + l 1 s + l 2 .
here, ω o is the tuning parameter of LESO, also known as observer bandwidth.
More importantly, the variable z 1 can only be considered a preliminary estimation of the generalized disturbance. The dynamic regulation of z 2 depends on the derivative of the first state, usually with faster transients. Now let us assume that the observer bandwidth ω o has been set to a relatively low value, which only guarantees an accurate estimation of the first state x 1 . With this parameter limitation, the residual value of the disturbance estimation can be substantial, resulting in the loss of control precision.
To improve the disturbance estimation ability, here z 2 is treated as the known part, and a second level LESO2 is constructed to estimate the residual disturbance x 2 z 2 ,
{ e v 1 = v 1 x 1 v ˙ 1 = v 2 l 3 e v 1 + z 2 + b 0 u v ˙ 2 = l 4 e v 1
where variables v 1 and z 1 have the same properties, and both are responsible for estimating the dynamics of the state x 1 . The variable v 2 is responsible for supplementing the residual disturbance information. In the same way, the parameters of LESO2 can be determined according to the above pole placement method as:
l 3 = l 1 ,   l 4 = l 2 .

3.2. Design Procedure of LSEF Control Law

By correctly designing the cascaded LESO and configuring the observer bandwidth ω o , the generalized disturbance in the model (8) can be captured by synthesizing z 2 and v 2 . However, for disturbance compensation, the following control law is required [29]:
u = u 0 ( z 2 + v 2 ) b 0 .
Therefore, the controlled plant is reduced to a canonical first-order integral,
y ˙ = f + u 0 ( z 2 + v 2 ) u 0
which can be effortlessly regulated by a proportional controller,
u 0 = k p ( r y )
k p indicates proportional gain; u 0 is the control quantity; and r is the dc-link voltage reference input.
Furthermore, substituting Equation (16) into Equation (15) yields a first-order closed-loop transfer function,
G c l = k p s + k p = 1 1 + s k p
where k p = ω c is referred to as controller bandwidth.
With the cooperation of the cascaded LESO and LSEF control law, the voltage loop control block diagram using the modified LADRC is presented in Figure 5.

3.3. Parameters Tuning

There are three parameters used in the performance test of the improved LADRC: (1) scaling factor b 0 ; (2) observer bandwidth ω o ; and (3) controller bandwidth ω c . Generally, the observer bandwidth is determined by seeking a tradeoff between states estimation accuracy and noise immunity, while the controller band-width is chosen according to the required settling time [3].
The detailed parameter tuning process is conducted as follows:
  • First, for the plant whose model is known, b 0 should be consistent with the model information. In this paper, b 0 = 3 e d 2 C u d c * . If the plant model is complex and difficult to build, a smaller b 0 should be selected and gradually increased to test the effect.
  • Then, both ω o and ω c incrementally increase from small values until the dc-link voltage can meet the basic control requirements.
  • Finally, regulate ω o and ω c in a small range to balance disturbance attenuation and measurement noise rejection.
For engineering applications, a common rule of thumb is to choose ω o = 3 5 ω c [20].

4. Characteristic Analysis of Modified LADRC

To evaluate the control properties of the modified LADRC, s -domain transformation was performed on the above expressions, and equivalent transfer functions were derived using linear system theory.

4.1. Evaluation of Disturbance Estimation Performance

By applying the Laplace transform to Equations (10) and (12), the transfer functions of conventional LESO, and cascaded LESO, for estimating generalized disturbances, can be derived respectively:
z 2 ( s ) x 2 ( s ) = ω o 2 ( s + ω o ) 2
z 2 ( s ) + v 2 ( s ) x 2 ( s ) = ω o 2 ( 2 s 2 + 4 ω o s + ω o 2 ) ( s + ω o ) 4 .
The Bode plots of Equations (18) and (19) are depicted in Figure 6, with ω o = 10   rad / s .
It can be seen that the conventional LESO and the cascaded LESO behave like a low-pass filter, and the disturbance composed of low-frequency components can be estimated well. However, the cascaded LESO enables a higher magnitude in the middle and high frequency range, implying stronger disturbance estimation performance. Also, the phase lag in the process of disturbance estimation is also compensated.
In view of Equations (18) and (19), the expressions of LESO and cascaded LESO regarding the disturbance estimation error can be derived as:
z 2 ( s ) x 2 ( s ) x 2 ( s ) = s ( s + 2 ω o ) ( s + ω o ) 2
z 2 ( s ) + v 2 ( s ) x 2 ( s ) x 2 ( s ) = s 2 ( s + 2 ω o ) 2 ( s + ω o ) 4 .
According to Equations (20) and (21), it is obvious that both LESO and cascaded LESO can estimate typical step disturbances without generating steady-state errors. However, when the disturbance is a ramp signal with the slope k , the conventional LESO inevitably has a steady-state offset of 2 k / ω o , while the cascaded LESO can still achieve error-free estimation.
Figure 7a depicts the above-mentioned time-domain behavior of LESO and cas-caded LESO, where the generalized disturbance is a ramp signal with k = 10 , and the observer bandwidth ω o increases from 10 to 50 rad/s, stepped by 10 rad/s. Furthermore, when the observer bandwidth is fixed at 10 rad/s and k increases from 10 in steps of 2, the variation curve of the disturbance estimation error is presented in Figure 7b.
It can be seen that regardless of the conventional LESO or the cascaded LESO, the observer bandwidth ω o plays a remarkable role in the disturbance estimation process. The larger ω o , the stronger the disturbance estimation performance. Interestingly, when the generalized disturbance contains slope properties, a relatively higher estimation accuracy can be performed by cascaded LESO.

4.2. Evaluation of Disturbance Rejection Performance

For building a controller, the original intention should be to enhance the robustness to undesired disturbances. Therefore, the disturbance rejection performance of the modified LADRC is quantitatively analyzed in this subsection.
By using the Laplace transform to Equations (10), (12), (14) and (16), the modified LADRC-based voltage loop can be simplified to the two-degree-of-freedom (2dof) closed-loop system, as presented in Figure 8.
In the figure, H ( s ) and C ( s ) can be considered as set-point filter and feedback controller respectively, and their expressions are given by,
C ( s ) = C n 1 s 4 + C n 2 s 3 + C n 3 s 2 + C n 4 s + C n 5 b 0 s 2 ( s + 2 ω o ) 2
H ( s ) = ω c ( s + ω o ) 4 C n 1 s 4 + C n 2 s 3 + C n 3 s 2 + C n 4 s + C n 5
where:
C n 1 = ω c ,   C n 2 = 4 ω c ω o + 2 ω o 2 ,   C n 3 = ω o 2 ( 6 ω c + 4 ω o ) ,   C n 4 = ω o 3 ( 4 ω c + ω o ) ,   C n 5 = ω c ω o 4
Therefore, the voltage outer loop control block diagram presented in Figure 5 can be simplified to a standard structure with feedback channel and controlled plant. If the dc-link model is represented by Equation (8), the system output transfer function, concerning the reference input and generalized disturbance, can be readily derived, as follows:
u d c = b 0 H ( s ) C ( s ) s + b 0 C ( s ) u d c * + 1 s + b 0 C ( s ) f   = ω c s + ω c u d c * + s 2 ( s + 2 ω o ) 2 ( s + ω c ) ( s + ω o ) 4 f
Obviously, if the generalized disturbance is compensated by the control law, Equation (24) is simplified to Equation (17), which means that a fast response without overshoot can be achieved by adjusting ω c .
The Bode plots of the disturbance term are depicted in Figure 9, where the dis-turbance rejection performance of the conventional LADRC and the modified one are comparatively presented. If the frequency is lower than 30 rad/s, the modified LADRC exhibits much smaller magnitude than the conventional one. A stronger disturbance tolerance performance is achieved by modified LADRC. Figure 10 portrays the Bode plots of the modified LADRC disturbance term under different bandwidths. The magnitude is decreased gradually with the increase of ω o or ω c . It means that the higher the determined bandwidth, the stronger the robustness of the grid-connected inverter. However, ω o and ω c cannot be blindly chosen too large, which will cause the overall control performance of the system to deviate from the desired goal.

5. Experimental Results and Discussion

To further verify the correctness of the theoretical analysis, a 3 kW PV grid-connected experimental system was established as shown in Figure 11, which is mainly composed of PV arrays, dc combiner box, inverter cabinet, grid-connected switch and grid emulator. The dc combiner box can prevent line failures by reducing the wiring between the PV array and the inverter. The built-in filter in the grid emulator is responsible for the grid-connected current power quality and harmonic requirements. In addition, the system parameters, used in this study, and the technical indicators of PV arrays under standard test conditions (STC), are listed in Table 1 and Table 2, respectively.
For fair comparison, conventional LADRC and modified LADRC are configured with the same parameters, which are chosen by compromising the states estimation speed, noise sensitivity, and dynamic performance, namely, ω o = 220   r a d / s , ω c = 70   r a d / s . Then, all control algorithms are implemented by using a 32-bit TMS320F28335 digital signal processor.

5.1. Tracking Performance Analysis

To investigate the tracking performance of the two control strategies, a comparative experiment was carried out between the conventional LADRC and the modified one. The time-domain behavior of the dc-link voltage and d-axis current during the startup process are presented in Figure 12 and Figure 13. It can be observed that under the modified LADRC scheme, the voltage overshoot is relatively reduced by about 13 V, and the settling time is shortened by 30 ms. This is because the negative disturbance effect of the modified LADRC is relatively small, forcing the system to behave closer to Equation (17).
Furthermore, the effective control of the voltage loop can provide a high-quality reference command for the d-axis current. On this basis, the d-axis current based on the modified LADRC can reach a stable operating state within 30 ms, while the conventional LADRC requires 60 ms. Therefore, the modified LADRC has better tracking performance for the set point, which is attributed to the better disturbance estimation ability of the cascaded LESO.

5.2. Robustness Analysis under Solar Irradiance Variations

This test is implemented to analyze and evaluate the robustness of conventional LADRC and modified one under step solar irradiance variations. The characteristics of the PV array determine that its output dc voltage is positively correlated with solar irradiance. As shown in Figure 14, when the solar irradiance drops from 1000 W/m2 to 850 W/m2 at time t = 1.1 s, the modified LADRC reduces the voltage undershoot of 20 V compared with the conventional LADRC, and shortens the recovery time of 20 ms. Similarly, when the solar irradiance is increased from 850 W/m2 to 1000 W/m2 at time t = 1.4 s, the modified LADRC-based voltage control system exhibits a high level of robustness to irradiance disturbances, with a voltage fluctuation of 22 V and a recovery time of 20 ms.
Figure 14 also illustrates the dynamic response of the dq-axis current and the grid phase current i a . Under modified LADRC, the recovery time of i d is about 40 ms, while that of conventional LADRC reaches 70 ms. This means that after the irradiance is disturbed, the inverter using the modified LADRC can inject energy into the grid as active power more quickly, achieving unity power factor control. The above analysis can also be verified in the time domain behavior of the grid phase current i a . In the grid-connected system where the modified LADRC is used in the voltage outer loop, the grid phase current i a can be restored to a steady-state 30 ms earlier.

5.3. Robustness Analysis under Module Temperature Variations

Figure 15 describes the system response of different control strategies under module temperature variations, where the module temperature rises from 25   ° C to 50   ° C , and returns to the original command again after 300 ms. It can be observed that, when the module temperature variations, both control strategies can guarantee the stability of the dc-link voltage.
Compared with the conventional LADRC, the inverter based on modified LADRC exhibits a maximum voltage change of 12 V and a recovery time of 40 ms, fulfilling the faster dynamic response and stronger robustness. Meanwhile, by observing the time-domain behavior of the dq-axis current, the modified LADRC performs better, in terms of recovery time and transient fluctuations, due to the relatively fast and accurate disturbances estimation, achieved by the cascaded LESO. For the grid phase current i a , a similar performance is shown in the conventional LADRC and modified one, which can be attributed to the rapidity of the current loop dynamics and the insensitivity of the PV grid-connected system to temperature disturbances.

5.4. Robustness Analysis under Power Grid Voltage Sags

Considering grid codes [12,30], the PV system should support the dc-link voltage stability during different grid disturbances, especially the voltage sags, caused by short-circuit faults. As presented in Figure 16, the PV grid-connected system experimented with symmetrical voltage sag of 10% and 20% during the 500 ms period. As can be observed in this figure, dc-link voltage and other variables gradually return to the operating point of the system before the grid disturbance. However, the PV grid-connected inverter, based on modified LADRC, shows a stronger robustness in dealing with grid voltage sags, which can be described as smaller dc-link voltage fluctuations and shorter transient recovery time, in comparison with the plant employing the conventional LADRC.
In short, the modified LADRC shows better performance in disturbance rejection, which can be attributed to the superior disturbance estimation ability of cascaded LESO.

6. Conclusions

In this paper, a modified LADRC strategy with cascaded LESO is implemented in the dc link to enhance the dc-link voltage control performance. The second-level LESO can supplement the unestimated residual disturbance information for the first-level LESO, which is conducive to the feedback law for more adequate disturbance compensation. The transient fluctuation problem of the dc link under active power disturbance is analyzed, and the equivalent plant model of the voltage control loop is simplified. From the perspective of time domain and frequency domain analysis, it is demonstrated that the modified LADRC enable stronger disturbance estimation and rejection capabilities than conventional one. Finally, the experimental results prove that the control system, based on the modified LADRC, enables stronger robustness and control dynamics no matter the starting process or under the condition of multi-source disturbance. The reason is that cascaded LESO can achieve faster and more accurate generalized disturbance estimation, thereby reducing the negative effects caused by unpredictable disturbances.
A large number of studies have shown that a class of emerging algorithms such as sliding mode control, fuzzy control and predictive control can also provide similar strong robustness when combined with ESO. ESO is mainly responsible for estimating the defined generalized disturbance. The idea of cascaded LESO, presented in this paper, is also applicable to other nonlinear observers, with the aim of improving the performance of disturbance estimation. Therefore, the combination of cascaded LESO (or ESO), and the above-mentioned control algorithm, deserves more attention from engineers in future work.

Author Contributions

Conceptualization, X.Z. and Q.L.; methodology, Q.L. and W.L.; software, Q.L. and B.X.; validation, Y.M., Q.L. and B.X.; formal analysis, Q.L., X.Z. and B.X.; investigation, W.L. and Y.M.; writing—original draft preparation, Q.L.; writing—review and editing, Q.L.; visualization, X.Z.; supervision, B.X. and Q.L.; funding acquisition, X.Z. All authors have read and agreed to the published version of the manuscript.

Funding

This work was funded by National Natural Science foundation of China (NO. 51877152) and Natural Science Foundation of Tianjin of China (NO. 18JCZDJC97300).

Data Availability Statement

The data presented in this study are available on request from the corresponding author. The data are not publicly available due to private reasons.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Configuration and power flow of two-stage PV grid-connected system, where C denotes the dc-link capacitor; u d c denotes the dc-link voltage; i s is the output current of the boost converter; i d c is the current flowing through the dc-link capacitor; i g is the current input to the inverter by the dc link; i a , i b , i c , represent the grid phase current; e a , e b , e c represent the phase voltage of the grid; R and L represent the filter resistance, and inductance, respectively.
Figure 1. Configuration and power flow of two-stage PV grid-connected system, where C denotes the dc-link capacitor; u d c denotes the dc-link voltage; i s is the output current of the boost converter; i d c is the current flowing through the dc-link capacitor; i g is the current input to the inverter by the dc link; i a , i b , i c , represent the grid phase current; e a , e b , e c represent the phase voltage of the grid; R and L represent the filter resistance, and inductance, respectively.
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Figure 2. Schematic diagram of dual-loop control commonly used in grid-connected inverters.
Figure 2. Schematic diagram of dual-loop control commonly used in grid-connected inverters.
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Figure 3. The structure diagram of the conventional LADRC, where z 2 provides a preliminary estimate of the generalized disturbance.
Figure 3. The structure diagram of the conventional LADRC, where z 2 provides a preliminary estimate of the generalized disturbance.
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Figure 4. The structure diagram of the modified LADRC, where z 2 + v 2 is jointly responsible for estimating generalized disturbance.
Figure 4. The structure diagram of the modified LADRC, where z 2 + v 2 is jointly responsible for estimating generalized disturbance.
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Figure 5. The voltage loop control block diagram based on modified LADRC, in which the dc link plant with complex nonlinear characteristics is compensated as a canonical first-order pure integral.
Figure 5. The voltage loop control block diagram based on modified LADRC, in which the dc link plant with complex nonlinear characteristics is compensated as a canonical first-order pure integral.
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Figure 6. Comparison of disturbance estimation performance between conventional ESO and cascaded LESO.
Figure 6. Comparison of disturbance estimation performance between conventional ESO and cascaded LESO.
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Figure 7. Estimation error of slope disturbance between conventional LADRC and modified LADRC: (a) Different observer bandwidth ω o ; (b) Different slope k .
Figure 7. Estimation error of slope disturbance between conventional LADRC and modified LADRC: (a) Different observer bandwidth ω o ; (b) Different slope k .
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Figure 8. 2dof closed-loop diagram of modified LADRC-based voltage control system.
Figure 8. 2dof closed-loop diagram of modified LADRC-based voltage control system.
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Figure 9. Comparison of disturbance rejection performance between conventional LADRC and modified one.
Figure 9. Comparison of disturbance rejection performance between conventional LADRC and modified one.
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Figure 10. Disturbance rejection performance under different bandwidths: (a) ω c is fixed at 10 rad/s; (b) ω o is fixed at 10 rad/s.
Figure 10. Disturbance rejection performance under different bandwidths: (a) ω c is fixed at 10 rad/s; (b) ω o is fixed at 10 rad/s.
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Figure 11. Experiment platform.
Figure 11. Experiment platform.
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Figure 12. Comparison of dc-link voltage tracking performance under stationary operating conditions ( irradiance   S   =   1000   W / m 2 ,   module   temperature   T   =   25   ° C ) .
Figure 12. Comparison of dc-link voltage tracking performance under stationary operating conditions ( irradiance   S   =   1000   W / m 2 ,   module   temperature   T   =   25   ° C ) .
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Figure 13. Comparison of d-axis current tracking performance under stationary operating conditions ( irradiance   S   =   1000   W / m 2 ,   module   temperature   T   =   25   ° C ) .
Figure 13. Comparison of d-axis current tracking performance under stationary operating conditions ( irradiance   S   =   1000   W / m 2 ,   module   temperature   T   =   25   ° C ) .
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Figure 14. Robustness comparison under solar radiation variations.
Figure 14. Robustness comparison under solar radiation variations.
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Figure 15. Robustness comparison under module temperature variations.
Figure 15. Robustness comparison under module temperature variations.
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Figure 16. Robustness comparison under grid voltage sags: (a) 10% voltage sag on grid; (b) 20% voltage sag on grid.
Figure 16. Robustness comparison under grid voltage sags: (a) 10% voltage sag on grid; (b) 20% voltage sag on grid.
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Table 1. Experimental system parameters.
Table 1. Experimental system parameters.
DescriptionsValues
Grid simulator frequency50 Hz
Switching frequency6 kHz
Nominal dc-link voltage700 V
DC-link capacitance2200 µF
Filter resistance0.1 Ω
Filter inductor10 mH
Grid phase voltage311 V (RMS)
DC-link capacitance2200 µF
Table 2. Technical parameters of PV arrays.
Table 2. Technical parameters of PV arrays.
DescriptionsValues
Open-circuit voltage36.5 V
Short-circuit current9.1 A
Operating temperature−40 °C~85 °C
Maximum output power245 W
Maximum power point current8.42 A
Maximum power point voltage29.1 V
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Zhou, X.; Liu, Q.; Ma, Y.; Li, W.; Xie, B. A Modified LADRC-Based DC-Link Voltage Controller for Photovoltaic Grid-Connected Inverters. Electronics 2021, 10, 877. https://doi.org/10.3390/electronics10080877

AMA Style

Zhou X, Liu Q, Ma Y, Li W, Xie B. A Modified LADRC-Based DC-Link Voltage Controller for Photovoltaic Grid-Connected Inverters. Electronics. 2021; 10(8):877. https://doi.org/10.3390/electronics10080877

Chicago/Turabian Style

Zhou, Xuesong, Qian Liu, Youjie Ma, Wei Li, and Bingjie Xie. 2021. "A Modified LADRC-Based DC-Link Voltage Controller for Photovoltaic Grid-Connected Inverters" Electronics 10, no. 8: 877. https://doi.org/10.3390/electronics10080877

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