# Design of a Wideband Doherty Power Amplifier with High Efficiency for 5G Application

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## Abstract

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## 1. Introduction

## 2. Doherty Power Amplifier Design

#### 2.1. Device Analysis

#### 2.2. Output Matching Network Design

#### 2.3. Input Matching Network Design

#### 2.4. Stability Analysis

## 3. Simulated DPA Performance

## 4. Measurements Results

## 5. Conclusions

## Author Contributions

## Funding

## Data Availability Statement

## Conflicts of Interest

## References

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**Figure 3.**Cut−off (

**a**) and maximum (

**b**) frequency of the CGH40010F versus ${V}_{\mathrm{GS}}$ and ${V}_{\mathrm{DS}}$.

**Figure 4.**(

**a**) Load-pull contours for the drain efficiency (blue) and output power (red) at 3.3 GHz and (

**b**) optimum output impedance at saturation and Output power Back-Off (OBO). DE, Drain Efficiency.

**Figure 5.**(

**a**) Block diagram of the output matching networks. (

**b**) Variation of the ${Z}_{\mathrm{M}1\mathrm{B}}$ versus f (from 2.8 GHz to 3.6 GHz) and ${X}_{\mathrm{Aux}}$ (from 40 $\Omega $ to 500 $\Omega $) when the auxiliary power amplifier (PA) is OFF.

**Figure 6.**(

**a**) Output matching network of the main (dimensions (width/length) are in mm) and (

**b**) input reflection coefficient when port 1 is normalized with respect to $2{R}_{\mathrm{opt}}$ for different load impedance at the break point.

**Figure 8.**(

**a**) Layout of the splitter (dimension: width/length (mm)). (

**b**) Performance versus frequency.

**Figure 9.**Implementation of the stability test on the Doherty power amplifier. IIN, Impedance Inverting Network.

**Figure 10.**Nyquist plot of the open-loop function for the proposed Doherty power amplifier (DPA) from 100 MHz to 6 GHz.

**Figure 12.**(

**a**) Two-tone power sweep simulation at 3.3 GHz. (

**b**) Simulated input and output power spectrum at 3.3 GHz for the average output power of 36 dBm. IMD, Intermodulation Distortion.

**Figure 14.**Simulated (dashed) and measured (solid) scattering parameters of the proposed DPA (

**a**) $\mathrm{S}(2,1)$, (

**b**) $\mathrm{S}(1,1)$, and (

**c**) $\mathrm{S}(2,2)$.

**Figure 16.**Comparison of simulated (solid) and measured (dashed) large signal performance versus frequency: (

**a**) saturated output power and (

**b**) drain efficiency and (

**c**) gain at saturation and 6 dB back-off.

Ref. | Freq. (GHz) | Pout (dBm) | DE Sat. (%) | DE OBO (%) | Gain (dB) |
---|---|---|---|---|---|

[4] | 1.7–2.2 | 42.5 | 58–72 | 48–55 | 8.2–10.2 |

[9] | 2.9–3.3 | 43.9–44.7 | 70 | 40.6–44.2 | 6–11 |

[11] | 1.4–2.4 | 41.8–43.5 | 47.5–64.2 | 35.5–52 | 6–13 |

[12] | 2.2–2.6 | 43–44 | 60–65 | 45–53 | 6–10 |

[13] | 3–3.6 | 43–44 | 55–66 | 38–56 | 12 |

[31] | 2.2–3 | 40.2–41.2 | 52–68 | 30–53 | 6–10 |

[32] | 1.5–3.8 | 42.3–43.4 | 42–63 | 33–55 | 10–13.8 |

This Work | 2.8–3.6 | 43–44.2 | 62–76.5 | 44–56 | 8–13.5 |

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**MDPI and ACS Style**

Nasri, A.; Estebsari, M.; Toofan, S.; Piacibello, A.; Pirola, M.; Camarchia, V.; Ramella, C.
Design of a Wideband Doherty Power Amplifier with High Efficiency for 5G Application. *Electronics* **2021**, *10*, 873.
https://doi.org/10.3390/electronics10080873

**AMA Style**

Nasri A, Estebsari M, Toofan S, Piacibello A, Pirola M, Camarchia V, Ramella C.
Design of a Wideband Doherty Power Amplifier with High Efficiency for 5G Application. *Electronics*. 2021; 10(8):873.
https://doi.org/10.3390/electronics10080873

**Chicago/Turabian Style**

Nasri, Abbas, Motahhareh Estebsari, Siroos Toofan, Anna Piacibello, Marco Pirola, Vittorio Camarchia, and Chiara Ramella.
2021. "Design of a Wideband Doherty Power Amplifier with High Efficiency for 5G Application" *Electronics* 10, no. 8: 873.
https://doi.org/10.3390/electronics10080873