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Article

Input-Series-Output-Parallel DC Transformer Impedance Modeling and Phase Reshaping for Rapid Stabilization of MVDC Distribution Systems

1
College of Automation and Electronic Engineering, Qingdao University of Science and Technology, Qingdao 266061, China
2
School of Electrical Engineering, Chongqing University, Chongqing 400000, China
*
Author to whom correspondence should be addressed.
Electronics 2021, 10(24), 3163; https://doi.org/10.3390/electronics10243163
Submission received: 25 November 2021 / Revised: 13 December 2021 / Accepted: 14 December 2021 / Published: 18 December 2021

Abstract

:
This paper focuses on the instability problem of the medium-voltage DC (MVDC) distribution system and proposes an impedance phase reshaping (IPR) method. To obtain the load impedance model of the MVDC distribution system, the input impedance of the input-series-output-parallel (ISOP) DC transformer (DCT) is derived by the generalized average modeling (GAM). Based on the obtained model, the traditional ISOP DCT controller optimization (IDCO) approach is discussed and the IPR method is developed. An impedance phase controller is introduced based on the original control method. According to the optimized impedance stability criterion, the parameters of the impedance phase controller are determined. Compared with the IDCO approach, the proposed method weakens the negative resistance characteristic of the load impedance at the resonant frequency. Therefore, the MV bus voltage oscillation is rapidly mitigated. Besides, the dynamic performance of the system using the IPR method can be classified as good. The simulation results show that the mathematical model is correct, and the proposed method is effective for the rapid stabilization of MVDC distribution systems.

1. Introduction

The medium-voltage DC (MVDC) distribution system has become the trend of the future energy internet power distribution due to the beneficial attributes, such as its flexibility and efficiency [1,2,3]. An MVDC grid was designed for the interconnection of high-power test benches at a university campus [4]. Furthermore, the MVDC power distribution has been widely applied in railway electrification systems and marine electrical distribution systems [5,6,7,8,9,10].
A typical DC distribution system is shown in Figure 1. The DC transformer (DCT) plays a prominent role in the modern MVDC distribution system. As the key device, it connects the MVDC bus and the low-voltage DC (LVDC) bus. Given the voltage stress of the switching devices, the inputs-series-output-parallel (ISOP) topology of several DC/DC converter modules has been introduced. For the ISOP DCT, the dual-active bridge (DAB) converter is a more suitable submodule than other converters, such as the bidirectional half-bridge converter and the series resonant converter [11,12]. In addition, an input voltage sharing (IVS) control strategy has been presented to ensure the power sharing of the ISOP DCT [13,14]. However, a tightly regulated converter behaves as a constant power load (CPL) [15,16,17,18], which exhibits a negative resistance characteristic and may destabilize the system. When a regulated ISOP DCT is connected to a power electronic converter or an inductive circuit as shown in Figure 1, the stability of the MVDC distribution system may become corrupted and substantial oscillations would occur. Besides, it has been confirmed that the system behaves in an unstable way with the increase of the source-side inductance [19,20,21]. Consequently, an impedance-based stability analysis for the ISOP DCT is essential to guarantee the stability of the MVDC distribution system.
The prerequisite for the impedance-based stability analysis is to develop the impedance model of the system, including the source impedance and the load impedance. Based on the model, the stability of the system can be analyzed by the impedance stability criterion.
Several theoretical modeling techniques have been proposed to obtain an impedance model. Taking the first harmonic approximation into consideration, the generalized average modeling (GAM) [22,23,24] is more accurate than the reduced-order modeling [25] for the DAB converter. Based on the impedance model, Middlebrook et al. discussed the stability criterion for voltage regulated DC/DC converters [26], and Sun et al. studied the stability criterion for grid-connected inverters [27]. The ratio of the source impedance and the load impedance is known as the minor loop gain, and the whole system is stable if it satisfies the Nyquist Criterion [28]. Moreover, various stability criteria have been proposed by defining the constraint boundary of the minor loop gain [29,30]. Riccobono et al. [31] presented a Passivity-Based Stability Criterion (PBSC), which increases the phase of the system total impedance up to 0° at the resonant frequency. Hence, the impedance becomes passive to guarantee the bus stability [32,33].
According to the above-mentioned stability criteria, the system stability can be improved by reshaping the impedance. Feng et al. [34] introduced two control methods to modify the impedance by building a virtual impedance connected in parallel or series with the input impedance of the DAB converter. There was no intersection of the impedance amplitude by increasing the input impedance amplitude. In [35], a resonance term was applied to dampen the bus impedance. However, this approach only relies on the source impedance and ignores the influence of the load impedance. Compared with the impedance amplitude reshaping, the phase modification takes into account that the amplitude must intersect. Zhang et al. [36] proposed a parallel virtual impedance (PVI) and a series virtual impedance (SVI) control strategy to modify the load impedance phase at a small range of frequency. According to the approaches introduced in [36], Feng et al. [37] analyzed the stability improvement of the system via the controller optimization. Meanwhile, an impedance shaping regulator has been proposed to reshape the impedance phase. Although they both enhance the stability of the DAB-based energy storage systems, the impedance shaping regulator has better dynamic responses than the optimized method of the DAB controller. The system with the optimized DAB controller requires minimum cost. Moreover, Guan et al. [38] proposed a three-closed-loop control strategy to reshape the input impedance of the DAB converter. On the basis of the control method introduced in [38], Wang et al. [39] investigated a triple-close-loop IVS control strategy, which improved the dynamic and steady-state performance of the ISOP DCT. However, the strategy has drawbacks with complicated parameter calculation and extra design steps.
This paper proposes an impedance phase reshaping (IPR) method, the load impedance model is obtained by the GAM method, and the impedance phase is modified for the MVDC distribution system rapid stabilization.
This paper presents the following major contributions.
(1)
Establish a GAM input impedance model for the ISOP DCT. The obtained model is accurate and programmable, which provides a theoretical basis for the stability analysis.
(2)
Propose an IPR method to modify the impedance phase, which weakens the negative resistance characteristic of the ISOP DCT. The ISOP DCT controller optimization (IDCO) method is investigated. Compared with the IDCO method, the proposed approach mitigates the MV bus voltage oscillation rapidly and improves the voltage quality of the ISOP DCT.
The paper is organized as follows. Section 2 introduces the configuration of the MVDC Distribution System, and the GAM input impedance model of the ISOP DCT is established as the load impedance. Section 3 describes the IDCO method. Section 4 discusses the proposed IPR method. Section 5 displays the simulation analysis results. Section 6 summarizes the major outcomes of this paper and its possible future extensions.

2. Impedance Modeling of the MVDC Distribution System

2.1. Configuration of the MVDC Distribution System

The MVDC distribution system includes the DC grid, the ISOP DCT, and the load. The structure of the MVDC distribution system is shown in Figure 2.
R L is the load impedance. u M and u L are the MVDC and the LVDC bus voltage, respectively. Meanwhile, u L is the voltage of the output capacitance C o . In the DC grid, V g is the DC grid voltage, L g is the transmission line inductance. In the ISOP DCT, C o is the output capacitance, n (n ∈ N+, N+ is a set of positive integers) is the number of the DAB modules of the ISOP DCT. In the i-th (i = 1, 2 … n) DAB module, H 1 and H 2 are the rectifier and the inverter full bridges respectively. S 1 S 8 are the switches of the bridge arms. i L is the current of L s . C i n i is the input capacitance. K is the turns ratio of the high-frequency transformer. L s is the leakage inductance of the high-frequency transformer and resonant inductance. u i n i and i p are the primary side voltage and current, respectively. Moreover, u M = i = 1 n u i n i .
In addition, the control block diagram of the ISOP DCT is descripted in Figure 3. The input voltage sharing (IVS) control strategy of the ISOP DCT is illustrated in Figure 3. It consists of an output voltage controller G u L and n − 1 input voltage sharing controllers G u M . u M * and u L * are the MV and the LV bus voltage, respectively. The commonly used single phase shift (SPS) method is adopted in this paper. d L is the basic phase shift ratio of each DAB module and is generated by the output voltage controller G u L . d i n i (i = 1, 2 … n) is the compensation in phase shift ratio of the i-th DAB module, which is generated by the input voltage sharing controller G u M . d i (i = 1, 2 … n) is the phase shift ratio.
As can be seen from Figure 3, the phase shift ratio d i (i = 1, 2 … n) is the difference between the two items, which can be expressed as
d i = d L d i n i ,
Moreover, the decoupling condition of the basic phase shift ratio d L and the compensation in phase shift ratio d i n i (i = 1, 2 … n − 1) is defined as follows:
d i n n = i = 1 n 1 d i n i ,
where d i n n is the compensation in the phase shift ratio of the n-th DAB module.
Based on (2), the controllers of the ISOP DCT can be decoupled from each other. The phase shift ratio d i (i = 1, 2 … n) is a constant value when power sharing is achieved. Thus, assuming that the phase shift ratio d i = d (i = 1, 2 … n), then the load impedance modeling for the MVDC distribution system is as follows.

2.2. Generalized Average Modeling of the ISOP DCT

The load impedance model Z L ( s ) of the MVDC distribution system, i.e., the GAM input impedance model of the ISOP DCT is established in this section. The voltage u L of the output capacitance C o and the current i L of the inductance L s are selected as the state variables. Thus, the state equation of the ISOP DCT can be expressed as
{ d i L d t = s 1 n L s u M K s 2 L s u L , d u L d t = K n s 2 C o i L 1 C o u L R L ,
where s 1 and s 2 are the switching functions of the bridge H 1 and H 2 in the DAB converter, respectively.
Besides, the primary side current i p and the LV bus voltage u L are selected as the output variables. The output equation of the ISOP DCT can be given as
{ i p = s 1 i L , u L = u L .
Equations (3) and (4) are based heavily on the model in [22]. More detailed derivation of the state equation, output equation and switching functions s 1 and s 2 may be found therein.
Due to the pure alternating current characteristic of the inductor current i L , the state-variable vector x is expressed as
x = [ < u L > 0 < i L > 1 R < i L > 1 I ] T ,
where < u L > 0 denotes the zeroth coefficient in the Fourier series of u L . < i L > 1 R and < i L > 1 I denote the real part and imaginary part of the 1st coefficient in the Fourier series of i L , respectively.
Similarly, the output vector y can be expressed as
y = [ i p u L ] T .
Substitute (5) into (3) and (4) and apply the small perturbation to d, u i n i and the state variables at the steady-state operation point. After linearization, the small-signal matrix equation is given as
{ x ^ ˙ = A x ^ + B u ^ , y ^ = C x ^ + D u ^ ,
where A, B, C and D are the constant matrixs. u is the input vector. x ^ and u ^ represent the small signal value of the state-variable vector x and the input vector u , respectively. x ^ ˙ is the derivative of x ^ . y ^ is the small signal value of the output vector y.
x ^ = [ < u ^ L > 0 < i ^ L > 1 R < i ^ L > 1 I ] ,
y ^ = [ i ^ p u ^ L ] ,
u ^ = [ u ^ i n i d ^ ] ,
A = [ 1 R C o 4 K n sin ( d π ) π C o 4 K n cos ( d π ) π C o 2 K sin ( d π ) π L s 0 ω s 2 K cos ( d π ) π L s ω s 0 ] ,
B = [ 0 4 K n < i L > 1 R   cos ( d π ) C o + 4 K n < i L > 1 I   sin ( d π ) C o 0 2 K < u L > 0   cos ( d π ) L s 2 π L s 2 K < u L > 0   sin ( d π ) L s ] ,
C = [ 0 0 4 π 1 0 0 ] ,
D = 0 ,
where ω s = 2 π f s and f s is the switching frequency of the ISOP DCT. < u ^ L > 0 , < i ^ L > 1 R , < i ^ L > 1 I , i ^ p , u ^ L , u ^ i n i and d ^ are the small signal values of < u L > 0 , < i L > 1 R , < i L > 1 I , i p , u L , u i n i and d respectively.
Thus, combining (7)–(14), the open-loop transfer functions Y o p ( s ) , G i p d ( s ) , G u L u i n i ( s ) and G u L d ( s ) can be defined as
[ i ^ p u ^ L ] = [ Y o p ( s ) G i p d ( s ) G u L u i n i ( s ) G u L d ( s ) ] [ u ^ i n i d ^ ] .
where Y o p ( s ) is the transfer function from i ^ p to u ^ i n i , G i p d ( s ) is the transfer function from i ^ p to d ^ , G u L u i n i ( s ) is the transfer function from u ^ L to u ^ i n i and G u L d ( s ) is the transfer function from u ^ L to d ^ respectively.
According to (15) and Figure 3, the small-signal block diagram of the i-th (i = 1, 2 … n − 1) DAB module is shown in Figure 4. u ^ L * is the small-signal value of the LVDC bus reference voltage. u ^ i n i * is the small-signal value of the primary side reference voltage of the i-th (i = 1, 2 … n − 1) DAB module.
As can be seen from Figure 4, u ^ L * and u ^ i n i * are zero. Given the input capacitance Cini of the i-th (i = 1, 2 … n) DAB converter, the close-loop input admittance Y L _ n 1 ( s ) for these n − 1 DAB modules is obtained as follows:
Y L _ n 1 ( s ) = i = 1 n 1 [ Y o p ( s ) + Y c i ( s ) G u L u i n i ( s ) G u L ( s ) G i p d ( s ) 1 + G u L ( s ) G u L d ( s ) + G u M ( s ) G i p d ( s ) 1 + G u L ( s ) G u L d ( s ) ] ,
where Yci (s) is the admittance of the capacitance Cini.
Similarly, the small-signal block diagram of the n-th DAB module is shown in Figure 5.
From Figure 5, we can see that the compensation in phase shift ratio d i n n for the n-th DAB converter is different from d i n i (i = 1, 2 … n − 1) for the i-th DAB converter as shown in Figure 4, which is caused by the decoupling condition expressed in (2). Based on the control block diagram, the close-loop input admittance YL_n(s) of the n-th DAB module is derived as follows:
Y L _ n ( s ) = Y o p ( s ) + Y c i ( s ) G u L u i n i ( s ) G u L ( s ) G i p d ( s ) 1 + G u L ( s ) G u L d ( s ) i = 1 n 1 G u M ( s ) G i p d ( s ) 1 + G u L ( s ) G u L d ( s ) .
The input impedance of the ISOP DCT is the sum of the input impedance for these n DAB modules. By adding (16) and (17), the admittance term i = 1 n 1 G u M ( s ) G i p d ( s ) 1 + G u L ( s ) G u L d ( s ) could be eliminated. The impedance generated by the input voltage sharing control is zero. Hence, the input impedance of the ISOP DCT, i.e., the load impedance ZL(s) of the MVDC distribution system can be calculated by
Z L ( s ) = 1 Y L _ n 1 ( s ) + Y L _ n ( s ) = n / [ Y o p ( s ) + Y c i ( s ) G u L u i n i ( s ) G u L ( s ) G i p d ( s ) 1 + G u L ( s ) G u L d ( s ) ] .
Based on the impedance model obtained in (18), the inter connection of the sub-system for the system is shown as Figure 6. Z S ( s ) and Z L ( s ) are the source impedance and the load impedance of the MVDC distribution system, i.e., the transmission line inductance and the input impedance of the ISOP DCT, respectively. G S ( s ) and G L ( s ) are the transfer functions of the source sub-system and the load sub-system, respectively.
The cascade of the two individually stable sub-systems is shown in Figure 6, and the total input-to-output transfer function GgL(s) is.
G g L ( s ) = u L V g = G S ( s ) G L ( s ) Z L ( s ) Z S ( s ) + Z L ( s ) = G S ( s ) G L ( s ) 1 1 + T m ,
where the minor loop gain T m is defined as
T m = Z S ( s ) Z L ( s ) ,
According to (19), since G S ( s ) and G L ( s ) are stable transfer functions, the minor loop gain T m is the one responsible for the system stability. Therefore, a necessary and sufficient condition for stability of the MVDC distribution system can be obtained by applying the Nyquist Criterion to T m , i.e., the stability of the system is guaranteed if and only if the Nyquist contour of T m does not encircle the (−1, j0) point. Otherwise, the MV bus voltage oscillation would occur. The amplitude intersection f 0 in the Bode diagram of Z S ( s ) and Z L ( s ) is the oscillation frequency. Besides, the Nyquist criterion is also met by ensuring that the phase difference is less than 180°.

3. Stability Improvement via the IDCO Method

In an unstable MVDC distribution system, the original proportional coefficient and the integral coefficient of the output voltage controller are Kp0 and Ki0, respectively. Similarly, the proportional coefficient and the integral coefficient of the input voltage sharing controller are Kpi and Kii, respectively. The parameters of the system are listed in Table 1. The bode diagram of the source impedance Z S ( s ) and the load impedance Z L ( s ) are shown in Figure 6. α is the phase difference at the intersection frequency f 0 . β 0 is the phase of the load impedance Z L ( s ) at f 0 .
As can be seen from Figure 7, Z S ( s ) and Z L ( s ) intersect at f 0 = 70 Hz. β 0 = −91.5° and the phase difference α = 181.5°. According to the stability criterion, the MVDC distribution system is unstable and the oscillation frequency of the MV bus voltage is 70 Hz.
According to the analysis in Section 2, the input impedance generated by the input voltage sharing control is zero. Therefore, the input voltage sharing controller optimization can hardly affect the input impedance of the ISOP DCT.
The traditional ISOP DCT controller optimization (IDCO) method is used to optimize the output voltage controller, which ensures that the phase difference at the impedance intersection frequency f 0 is less than 180°. According to Section 2, the open-loop transfer function of the output voltage controller is G u L ( s ) G u L d ( s ) . Based on the open-loop transfer function, the optimized PI parameters of the output voltage controller can be obtained by limiting the cut-off frequency and the phase margin. The objective function and constraints of the IDCO method are expressed as
min         | arg Z S ( s , f c , P M , K p , K i ) Z L ( s , f c , P M , K p , K i ) | s = j ω 0 ,
s . t . { | Z S ( s , f c , P M , K p , K i ) / Z L ( s , f c , P M , K p , K i ) | s = j ω 0 = 1 , | arg [ Z S ( s , f c , P M , K p , K i ) / Z L ( s , f c , P M , K p , K i ) ] | s = j ω 0 < 180 ° ,   | G u L ( ω c , K p , K i ) G u L d ( ω c , K p , K i ) | = 1 , 180 ° + arg [ G u L ( ω c , K p , K i ) G u L d ( ω c , K p , K i ) ] = P M , 30 ° P M 60 ° , ω c = 2 π f c , ω 0 = 2 π f 0 ,
where f c and PM are the cut-off frequency and the phase margin for the transfer function G u L ( s ) G u L d ( s ) , respectively. Kp and Ki are the optimized proportional coefficient and optimized integral coefficient, respectively. ω c and ω 0 are the angular frequencies corresponding to f c and f 0 , respectively.
The reasonable value of PM of the control system is 30–60°. With other parameters unchanged, the larger the PM, the more stable the system. Thus, PM = 60° is selected. To investigate the influence of the output voltage controller on the system stability, eight sets of controller parameters with different cut-off frequency f c are selected. The Bode diagram of the load impedance Z L ( s ) and the Nyquist diagram of the minor loop gain T m are shown in Figure 8.
From Figure 8a, we can see that the phase of Z L ( s ) varies obviously with the change of f c at low frequency. The phase at high frequency is −90° due to the capacitance characteristic. Moreover, the phase at low frequency exhibits negative resistance characteristics and can easily cause oscillation of the MV bus voltage. The phase of Z S ( s ) is 90° as shown in Figure 7. Therefore, the impedance phase difference can be less than 180° at 70 Hz by optimizing the output controller in Figure 8a. When the cut-off frequency f c is 20 Hz or 30 Hz, the stability criterion is satisfied and the MV bus voltage is stable.
As can be seen from Figure 8b, the Nyquist contour of T m does not encircle (−1, j0) with the decrease of f c from 90 Hz to 20 Hz. Thus, the stability of the MVDC distribution system is improved with the reduction of the cut-off frequency f c . However, the bandwidth of the system relies on the cut-off frequency, which will affect the dynamic performance. To improve the dynamic performance and system stability, the cut-off frequency f c = 30 Hz is selected. The optimized output controller parameters Kp and Ki can be obtained based on (22), which are given in Table 1.

4. Proposed IPR Method

Although the traditional IDCO method improves the system stability, it is slow to respond due to the large phase margin PM and small cut-off frequency f c . To stabilize the bus voltage rapidly, an impedance phase reshaping (IPR) method is proposed, and the flowchart is shown in Figure 9.
As shown in Figure 9, the stability criterion is optimized based on Z S ( s ) and Z L ( s ) . Then, an impedance phase controller G p h ( s ) is introduced to the traditional controller. By adjusting the parameters k and f, the phase θ of load impedance could meet the optimized stability criterion. Therefore, the bus voltage oscillation is rapidly damped and the stability of the MVDC distribution system is guaranteed.

4.1. Optimization of the Stability Criterion

Since the analysis of Section 2 shows that the input impedance term generated by the input voltage sharing controllers is zero, the input voltage sharing loop transfer function G u M ( s ) can be ignored. The small-signal block diagram of the i-th (i = 1, 2 … n) DAB converter with the impedance phase controller G p h ( s ) is shown in Figure 10.
According to (18) and Figure 10, the reshaped load impedance Z L _ I P R ( s ) can be calculated by
Z L _ I P R ( s ) = n / [ Y o p ( s ) + Y c i ( s ) + G u L u i n i ( s ) G p h ( s ) G u L ( s ) G i p d ( s ) 1 + G u L ( s ) G p h ( s ) G u L d ( s ) ] .
At the intersection of the source impedance amplitude and the load impedance amplitude, the load impedance Z L _ I P R ( j ω 0 ) can be expressed as
Z L _ I P R ( j ω 0 ) = | Z L _ I P R ( j ω 0 ) | e j θ ,
where θ is the phase of load impedance at the intersection, ω 0 is the angular frequency of the intersection and ω 0 = 2 π f 0 .
The traditional stability criterion is described as
{ | Z S ( j ω 0 ) | = | Z L ( j ω 0 ) | , | arg [ Z S ( j ω 0 ) ] arg [ Z L ( j ω 0 ) ] | < 180 ° .
In the MVDC distribution system, the phase of Z S ( j ω 0 ) is 90°. According to (25), the phase of the load impedance at f 0 should be satisfied θ ∈ (−90°, 270°).
To weaken the negative resistance characteristic of the ISOP DCT, the load impedance phase interval is optimized by narrowing θ ∈ (−90°, 0°). According to (24), the optimized stability criterion can be obtained as
{ | Z L _ I P R ( s ) / Z S ( s ) | s = j ω 0 = 1 , 9 0 o < θ < 0 o .

4.2. Design for the Impedance Phase Controller

As the order of the low-pass filter increases, the phase increases by 90° gradually. In this paper, a first-order low-pass filter is used to reshape the impedance phase at the intersection. The transfer function G p h ( s ) of the impedance phase controller can be expressed as
G p h ( s ) = k ω s + ω ,
ω = 2 π f ,
where ω and f are the cut-off angular frequency and cut-off frequency of the first-order low-pass filter, respectively. k is the gain of the impedance phase controller.
In this section, the determination of k and f is discussed. The constraint condition is to ensure that the intersecting impedance phase θ satisfies the optimized stability criterion in (26), while the amplitude is rarely affected. To analyze the influence of the gain k on the stability of the MV bus voltage, the initial cut-off frequency of the low-pass filter f is 30 Hz. The system stability analysis versus the gain k and cut-off frequency f are shown in Figure 11 and Figure 12.
From Figure 11a, we can see that with the increasing of k, the impedance phase is closer to 0° at low frequency. Since the negative resistance characteristic of Z L _ I P R ( j ω 0 ) is weakened, the stability of the MVDC distribution system is improved. However, the frequency band that satisfies the optimized stability criterion in (26) is narrowed. Meanwhile, with the increasing of k, the amplitude of Z L _ I P R ( j ω 0 ) changes obviously. When k > 0.5, the intersection frequency f 0 moves forward because of the amplitude change. Figure 11b shows that when k > 0.5, the Nyquist contour of the minor loop gain T m would encircle the point (−1, j0), so the MV bus voltage is unstable. When k = 0.5, the Nyquist contour of T m is close to the point (−1, j0). Therefore, the voltage tends to be unstable. While k = 0.45, the dynamic performance of the system is good, and the optimized stability criterion is satisfied.
It can be seen from Figure 12a that with the increase of cut-off frequency f, the impact on the amplitude becomes smaller and can be ignored. When f > 450 Hz, the phase and amplitude of Z L _ I P R ( j ω 0 ) are hardly changed. Figure 12b shows that none of the Nyquist contour of the minor loop gain T m encircles (−1, j0) when k = 0.45. Thus, the system remains stable with the increasing of f. When f = 450 Hz, the magnitude is hardly changed.
In summary, the proposed method can solve the instability problem of the MVDC distribution system by weakening the negative resistance characteristic of the load impedance. When the gain k = 0.45 and the cut-off frequency f = 450 Hz, the impedance satisfies the optimized stability criterion, resulting in the MV bus voltage oscillation being rapidly damped. Moreover, the impedance amplitude is rarely affected, and the dynamic performance of the system is good.

4.3. Comparison between the IDCO Method and IPR Method

4.3.1. Negative Resistance Characteristic of the Input Impedance for ISOP DCT

The negative impedance characteristics of the ISOP DCT may destabilize the system. At the impedance intersection f 0 , the weakening of the negative impedance characteristic can suppress the bus voltage oscillation. Therefore, the suppression ability of the bus voltage oscillation based on the two methods can be evaluated by
β I D C O = arg [ Z L ( j 2 π f o ) ] ,
β I P R = a r g [ Z L _ I P R ( j 2 π f o ) ] ,
where β I D C O and β I P R are the phases of Z L ( j 2 π f o ) and Z L _ I P R ( j 2 π f o ) , respectively. Z L ( j 2 π f o ) is the load impedance at f 0 based on the IDCO method and Z L _ I P R ( j 2 π f o ) is the load impedance at f 0 based on the IPR method.
Figure 7 shows that the impedance phase of the original system at f o is β 0 = 91.5 ° . Substituting (18) and (23) into (29) and (30), respectively and combining the parameters in Table 1, β I D C O = 85 ° and β I P R = 83 ° can be obtained at f 0 = 70 H z . Both methods weaken the negative impedance characteristics of the ISOP DCT. However, the negative resistance characteristic of the load impedance based on the IPR method ( β I P R = 83 ° ) is weaker than that of the IDCO method ( β I D C O = 85 ° ), indicating that the system can achieve stability faster based on the IPR control.

4.3.2. Dynamic Performance of the MVDC Distribution System

The objective of the IDCO method and the IPR method is to improve the stability of the MVDC distribution system. Both can accomplish the goal by reshaping the load impedance as shown in Figure 8, Figure 11, and Figure 12. To further analyze the dynamic performance of the system, the voltage control closed-loop transfer functions are expressed as
G I D C O _ C L ( s ) = G u L ( s ) G u L d ( s ) 1 + G u L ( s ) G u L d ( s ) ,
G I P R _ C L ( s ) = G u L ( s ) G p h ( s ) G u L d ( s ) 1 + G u L ( s ) G p h ( s ) G u L d ( s ) ,
where G I D C O _ C L ( s ) is the voltage control closed-loop transfer function based on the IDCO method and G I P R _ C L ( s ) is the voltage control closed-loop transfer function based on the proposed IPR method.
The Bode diagram of G I D C O _ O L ( s ) , G I P R _ O L ( s ) , G I D C O _ C L ( s ) , and G I P R _ C L ( s ) are shown in Figure 13, and the system parameters are listed in Table 1. G I D C O _ O L ( s ) and G I P R _ O L ( s ) are the output voltage control open-loop transfer functions, which are the numerator of (31) and (32), respectively. The comparisons between the IDCO method and the IPR method are summarized in Table 2.
As can be seen from Table 2, the bandwidth of G I P R _ C L ( s ) is 30 Hz greater than that of G I D C O _ O L ( s ) . Thus, compared with the IDCO approach, the dynamic performance of the MVDC distribution system with the proposed method is better. Moreover, the PMs of both control methods are in the proper range, and the PM of the IDCO method is larger.
In conclusion, although the system stability is improved in both methods, the negative impedance characteristics of the system are weaker based on the IPR method. Therefore, the proposed IPR method could achieve the rapid stabilization of the MVDC distribution system. In addition, the bandwidth of the IPR method is larger than that of the IDCO method. Thus, the dynamic characteristics of the system are better. However, due to the small PM, the IPR method may produce a large overshoot in the dynamic process.

5. Simulation Results and Discussion

Based on the structure as shown in Figure 2, a 10 kV MVDC distribution system was built in MATLAB/Simulink. The ISOP DCT consists of three DAB modules, whose rated power Pr = 0.9 MW. The parameters of the simulation model are given in Table 1.

5.1. Verification of the Voltage Instability in the MVDC Distribution System

Fourier transform is a basic method in transform analysis from the time domain to the frequency domain. To verify the unstable problem of the MVDC distribution system, the MV bus voltage u M was analyzed by the fast Fourier transform (FFT) analysis function in MATLAB. The FFT analysis result of u M is illustrated in Figure 14. THD is the total harmonic distortion of u M .
As can be seen from Figure 14, the oscillation frequency is mainly concentrated at 70 Hz and the THD is 21.49%. The results confirm that the original MVDC distribution system is unstable and the oscillation frequency of the MV bus voltage u M is consistent with Figure 7.

5.2. Verification of the Load Impedance Models

To verify the correctness of the developed impedance models, the bode diagrams of the analytical models are compared with the simulation results. The measurement method of the impedance simulation results is depicted in Figure 15. Moreover, the analytical modeling results and the simulation results of the load impedance are shown in Figure 16.
As shown in Figure 15, the sinusoidal perturbations u ^ f are superimposed on the MV bus. The frequency varies from 2 Hz to 10 kHz, and the peak amplitude of u ^ f is 500 V. Meanwhile, the disturbance current i ^ f is extracted by FFT analysis. The measured load impedance of the simulation system is expressed as
Z L ( s ) = u ^ f i ^ f .
From Figure 16, we can see that the analytical models match well with the measured results in the swept frequency range from 2 Hz to 10 kHz, indicating that the models expressed in (18) and (23) are accurate. Moreover, the proposed IPR method only changes the phase of Z L _ I P R ( s ) at 70 Hz and rarely affect the amplitude. The phase of Z L _ I P R ( s ) satisfies the phase interval in (26), which coincides with the proposed method.

5.3. Verification of the IPR Method

The simulation model is tested under different working conditions to validate the proposed method. When t = 0.2, the system is switched from the original control to the IDCO control or the IPR control. When t = 0.5, the system changes from half load (p = 0.45 MW) to full load (p = 0.9 MW), i.e., the load steps from 1.25 Ω to 0.625 Ω. Besides, the reference value u L * of the LV bus voltage steps from 100% ( u L * = 750 V) to 80% ( u L * = 600 V) at t = 0.7 s. The damping ability to bus voltage oscillation of these two methods is illustrated in Figure 17, Figure 18 and Figure 19. The dynamic performance of the MVDC distribution system is shown in Figure 20, Figure 21 and Figure 22.
From Figure 17, we can see that for the IDCO and the IPR method, the oscillation of the MV bus voltage u M is suppressed within 150 ms and 50 ms, respectively. This confirms that the IPR method rapidly suppresses the MV bus voltage oscillation. Moreover, the ripple of u M using the proposed IPR method is smaller than that of the IDCO approach, because the negative resistance characteristic of the ISOP DCT is weakened.
In the observation from Figure 18a,b, the DAB modules voltage u i n 1 , u i n 2 , and u i n 3 are stable at 3333.3 V. The simulation results demonstrate that the ISOP DCT achieves input voltage sharing. It indicates that the input voltage sharing controller optimization could be ignored, which is consistent with Figure 10. In addition, the transient period of the proposed IPR method is 100 ms shorter than that of the IDCO method. These results indicate that the proposed method can stabilize the voltage faster.
As shown in Figure 19, when the IPR controller is activated, the stabilization time of the LV bus voltage u L is reduced from 150 ms to 50 ms. This validates that the proposed method is effective. The voltage ripple rate of u L with the proposed method (about 2%) is lower than that of the IDCO approach (about 2.7%). This illustrates that compared with the IDCO method, the waveform quality based on the IPR method is significantly better. This also indicates that the impedance phase satisfies the phase interval, which further weakens the negative resistance characteristic of the load impedance.
As can be seen from Figure 20, the transient recovery time of the proposed IPR method is 60 ms, which is faster than that of the IDCO approach (about 80 ms). Although the ripple rates are both less than 1%, the result shows that the voltage is more stable with the proposed IPR method than the IDCO method. This validates the effectiveness of the proposed method at the full-load condition. Furthermore, the dynamic performance is good due to the proper bandwidth and phase margin as shown in Table 2.
The waveforms of the LV bus voltage u L also confirm the good dynamic performance of the IPR method as shown in Figure 21 and Figure 22. It is evident that u L tracks the step reference well as shown in Figure 21, and the corresponding transient voltage has a short settling time (40 ms). As can be seen from Figure 22, the overshoot of u L with the proposed IPR control approach is 25 V and the overshoot rate is 4%. It can be seen from Figure 21 and Figure 22 that compared with the IDCO method, the overshoot based on the IPR control is larger, but is still within a reasonable range. These results validate the robustness and effectiveness of the proposed control.

6. Conclusions

This paper proposes an IPR method to rapidly stabilize the MVDC distribution system. Based on the obtained load impedance model, the 10 kV MVDC distribution system using the traditional IDCO method and the proposed IPR method was analyzed and simulated. The following relevant conclusions were obtained:
(i)
Due to the decoupling condition of the control strategy for the ISOP DCT, the load impedance is hardly affected by the input voltage sharing controller optimization.
(ii)
Compared with the IDCO method, the proposed method further weakens the negative resistance characteristic of the ISOP DCT and suppresses the voltage oscillation rapidly. Moreover, regardless of load step-change or voltage reference step-change, the proposed method has a good dynamic performance and stability for the system. The overshoot of the proposed IPR method is larger than that of the traditional IDCO method, but it is still reasonable. This is a tradeoff for the rapid stabilization of the MVDC distribution systems.
(iii)
Compared with the method of modifying the impedance amplitude, the proposed IPR method considers the problem that the amplitude must intersect. The phase interval of the optimized stability criterion is adjustable. Furthermore, the impedance phase controller can be designed by the high order low-pass filter and bandpass filter, which are flexible and can be applied to the stability analysis for other systems.

Author Contributions

Conceptualization, Q.Z., X.L., M.L., F.Y. and D.Y.; methodology, X.L.; software, F.Y. and D.Y.; validation, Q.Z. and M.L.; formal analysis, Q.Z. and X.L.; writing and original draft preparation, Q.Z., X.L., M.L., F.Y. and D.Y.; writing review and editing, X.L. and M.L. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by the National Natural Science Foundation of China (No. 62103218) and the Natural Science Foundation of Shandong Province (ZR2020QF065, ZR2020MF081).

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. A typical DC distribution system.
Figure 1. A typical DC distribution system.
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Figure 2. Structure of the MVDC distribution system.
Figure 2. Structure of the MVDC distribution system.
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Figure 3. Control block diagram of the ISOP DCT.
Figure 3. Control block diagram of the ISOP DCT.
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Figure 4. Control block diagram of the i-th (i = 1, 2 … n − 1) DAB module.
Figure 4. Control block diagram of the i-th (i = 1, 2 … n − 1) DAB module.
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Figure 5. Control block diagram of the n-th DAB converter.
Figure 5. Control block diagram of the n-th DAB converter.
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Figure 6. Inter connection of the sub-system for the MVDC distribution system.
Figure 6. Inter connection of the sub-system for the MVDC distribution system.
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Figure 7. Bode diagram of Z S ( s ) and Z L ( s ) .
Figure 7. Bode diagram of Z S ( s ) and Z L ( s ) .
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Figure 8. MVDC distribution system stability analysis with different cut-off frequencies: (a) Bode diagram of Z L ( s ) , (b) Nyquist diagram of T m .
Figure 8. MVDC distribution system stability analysis with different cut-off frequencies: (a) Bode diagram of Z L ( s ) , (b) Nyquist diagram of T m .
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Figure 9. Flowchart of the proposed IPR method.
Figure 9. Flowchart of the proposed IPR method.
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Figure 10. Small-signal block diagram of DAB with G p h ( s ) .
Figure 10. Small-signal block diagram of DAB with G p h ( s ) .
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Figure 11. Stability analysis of the MVDC distribution system: (a) Bode diagram of Z L _ I P R ( j ω 0 ) , (b) Nyquist diagram of T m .
Figure 11. Stability analysis of the MVDC distribution system: (a) Bode diagram of Z L _ I P R ( j ω 0 ) , (b) Nyquist diagram of T m .
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Figure 12. Stability analysis of the MVDC distribution system: (a) Bode diagram of Z L _ I P R ( s ) , (b) Nyquist diagram of T m .
Figure 12. Stability analysis of the MVDC distribution system: (a) Bode diagram of Z L _ I P R ( s ) , (b) Nyquist diagram of T m .
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Figure 13. Bode diagram of the transfer functions based on the IDCO method and the proposed IPR method: (a) open-loop transfer functions, (b) closed-loop transfer functions.
Figure 13. Bode diagram of the transfer functions based on the IDCO method and the proposed IPR method: (a) open-loop transfer functions, (b) closed-loop transfer functions.
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Figure 14. FFT analysis of the MV bus voltage u M .
Figure 14. FFT analysis of the MV bus voltage u M .
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Figure 15. Impedance measurement by the disturbance injection method.
Figure 15. Impedance measurement by the disturbance injection method.
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Figure 16. Bode diagram of the load impedance: (a) input impedance Z L ( s ) based on the IDCO method, (b) input impedance Z L _ I P R ( s ) based on the proposed IPR method.
Figure 16. Bode diagram of the load impedance: (a) input impedance Z L ( s ) based on the IDCO method, (b) input impedance Z L _ I P R ( s ) based on the proposed IPR method.
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Figure 17. Damping results of the MV bus voltage u M .
Figure 17. Damping results of the MV bus voltage u M .
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Figure 18. Input voltage of three DAB modules: (a) IDCO method, (b) proposed IPR method.
Figure 18. Input voltage of three DAB modules: (a) IDCO method, (b) proposed IPR method.
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Figure 19. Damping results of the LV bus voltage u L .
Figure 19. Damping results of the LV bus voltage u L .
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Figure 20. Dynamic waveforms of the MV bus voltage u M based on the IDCO or IPR control method under a load step-change.
Figure 20. Dynamic waveforms of the MV bus voltage u M based on the IDCO or IPR control method under a load step-change.
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Figure 21. Dynamic waveforms of the LV bus voltage u L based on the IDCO or IPR control method under a load step-change.
Figure 21. Dynamic waveforms of the LV bus voltage u L based on the IDCO or IPR control method under a load step-change.
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Figure 22. Dynamic waveforms of the LV bus voltage u L based on the IDCO or IPR control method under a reference value step-change.
Figure 22. Dynamic waveforms of the LV bus voltage u L based on the IDCO or IPR control method under a reference value step-change.
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Table 1. Parameters of the MVDC distribution system.
Table 1. Parameters of the MVDC distribution system.
ParametersDescriptionValue
DC GridLgTransmission line inductance0.06 H
VgDC grid voltage10 kV
ISOP DCT u M MVDC bus voltage10 kV
u L LVDC bus voltage750 V
KTurns ratio of the high-frequency transformer3
nNumber of DAB modules3
u i n i The primary side voltage of the i-th DAB module3.33 kV
LsThe leakage inductance of the high-frequency transformer and resonant inductance of every DAB module112.5 μH
f s Switching frequency 20 kHz
CiniInput capacitance of the i-th DAB module225 μF
CoOutput capacitance3 mF
PrRated power0.9 MW
Input Voltage
Sharing Controller
KpiProportional coefficient 0.7754
KiiIntegral coefficient136.3038
Output Voltage ControllerKp0Original proportional coefficient1.0449
Ki0Original integral coefficient1520.6999
KpOptimized proportional coefficient0.1682
KiOptimized integral coefficient344.7928
Impedance Phase Reshaping Method θImpedance phase interval(0.90)
kGain of impedance phase controller0.45
fCut-off frequency of first-order low-pass filter450 Hz
Table 2. Comparisons of the transfer functions.
Table 2. Comparisons of the transfer functions.
G I D C O _ C L ( s ) G I P R _ C L ( s )
Bandwidth44 Hz74 Hz
Phase Margin (PM) 60°47°
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Zhang, Q.; Liu, X.; Li, M.; Yu, F.; Yu, D. Input-Series-Output-Parallel DC Transformer Impedance Modeling and Phase Reshaping for Rapid Stabilization of MVDC Distribution Systems. Electronics 2021, 10, 3163. https://doi.org/10.3390/electronics10243163

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Zhang Q, Liu X, Li M, Yu F, Yu D. Input-Series-Output-Parallel DC Transformer Impedance Modeling and Phase Reshaping for Rapid Stabilization of MVDC Distribution Systems. Electronics. 2021; 10(24):3163. https://doi.org/10.3390/electronics10243163

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Zhang, Qian, Ximei Liu, Meihang Li, Fei Yu, and Dachuan Yu. 2021. "Input-Series-Output-Parallel DC Transformer Impedance Modeling and Phase Reshaping for Rapid Stabilization of MVDC Distribution Systems" Electronics 10, no. 24: 3163. https://doi.org/10.3390/electronics10243163

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