Xu, H.; Zhou, L.; Liang, H.; Huang, Z.; Sun, C.; Ning, Y.
High-Performance Double-Node-Upset-Tolerant and Triple-Node-Upset-Tolerant Latch Designs. Electronics 2021, 10, 2515.
https://doi.org/10.3390/electronics10202515
AMA Style
Xu H, Zhou L, Liang H, Huang Z, Sun C, Ning Y.
High-Performance Double-Node-Upset-Tolerant and Triple-Node-Upset-Tolerant Latch Designs. Electronics. 2021; 10(20):2515.
https://doi.org/10.3390/electronics10202515
Chicago/Turabian Style
Xu, Hui, Le Zhou, Huaguo Liang, Zhengfeng Huang, Cong Sun, and Yafei Ning.
2021. "High-Performance Double-Node-Upset-Tolerant and Triple-Node-Upset-Tolerant Latch Designs" Electronics 10, no. 20: 2515.
https://doi.org/10.3390/electronics10202515
APA Style
Xu, H., Zhou, L., Liang, H., Huang, Z., Sun, C., & Ning, Y.
(2021). High-Performance Double-Node-Upset-Tolerant and Triple-Node-Upset-Tolerant Latch Designs. Electronics, 10(20), 2515.
https://doi.org/10.3390/electronics10202515