Next Article in Journal
A Survey of Wireless Battery Management System: Topology, Emerging Trends, and Challenges
Previous Article in Journal
Two-Stage Clock-Free Time-to-Digital Converter Based on Vernier and Tapped Delay Lines in FPGA Device
 
 
Due to scheduled maintenance work on our database systems, there may be short service disruptions on this website between 10:00 and 11:00 CEST on June 14th.
Article

Article Versions Notes

Electronics 2021, 10(18), 2192; https://doi.org/10.3390/electronics10182192
Action Date Notes Link
article pdf uploaded. 7 September 2021 16:20 CEST Version of Record https://www.mdpi.com/2079-9292/10/18/2192/pdf-vor
article xml file uploaded 8 September 2021 08:43 CEST Original file -
article xml uploaded. 8 September 2021 08:43 CEST Update https://www.mdpi.com/2079-9292/10/18/2192/xml
article pdf uploaded. 8 September 2021 08:43 CEST Updated version of record https://www.mdpi.com/2079-9292/10/18/2192/pdf
article html file updated 8 September 2021 08:44 CEST Original file -
article html file updated 9 September 2021 10:06 CEST Update -
article html file updated 30 July 2022 04:45 CEST Update https://www.mdpi.com/2079-9292/10/18/2192/html
Back to TopTop