# Miller Plateau Corrected with Displacement Currents and Its Use in Analyzing the Switching Process and Switching Loss

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## Abstract

**:**

## 1. Introduction

## 2. Miller Plateau Corrected with Displacement Currents

## 3. Analyzing the Switching Process and Switching Loss with the New Miller Plateau

#### 3.1. Switching Waveform Analysis Using the New Miller Plateau

#### 3.2. Switching Loss Analysis Using the New Miller Plateau

## 4. Experimental and Simulation Verification

#### 4.1. Experimental Test Result of the Miller Plateau

#### 4.2. Verification of Analyzing the Switching Waveform

Algorithm 1 |

if (vov < 0) begin mosfet_state = ‘OFF; end else if (gfs * vov < V(vd, vs)/ron) begin mosfet_state = ‘ACTIVE; end else begin mosfet_state = ‘ON; end if (mosfet_state == ‘OFF) begin I(vd,vs) <+ 0.0; end else if (mosfet_state == ‘ACTIVE) begin I(vd,vs) <+ gfs * vov; end else begin I(vd,vs) <+ V(vd, vs)/ron; end |

#### 4.3. Verification of Analyzing Switching Loss

## 5. Conclusions

## Author Contributions

## Funding

## Data Availability Statement

## Conflicts of Interest

## Abbreviations

CMOS | Complementary metal-oxide semiconductor |

DC | Direct current |

EMI | Electromagnetic interference |

FOM | Figures of merit |

KCL | Kirchhoff’s current law |

IoT | Internet of Things |

MOSFET | Metal-oxide-semiconductor field-effect transistor |

SMPS | Switching mode power supply |

SPICE | Simulation Program with Integrated Circuit Emphasis |

## Nomenclature

${C}_{\mathit{GS}}$, ${C}_{\mathit{GD}}$, ${C}_{\mathit{DS}}$ | Parasitic interelectrode (gate, drain, and source) capacitances |

${C}_{\mathit{GS}\_\mathit{ext}}$ | External capacitance connected between the gate and source electrodes |

${C}_{\mathit{DS}\_\mathit{ext}}$ | External capacitance connected between the drain and source electrodes |

${C}_{\mathit{iss}}$ | Input capacitance. Equals ${C}_{\mathit{GS}}+{C}_{\mathit{GD}}$ |

${C}_{\mathit{rss}}$ | Reverse transfer capacitance. Equals ${C}_{\mathit{GD}}$ |

${C}_{\mathit{oss}}$ | Output capacitance. Equals ${C}_{\mathit{DS}}+{C}_{\mathit{GD}}$ |

${f}_{\mathit{sw}}$ | Switching frequency of an SMPS |

${g}_{\mathit{fs}}$ | Power MOSFET’s transconductance in the ACTIVE state |

${I}_{\mathit{ch}}$, ${I}_{\mathit{D}}$, ${I}_{\mathit{L}}$ | Channel current, drain current, and load current |

${I}_{\mathit{pl}\_\mathit{on}}$, ${I}_{\mathit{pl}\_\mathit{off}}$ | Miller plateau currents in the turn-on and turn-off processes |

${I}_{\mathit{avg}\_\mathit{on}}$ | Average gate current when ${V}_{\mathit{GS}}$ changes from ${V}_{\mathit{TH}}$ to ${V}_{\mathit{pl}\_\mathit{on}}$ during turn-on |

${I}_{\mathit{avg}\_\mathit{off}}$ | Average gate current when ${V}_{\mathit{GS}}$ changes from ${V}_{\mathit{pl}\_\mathit{off}}$ to ${V}_{\mathit{TH}}$ during turn-off |

${K}_{\mathit{r}}$ | The constant rate when ${V}_{\mathit{DS}}$ falls linearly from ${V}_{\mathit{in}}$ to zero during turn-on |

${K}_{\mathit{f}}$ | The constant rate when ${V}_{\mathit{DS}}$ rises linearly from zero to ${V}_{\mathit{in}}$ during turn-off |

${L}_{\mathit{D}}$, ${L}_{\mathit{S}}$ | Parasitic inductances of the drain and source leads |

${P}_{\mathit{on}}$, ${P}_{\mathit{off}}$ | Turn-on and turn-off switching power losses |

${R}_{\mathit{DS}}\left(\mathit{on}\right)$ | Drain–source on-state resistance |

${R}_{\mathit{g}}$ | Gate resistance |

${T}_{\mathit{S}}$ | Switching period of an SMPS |

${T}_{\mathit{f}}$, ${T}_{\mathit{r}}$ | Turn-off time and turn-on time |

${T}_{1f}$ to ${T}_{5f}$ | Each interval of the turn-off sequence |

${T}_{1r}$ to ${T}_{5r}$ | Each interval of the turn-on sequence |

${\tau}_{m}$ | The time constant related to ${g}_{\mathit{fs}}$ and ${L}_{\mathit{D}}$ |

${\tau}_{G\prime}$ | The time constant related to ${R}_{\mathit{g}}$ and ${C}_{\mathit{GD}}$ |

${V}_{\mathit{GS}}$, ${V}_{\mathit{GD}}$, ${V}_{\mathit{DS}}$ | Gate–source voltage, gate–drain voltage, and drain–source voltage |

${V}_{\mathit{dr}}$ | Gate driving voltage |

${V}_{\mathit{pl}}$ | Traditional Miller plateau voltage |

${V}_{\mathit{pl}\_\mathit{on}}$, ${V}_{\mathit{pl}\_\mathit{off}}$ | Miller plateau voltages in the turn-on and turn-off processes |

${V}_{\mathit{TH}}$ | Power MOSFET’s threshold voltage |

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**Figure 1.**(

**a**) Boost converter with practical realization using a MOSFET and diode; (

**b**) MOSFET switch with a partially clamped current load (three states of the MOSFET: 1 → ON, 2 → ACTIVE, 3 → OFF).

**Figure 3.**(

**a**) Experimental validation of the newly calculated Miller plateau by testing NCE2030K; (

**b**) testing setup of NCE2030K.

**Figure 4.**Measured switching waveforms of ${V}_{\mathit{GS}}$ and ${V}_{\mathit{DS}}$ for NCE2030K when ${V}_{\mathit{dr}}=3$ V, ${I}_{\mathit{L}}=0.1$ A, and ${C}_{\mathit{DS}\_\mathit{ext}}=1\phantom{\rule{4.pt}{0ex}}\mathrm{nF}$.

**Figure 5.**Simulated switching waveforms of ${V}_{\mathit{GS}}$, ${I}_{\mathit{ch}}$, and ${V}_{\mathit{DS}}$ in a capacitance-limited case.

**Figure 6.**Simulated switching waveforms of ${V}_{\mathit{GS}}$, ${I}_{\mathit{ch}}$, and ${V}_{\mathit{DS}}$ in an inductance-limited case.

**Figure 7.**Switching loss of the models based on [20] at 10 MHz, 10 V input voltage, and 5 V gate driving voltage: (

**a**) turn-on loss as a function of load current; (

**b**) turn-off loss as a function of load current.

**Figure 8.**Switching loss of the models based on [20] at 10 MHz, 10 V input voltage, and 10 A load current: (

**a**) turn-on loss as a function of gate driving voltage; (

**b**) turn-off loss as a function of gate driving voltage.

**Figure 9.**Switching loss of the models based on [30] at 10 MHz, 10 V input voltage, and 5 V gate driving voltage: (

**a**) turn-on loss as a function of load current; (

**b**) turn-off loss as a function of load current.

**Figure 10.**Switching loss of the models based on [30] at 10 MHz, 10 V input voltage, and 10 A load current: (

**a**) turn-on loss as a function of gate driving voltage; (

**b**) turn-off loss as a function of gate driving voltage.

**Table 1.**Duration of each interval of the switching process of a power MOSFET with a clamped current load.

Turn-On | Turn-Off | ||
---|---|---|---|

${T}_{1\mathit{r}}$ | ${R}_{g}{C}_{\mathit{iss}}ln\frac{{V}_{\mathit{dr}}}{{V}_{\mathit{dr}}-{V}_{\mathit{TH}}}{}^{*}$ | ${T}_{1\mathit{f}}$ | ${R}_{g}{C}_{\mathit{iss}}ln\frac{{V}_{\mathit{dr}}}{{V}_{\mathit{pl}}}$ |

${T}_{2\mathit{r}}$ | ${R}_{g}{C}_{\mathit{iss}}ln\frac{{V}_{\mathit{dr}}-{V}_{\mathit{TH}}}{{V}_{\mathit{dr}}-{V}_{\mathit{pl}\_\mathit{on}}}$ | ${T}_{2\mathit{f}}$ | ${R}_{g}{C}_{\mathit{iss}}ln\frac{{V}_{\mathit{pl}}}{{V}_{\mathit{pl}\_\mathit{off}}}$ |

${T}_{3\mathit{r}}$ | ${V}_{\mathit{in}}/{K}_{r}$ | ${T}_{3\mathit{f}}$ | ${V}_{\mathit{in}}/{K}_{f}-{T}_{2\mathit{f}}$ |

${T}_{4\mathit{r}}$ | $5{R}_{\mathit{DS}\left(\mathit{on}\right)}{C}_{\mathit{DS}}$ | ${T}_{4\mathit{f}}$ | ${R}_{g}{C}_{\mathit{iss}}ln\frac{{V}_{\mathit{pl}\_\mathit{off}}}{{V}_{\mathit{TH}}}$ |

${T}_{5\mathit{r}}$ | ${R}_{g}{C}_{\mathit{iss}}ln\frac{{V}_{\mathit{dr}}-{V}_{\mathit{pl}\_\mathit{on}}}{(1-0.99){V}_{\mathit{dr}}}-{T}_{4\mathit{r}}$ | ${T}_{5\mathit{f}}$ | ${R}_{g}{C}_{\mathit{iss}}ln\frac{{V}_{\mathit{TH}}}{0.01{V}_{\mathit{TH}}}$ |

_{iss}= C

_{GS}+ C

_{GD}.

**Table 2.**The measured (Meas.) Miller plateau, the predicted Miller plateau by the existing (Exist.) method, and the predicted Miller plateau by the proposed (Prop.) method when the relevant capacitance changes.

When ${C}_{\mathit{DS}\_\mathit{ext}}=1\phantom{\rule{4.pt}{0ex}}\mathbf{nF}$ | When ${C}_{\mathit{DS}\_\mathit{ext}}=5\phantom{\rule{4.pt}{0ex}}\mathbf{nF}$ | |||||
---|---|---|---|---|---|---|

Meas. | Exist. | Prop. | Meas. | Exist. | Prop. | |

${V}_{\mathit{pl}\_\mathit{on}}$ | 1070 mV | 710 mV | 760 mV | 1230 mV | 710 mV | 922 mV |

${V}_{\mathit{pl}\_\mathit{off}}$ | 950 mV | 710 mV | 695 mV | 909 mV | 710 mV | 644 mV |

**Table 3.**Variation of the Miller plateau when ${C}_{\mathit{DS}\_\mathit{ext}}$ changes from $1\phantom{\rule{4.pt}{0ex}}\mathrm{nF}$ to $5\phantom{\rule{4.pt}{0ex}}\mathrm{nF}$.

Measured | Existing | Proposed | |
---|---|---|---|

$\Delta {V}_{\mathit{pl}\_\mathit{on}}$ | 160 mV | 0 mV | 162 mV |

$\Delta {V}_{\mathit{pl}\_\mathit{off}}$ | 41 mV | 0 mV | 51 mV |

Turn-On | Turn-Off | ||||||
---|---|---|---|---|---|---|---|

On | Cal. | Sim. | Error | Off | Cal. | Sim. | Error |

${T}_{1\mathit{r}}$ | 312 ps | 313 ps | $0.31\%$ | ${T}_{1\mathit{f}}$ | 1.28 ns | 1.29 ns | $0.77\%$ |

${T}_{2\mathit{r}}$ | 598 ps | 577 ps | $3.6\%$ | ${T}_{2\mathit{f}}$ | 195 ps | 240 ps | $18\%$ |

${T}_{3\mathit{r}}$ | 767 ps | 772 ps | $0.65\%$ | ${T}_{3\mathit{f}}$ | 954 ps | 1.05 ns | $9.1\%$ |

${T}_{4\mathit{r}}$ | 20.0 ps | 22 ps | $9.0\%$ | ${T}_{4\mathit{f}}$ | 775 ps | 785 ps | $1.3\%$ |

${T}_{5\mathit{r}}$ | 5.52 ns | 5.50 ns | $0.36\%$ | ${T}_{5\mathit{f}}$ | 6.44 ns | 6.45 ns | $0.15\%$ |

**Table 5.**The average relative error of different loss models based on two calculation methods when the load current ${I}_{L}$ changes from 4.0 A to 14 A at 10 MHz, 10 V input voltage, and 5 V gate driving voltage.

The Loss Calculation Method in [20] | The Loss Calculation Method in [30] | |||||
---|---|---|---|---|---|---|

Original Model in [20] | Proposed Model 1 | Proposed Model 2 | Original Model in [30] | Proposed Model 1 | Proposed Model 2 | |

${P}_{\mathit{on}}$ | 42.1% | 09.9% | 8.0% | 43.0% | 15.8% | 5.2% |

${P}_{\mathit{off}}$ | 35.7% | 10.1% | 9.7% | 29.8% | 08.7% | 1.6% |

**Table 6.**The average relative error of different loss models based on two calculation methods when the gate driving voltage ${V}_{dr}$ changes from 4.0 V to 6.5 V at 10 MHz, 10 V input voltage, and 10 A load current.

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## Share and Cite

**MDPI and ACS Style**

Liu, S.; Song, S.; Xie, N.; Chen, H.; Wu, X.; Zhao, M. Miller Plateau Corrected with Displacement Currents and Its Use in Analyzing the Switching Process and Switching Loss. *Electronics* **2021**, *10*, 2013.
https://doi.org/10.3390/electronics10162013

**AMA Style**

Liu S, Song S, Xie N, Chen H, Wu X, Zhao M. Miller Plateau Corrected with Displacement Currents and Its Use in Analyzing the Switching Process and Switching Loss. *Electronics*. 2021; 10(16):2013.
https://doi.org/10.3390/electronics10162013

**Chicago/Turabian Style**

Liu, Sheng, Shuang Song, Ning Xie, Hai Chen, Xiaobo Wu, and Menglian Zhao. 2021. "Miller Plateau Corrected with Displacement Currents and Its Use in Analyzing the Switching Process and Switching Loss" *Electronics* 10, no. 16: 2013.
https://doi.org/10.3390/electronics10162013