Study on the Implementation of a Simple and Effective Memory System for an AI Chip

Round 1

Reviewer 1 Report

This manuscript presents a simple memory system for implementation in AI chips.

This memory was implemented first in FPGAs, verified and then on-chip using industrial components.

The paper describes the idea and its implementations together with the results of some tests performed on prototypes.

The topic may be interesting, but the authors need to more strongly motivate the advantages by justifying them through a more extensive comparison with other alternative solutions. The state of the art on the topic is lacking, not to say practically absent.

Author Response

The following was added to the content mentioned by the reviewer. Table.5 on page 8 describes the reduction in size by about 4 times by comparing the size of the existing memory system and the proposed memory system. Compare the size of the existing memory and the memory used in this study through Table 7 on page 9, and show that the memory size required in the YOLO application through the FPGA from the 258 line to the 261 line satisfies the memory size used in this study. Expressed.

Author Response File: Author Response.pdf

Reviewer 2 Report

The work is well presented and organized.

Please keep a constant number format (regarding decimal digits) in Table 4. You should also provide more information regarding the limitations imposed by the proposed design compared to competitive implementations, as well as in comparison to various applications.

Author Response

The number format in Table4 has been changed.

The following was added to the content mentioned by the reviewer. Table.5 on page 8 describes the reduction in size by about 4 times by comparing the size of the existing memory system and the proposed memory system. Compare the size of the existing memory and the memory used in this study through Table 7 on page 9, and show that the memory size required in the YOLO application through the FPGA from the 258 line to the 261 line satisfies the memory size used in this study. Expressed.

Author Response File: Author Response.pdf

Reviewer 3 Report

It is not clear from the text of the article how the proposed memory structure is related to artificial intelligence. 

Author Response

Lines 252 to 255 of Page 9 describe why the proposed memory structure is needed for AI. Abstract also wrote a part that it is difficult to implement AI chip because of the large sized memory system.

Author Response File: Author Response.pdf

Reviewer 4 Report

The paper describes an engineering application, not scientific research. I have no doubts about the quality of the engineering work: it is clearly of high quality, required substantial effort, and is valuable. But the approach taken by the authors must be improved.

First, there is no clear explanation of why traditional memory systems cannot be used: the explanation provided is insufficient without a more detailed rationale, references and examples, so it is hard to understand what the added value of the manuscript is.

Second, there is no context whatsoever for results. They must be compared/contrasted with COTS memories, using the aforementioned AI chips, otherwise the numbers are not meaningful.

I think the authors performed excellent technical work, but this manuscript is far from ready for publication.

Author Response

For the inability to use traditional memory, the abstract was modified and described.

Table .5 of page8 compares this study with the existing memory system.

In addition, through Table.7 of page9, the memory used in this study and the memory size used a lot in existing AI were compared.

In line 258~261 of page9, it was mentioned that the memory used in this study is a memory size that is not insufficient when implementing YOLO in FPGA.

 

Author Response File: Author Response.pdf

Round 2

Reviewer 1 Report

The author correctly addressed all my suggestions. More in general, the quality of the paper is improved and in its current version it can be considered for a possible publication on the journal.

There are some typos.

Author Response

Thank you for your comments.

Reviewer 4 Report

I am not convinced the authors have substantially improved this manuscript. A few sentences and a table (comparing results) were added, and this is a step in the right direction, but the manuscript still requires significant work. Suggestions for improvement:

1: The entire introduction is rushed. What makes something an "AI" chip? How do memory requirements differ from CPUs or GPUs? Saying "AI needs extensive memory access: is not good enough; all systems do. What makes AI chips different? This needs to be explained, described, visualized, so readers can actually place the work and understand its relevance.

2: Comparison with related work cannot be just a simple table. What is the related work doing? How is the proposed one different? What are the metrics for comparison?

You are submitting your work for a journal that has no restrictions on the length of manuscripts. Take advantage of that to present a good work: explain everything to your readers.

Again: I am quite convinced that the technical work is of high quality. But this is not a venue to describe technical work: it's a venue to describe scientific work. The current paper does not do that.

 

Author Response

Dear Reviewer,

I agree with the comments left by you. However, since the revision period requested by the thesis is very tight, I tried as much as possible to submit it within that time.

Also, the more difficult to secure for the comparative group is that there is a problem with the internal security of the company, so please consider that there are parts in the thesis that are difficult to disclose.

1: The entire introduction is rushed. What makes something an "AI" chip? How do memory requirements differ from CPUs or GPUs? Saying "AI needs extensive memory access: is not good enough; all systems do. What makes AI chips different? This needs to be explained, described, visualized, so readers can actually place the work and understand its relevance.

As the review added, I described it in more detail in the introduction. Through the figure on page2, each CPU GPU AI was expressed in the memory system spectator. Table 1 describes what needs an AI-dedicated chip using a reference.

 

2: Comparison with related work cannot be just a simple table. What is the related work doing? How is the proposed one different? What are the metrics for comparison?

The comparison table is described in more detail on pages 9 and 10.

Round 3

Reviewer 4 Report

I am satisfied with the revisions to the manuscript

Author Response

Thank you for your comments.