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Open AccessArticle

A Technique for Improving Lifetime of Non-Volatile Caches Using Write-Minimization

by Sparsh Mittal 1,* and Jeffrey Vetter 1,2
1
Oak Ridge National Laboratory, Oak Ridge, TN 37830, USA
2
Georgia Institute of Technology, Atlanta, GA 30332, USA
*
Author to whom correspondence should be addressed.
Academic Editor: Swaroop Ghosh
J. Low Power Electron. Appl. 2016, 6(1), 1; https://doi.org/10.3390/jlpea6010001
Received: 9 November 2015 / Revised: 29 December 2015 / Accepted: 7 January 2016 / Published: 18 January 2016
While non-volatile memories (NVMs) provide high-density and low-leakage, they also have low write-endurance. This, along with the write-variation introduced by the cache management policies, can lead to very small cache lifetime. In this paper, we propose ENLIVE, a technique for ENhancing the LIfetime of non-Volatile cachEs. Our technique uses a small SRAM (static random access memory) storage, called HotStore. ENLIVE detects frequently written blocks and transfers them to the HotStore so that they can be accessed with smaller latency and energy. This also reduces the number of writes to the NVM cache which improves its lifetime. We present microarchitectural schemes for managing the HotStore. Simulations have been performed using an x86-64 simulator and benchmarks from SPEC2006 suite. We observe that ENLIVE provides higher improvement in lifetime and better performance and energy efficiency than two state-of-the-art techniques for improving NVM cache lifetime. ENLIVE provides 8.47×, 14.67× and 15.79× improvement in lifetime or two, four and eight core systems, respectively. In addition, it works well for a range of system and algorithm parameters and incurs only small overhead. View Full-Text
Keywords: non-volatile memory (NVM); SRAM; cache; write-endurance; temporal locality; write minimization; device lifetime non-volatile memory (NVM); SRAM; cache; write-endurance; temporal locality; write minimization; device lifetime
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Mittal, S.; Vetter, J. A Technique for Improving Lifetime of Non-Volatile Caches Using Write-Minimization. J. Low Power Electron. Appl. 2016, 6, 1.

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