Active Quasi-Circulator Based on Wilkinson Power Divider for Low-Power Wireless Communication Systems

Abstract

This paper presents a microstrip active quasi-circulator designed for low-power wireless communication systems. The circuit consists of a second-order Wilkinson power divider and two power amplifiers with high gain and ultra-low noise characteristics. By leveraging the unidirectional transmission characteristics of the transistors and the isolation provided by resistors within the power divider, the interference between the transmitter (TX) and receiver (RX) is effectively suppressed. Additionally, thanks to the dual-amplifier architecture, no extra power amplification circuitry is required, thereby reducing the overall complexity and power consumption of the communication system. The detailed design procedure of the proposed quasi-circulator is presented. The measurement results show that, within the frequency range of 4.75 GHz to 6.11 GHz, the isolation between the TX and RX ports exceeds 20 dB, the return loss at each port is greater than 10 dB, and the transmission gains from the TX port to the antenna and from the antenna to the RX port are 3.1–8.7 dB and 2.7–4.0 dB, respectively, demonstrating a relative bandwidth of 25%.

1. Introduction

A circulator is a passive three-port or multi-port electromagnetic (EM) device with asymmetric transmission characteristics. Its primary function is to enable unidirectional signal flow, meaning that the input signal entering one port can only propagate through a specific path to another port and cannot return to the input port [1]. Circulators are widely used in wireless communication systems, allowing the transmit (TX) and receive (RX) links to share a single antenna (ANT) while maintaining isolation between them. This helps reduce the number of antennas required, thereby lowering the system’s cost and complexity [2].

Traditional circulators are typically made from magnetic materials, such as ferrites, which have the disadvantages of being bulky and difficult to integrate [3]. To achieve the integration of circulators, two new technologies for magnetless circulators have been developed. The first is the transistor-based active circulator, which can provide signal gain and compensate for transmission losses, but it suffers from issues such as high noise and poor linearity [4,5,6]. The second is the magnetic-free circulator based on linear periodic time-varying circuits, which offers good noise performance and linearity, but has limitations such as high insertion loss and narrow bandwidth [7,8,9,10,11]. This work focuses on the active quasi-circulator (AQC). An active quasi-circulator is a special type of active circulator, particularly suitable for wireless communication systems, with its three ports connected to the TX, RX, and ANT in the system [12,13,14,15]. Signals are transmitted from the TX port to the ANT port, and from the ANT port to the RX port, but no power is transmitted from the TX port to the RX port (as shown in Figure 1). The active quasi-circulator, while reducing technical complexity, enables the TX and RX to share a single ANT while maintaining isolation between them.

Currently, quasi-circulators are mainly divided into two categories based on their implementation technologies. The first category includes active quasi-circulators formed by transistors and in-phase or out-of-phase power combiners [16,17,18,19,20]. A microstrip active quasi-circulator composed of two common amplifier modules and two power couplers is proposed in [17]. The power couplers utilize parallel coupling lines with slow-wave structures to improve isolation between the quasi-circulator ports. The measurement results show that the insertion loss of the quasi-circulator in the operating frequency band ranges from 1 to −2 dB, with isolation greater than 20 dB. However, the structure still faces the issue of having a large overall size. An active quasi-circulator module consisting of two unidirectional general-purpose amplifiers and an inverting power splitter/combinator is presented [18]. The unidirectional characteristics of the amplifiers and power divider enable unidirectional signal propagation. A quasi-circulator structure composed of two isolators and a Wilkinson power divider (WPD) [19]. The isolators limit the direction in which the signal can travel, whereas the Wilkinson power divider provides primary isolation between the TX and RX ports. This design encounters issues like limited bandwidth and significant insertion loss. To address this, a quasi-circulator structure utilizing a lumped Wilkinson power divider has been proposed [20]. The design consists of a power amplifier, a Wilkinson power divider, and a low-noise amplifier. The test results indicate that the quasi-circulator achieves over 29.5 dB isolation between the TX and RX ports, with transmission gains of 4.1 dB and 7.8 dB in the TX-to-ANT and ANT-to-RX directions, respectively. However, the structure still suffers from limited bandwidth. The second category is based on the principle of phase cancellation, which generates a cancellation signal that is 180° out of phase with the interfering signal to achieve isolation between TX and RX [21,22,23,24,25,26,27]. However, it is often challenging to balance wide bandwidth, insertion loss, and isolation performance.

This paper presents the design of an active quasi-circulator that combines wideband characteristics, low insertion loss, and high isolation performance. The structure employs a second-order Wilkinson power divider and two power amplifiers with high gain and ultra-low noise characteristics. This design effectively suppresses mutual interference between transmit and receive signals by utilizing the unidirectional conduction property of transistors and the isolation effect of the resistors in the power divider. Additionally, the dual-amplifier configuration eliminates the need for additional power amplification circuits. Measurement results indicate that the active quasi-circulator achieves a 25% relative bandwidth, with an isolation greater than 20 dB between the TX and RX ports. The transmission gains from TX to antenna and from antenna to RX are 3.1–8.7 dB and 2.7–4.0 dB, respectively, and the return loss at each port is better than 10 dB. The structure of this paper is as follows: In Section 2, the circuit design process is thoroughly elaborated, covering the second-order Wilkinson power divider, receive amplifier circuit, transmit amplifier circuit, and the integrated design of an active quasi-circulator; Section 3 presents and analyzes the experimental results; and Section 4 summarizes and discusses the work and outlook of the study.

2. Circuit Design

2.1. Topological Structure

The proposed circuit configuration, illustrated in Figure 2, primarily comprises three parts: the power division circuit, the TX circuit, and the RX circuit. To broaden the AQC’s operating bandwidth, a second-order WPD is used. Both the transmitting and receiving amplifier circuits employ BFP740 (Infineon, Beijing, China) transistors, known for their high gain and low noise, making them ideal for high-performance wireless communication applications. The EM signal is initially introduced through the TX; it is then passed through the transmit input matching circuit, the transmit amplifier circuit, and the transmit output matching circuit, before finally being delivered to one branch of the power splitter. As a result of the isolation effect of the resistors (R₁ and R₂) in the power distribution circuit, most of the signal is transmitted to the power combining port. Similarly, the EM signals received by the antenna are also input through the power combining port. Because of the resistors’ isolation effect in the power distribution circuit and the transistor’s one-way transmission property, the signal can only pass through the receiving branch. As a result, the circuit effectively prevents interference between transmitting and receiving signals by leveraging the transistor’s unidirectional conduction and the resistors’ isolation in the power distribution, thereby achieving the function of a quasi-circulator. Furthermore, a key benefit of this circuit is that it amplifies both received and transmitted EM signals through two transistor amplifiers, removing the requirement for a separate signal power amplification stage and greatly enhancing the overall efficiency of the circuit design.

The gain between TX and ANT, the gain between ANT and RX, the isolation from TX to RX port, and the isolation from RX to TX port can be expressed by Equations (1), (2), (3), and (4), respectively. G_PA, G_LNA, Iso_PA, and Iso_LNA represent the gain and reverse isolation of the power amplifier (PA) and low-noise amplifier (LNA), while Iso_WPD represents the isolation of the power divider. Equation (1) indicates that when the electromagnetic signal from TX is input to the PA, the signal power is increased by G_PA, and after passing through the power distribution circuit, fifty percent of the EM power is delivered to the ANT port. While the remaining power is dissipated in the resistors. Equation (3) shows that when the electromagnetic signal from TX leaks into RX through the power distribution circuit, it is amplified by both the PA and LNA while being attenuated through the resistors in the power distribution circuit. Therefore, PA and LNA do not need to be designed with high gain, as this would reduce the isolation between the TX and RX ports [20].

$$G_{TX-ANT}=G_{PA}-3\mathrm{dB}$$

(1)

$$G_{ANT-RX}=G_{LNA}-3\mathrm{dB}$$

(2)

$$Is{o}_{TX-RX}=Is{o}_{WPD}-G_{PA}-G_{LNA}$$

(3)

$$Is{o}_{RX-TX}=Is{o}_{LNA}+Is{o}_{WPD}+Is{o}_{PA}$$

(4)

2.2. Design of the Second-Order Wilkinson Power Divider

The power distribution circuit, which is the passive section of the entire active quasi-circulator, is implemented based on a WPD. According to Equation (3), to achieve high isolation between the transmitting and receiving circuits, the isolation of the power distribution circuit must be sufficiently high. Additionally, to extend the operating bandwidth of the active quasi-circulator, a second-order Wilkinson power divider with wider bandwidth characteristics and higher isolation is employed.

The equivalent transmission line model of the second-order two-way WPD is given in Figure 3. This circuit is analyzed using the odd-even mode analysis method. Under even-mode excitation, the circuit exhibits symmetric behavior, with no current flowing through the isolation resistor, which behaves like an open circuit. At this point, the simplified equivalent circuit model is shown in Figure 3b. For port 1, the odd-mode excitation has no effect, so the reflection coefficient at port 1 is the same as the magnitude of the reflection coefficient in the even-mode equivalent circuit. It can be seen that the even-mode equivalent circuit is equivalent to a quarter-wavelength step impedance transformer with an impedance ratio of 2 at both ends. Within the operating bandwidth, the circuit is set to satisfy the Chebyshev ripple characteristic, with a relative bandwidth of 90%. From the table, we find that Z₁ = 62 Ω and Z₂ = 80 Ω.

Under odd-mode excitation, the center of the isolation resistor becomes grounded; the corresponding simplified equivalent circuit is presented in Figure 3c. With θ₁ = θ₂, the reflection coefficient at port 2 can be calculated using the following formula based on transmission line theory:

$$Z_{ino}^{\prime }={\displaystyle \frac{j{R}_1{Z}_1\tan {\theta }_1}{R_1+j2Z_1\tan {\theta }_1}}$$

(5)

$$Z_{ino}={\displaystyle \frac{Z_2{R}_2(Z_{ino}^{\prime }+j{Z}_2\tan {\theta }_2)}{Z_2(2Z_{ino}^{\prime }+R_2)+j(2{Z_2}^2+R_2{Z}_{ino}^{\prime })\tan {\theta }_2}}$$

(6)

$${\mathrm{\Gamma }}_{ino}={\displaystyle \frac{Z_{ino}-Z_0}{Z_{ino}+Z_0}}={\displaystyle \frac{a_1+j{b}_1}{a_2+j{b}_2}}$$

(7)

where

$$a_1=-R_1{R}_2{Z}_0{Z}_2+Z_1\left(R_1{R}_2{Z}_0-2\left(R_2-2Z_0\right){Z_2}^2\right){\tan {\theta }_2}^2$$

$$b_1=Z_2\left(-2R_2{Z}_0{Z}_1+R_1\left(R_2-2Z_0\right)\left(Z_1+Z_2\right)\right)\tan {\theta }_2$$

$$a_2=R_1{R}_2{Z}_0{Z}_2-Z_1\left(R_1{R}_2{Z}_0+2\left(R_2+2Z_0\right){Z_2}^2\right){\tan {\theta }_2}^2$$

$$b_2=Z_2\left(2R_2{Z}_0{Z}_1+R_1\left(R_2+2Z_0\right)\left(Z_1+Z_2\right)\right)\tan {\theta }_2$$

There exist θ₁ = θ₂ = θ₃ such that the reflection coefficient is zero, at which point a₁ = 0 and b₁ = 0. From this, R₁ and R₂ can be determined as follows:

$$R_1={\displaystyle \frac{2Z_1{Z}_2\tan {\theta }_3}{\sqrt{-Z_2(Z_1+Z_2)+({Z_1}^2+Z_1{Z}_2){\tan {\theta }_3}^2}}}$$

(8)

$$R_2={\displaystyle \frac{4Z_0{Z}_1{Z_2}^2{\tan {\theta }_3}^2}{R_1{Z}_0{Z}_2+(-R_1{Z}_0{Z}_1+2Z_1{Z_2}^2){\tan {\theta }_3}^2}}$$

(9)

Based on the linear mapping relationship between the reflection coefficient and the second-order Chebyshev polynomial (|T₂(x)| = |2x² − 1|), θ₃ can be determined as follows:

$${\theta }_3=90°\left[1-{\displaystyle \frac{1}{\sqrt{2}}}\left({\displaystyle \frac{f_2/f_1-1}{f_2/f_1+1}}\right)\right]$$

(10)

where f₁ and f₂ are the passband edge frequencies.

In this paper, the edge frequencies are f₁ = 3  GHz and f₂ = 8  GHz, which results in θ₃ = 61°, R₁ = 117  Ω, and R₂ = 171  Ω. Considering the practical values of the resistors, R₁ = 100 Ω and R₂ = 200  Ω are chosen. These parameter values are used as the initial values for simulation optimization, with an FR4 dielectric substrate having a thickness of 0.6 mm and a relative permittivity of 4.4. The circuit layout and simulated S-parameters of the second-order Wilkinson power divider are shown in Figure 4. Over the frequency range of 3 GHz to 8 GHz, the circuit achieves an insertion loss below 3.5 dB, with both input and output return losses and isolation exceeding 20 dB. Additionally, the isolation response exhibits two distinct peaks.

2.3. Modeling and Simulation of Active Quasi-Circulation

Following the design of the isolation circuit, the transceiver amplifiers within the quasi-circulator must be simulated. The performance of these amplifiers depends heavily on their core active devices. Transistor selection follows several key principles: suitability for the target circuit, availability of complete parametric data, and a favorable balance between performance and cost. To minimize the effect of transistor noise on electromagnetic signal reception and transmission, the low-noise transistor BFP740 from Infineon was selected. This device offers excellent noise performance, high gain, and strong linearity across the 5–6 GHz band. Specifically, at 5.5 GHz, the BFP740 achieves a noise figure below 0.85 dB (at 3 V, 6 mA) and provides over 15 dB of gain (at 3 V, 12 mA). Furthermore, its SOT-343 package is both economical and facilitates straightforward soldering.

Upon selection of the suitable transistor, a DC scan (Figure 5) was conducted to identify its optimal operating point. Establishing an appropriate static operating point is essential for the correct operation of both the receiver and transmitter amplifier circuits, and serves as the foundation for designing the bias network. According to the transistor datasheet and simulation data, the final DC operating point was chosen at Vce = 3 V and Ic = 10 mA.

The receiving amplifier circuit consists of a DC biasing circuit, an input/output matching network, and a negative feedback stabilization circuit, as shown in Figure 6. The primary function of the DC biasing circuit is to isolate the RF signal while allowing DC to pass through. A classic λ/4 high-impedance line in parallel with a λ/4 fan-shaped open-line structure is employed. The DC biasing circuit decouples the DC bias from the RF path, ensuring the RF impedance remains unaffected. The circuit is powered by a 5 V single supply and utilizes three resistors (R₅, R₆, and R₇) for voltage division to achieve the required DC operating voltage. A 100 pF DC blocking capacitor is placed at both the input and output to isolate the signal from the DC power supply. This input/output matching network ensures the seamless transmission of the RF signal from the power splitter port to the transistor, and subsequently from the transistor to the output port. A high-low impedance matching network is utilized, where the length and width of the microstrip lines are optimized to achieve proper impedance matching.

The negative feedback stabilization circuit is employed to ensure the stability of the amplifier’s operating state and effectively prevent the occurrence of oscillations. This circuit implements negative feedback through the configuration of an emitter resistor and a parallel capacitor. The principle of the emitter resistor’s negative feedback is as follows: when the output current increases, the emitter current also increases, resulting in a rise in emitter voltage. As the emitter voltage increases, the voltage difference between the base and emitter decreases, which in turn suppresses the increase in base current and limits the growth of the collector current. The primary function of the parallel capacitor is to stabilize the amplifier’s gain and improve its frequency response. At low frequencies, the capacitor behaves like an open circuit, thereby not affecting the negative feedback action of the emitter resistor and ensuring stable gain. At high frequencies, the capacitor provides a low-impedance path for the signal, thus eliminating the effect of the emitter resistor on the high-frequency signal gain, preventing gain degradation, and ensuring stable amplifier operation. WithAdvanced Design System (version 2024) simulation, the stability of the amplifier circuit can be assessed using the stability control parameter StabFact. When the stability factor K > 1, the amplifier circuit is considered to operate stably.

The simulated performance of the receiving amplifier is illustrated in Figure 7. Within the 4.5–6.5 GHz frequency band, the return loss |S₁₁| ranges from 9 dB to 25 dB, the transmission gain |S₂₁| varies from 8.6 dB to 13.0 dB, and the reverse isolation |S₁₂| is greater than 25 dB. This indicates that the receiving circuit possesses a relatively wide impedance matching bandwidth and is capable of effectively achieving unidirectional signal transmission and electromagnetic signal amplification. From the stability curve, it can be observed that the operating state of the receiving circuit is stable.

After completing the design of the receiving amplifier circuit, the next step is to design the transmitting amplifier circuit. Due to the opposite directions of the transistors in the transmitting and receiving circuits, the receiving circuit cannot be directly applied to the transmitting circuit, necessitating a redesign and simulation. However, the circuit design principles and methods for both are the same. Consequently, high-low impedance lines remain employed in the transmitter amplifier to achieve optimal matching; the simulation schematic is provided in Figure 8.

The simulated performance of the transmit amplifier circuit is shown in Figure 9. In the 4.5–6.5 GHz frequency band, the return loss |S₁₁| ranges from 6 dB to 40 dB, the transmission gain |S₂₁| varies from 10.4 dB to 16.0 dB, and the reverse isolation |S₁₂| is greater than 25 dB. This indicates that the transmitting circuit is capable of unidirectional signal transmission and amplification. The circuit’s impedance matching performance meets the design requirements. The stability curve confirms that the circuit operates in a state of absolute stability.

Following the simulation of each AQC circuit section, overall optimization is necessary. To simplify the schematic simulation, the second-order WPD, receiving amplifier circuit (RX), and transmitting amplifier circuit (TX) are each exported as symbols, as shown in Figure 10. By adjusting the length of the output port of the power distribution circuit, a reasonable layout is achieved for the connection between the receiving and transmitting amplifier circuits.

The overall simulation results of the AQC are presented in Figure 11. As depicted in Figure 11a, the return loss (|S₁₁|, |S₂₂|, and |S₃₃|) at each port exceeds 20 dB across the 5–6 GHz band, demonstrating good port matching and efficient signal entry. Figure 11b indicates that the transmission gains (|S₂₁| and |S₁₃|) of both the receiving and transmitting amplifiers are above 9 dB. Meanwhile, Figure 11c reveals a reverse isolation (|S₁₂| and |S₃₁|) of over 25 dB in the operating band, confirming effective unidirectional signal transmission and suppression of reverse propagation. Finally, as illustrated in Figure 11d, the isolation between the receiver and transmitter amplifiers (|S₃₂| and |S₂₃|) remains greater than 20 dB from 5 to 6 GHz, ensuring minimal interference during simultaneous signal transmission and reception.

The preceding simulation data were obtained from the schematic design of the quasi-circulator, an approach valued for its computational speed and efficiency. However, actual circuit performance depends heavily on component selection and physical layout. To more accurately model real behavior, a schematic-layout co-simulation was conducted, as shown in Figure 12. The finalized structural dimensions and parameters of the AQC are listed in

Table 1. Physical dimensions (mm) and electrical component values of the active quasi-circulator.

Para 1	L1	L2	L3	L4	L5	L6	L7	L8	L9
Value	1.5	4.4	0.9	3.1	0.3	2.6	10	10	5.9
Para	L10	L11	L12	L13	L14	L15	L16	L17	L18
Value	6	9	7.4	7	9	7	12.6	45.8	11.8
Para	L19	L20	L21	L22	L23	L24	L25	L26	L27
Value	7.2	15.2	7	6.7	7	9	16	6.2	9.4
Para	L28	L29	W1	W2	W3	W4	W5	W6	W7
Value	6.5	7.4	1.1	0.4	0.7	0.4	3	1.3	0.6
Para	W8	W9	W10	W11	W12	W13	W14	W15	W16
Value	0.5	1.1	1.7	1.7	2.2	0.5	2	4	2.2
Para	W17	R1	R2	R3	R4		R5	C1~6
Value	0.5	100 Ω	200 Ω	100 Ω	1.3 kΩ		100 Ω	100 nF

¹ parameter.

. During layout optimization, particular emphasis was placed on refining passive components—especially mitigating electromagnetic coupling between microstrip lines-to maintain intended circuit performance.

By optimizing the layout of the quasi-circulator, the final simulation results were obtained, as shown in Figure 13. As seen in Figure 13a, within the 5 GHz to 6 GHz frequency band, the port return loss (|S₁₁|, |S₂₂|, and |S₃₃|) exceeds 15 dB, suggesting excellent impedance matching and efficient signal entry in all three channels of the quasi-circulator. From Figure 13b, it can be observed that the transmission gains of the receiving amplifier circuit and transmitting amplifier circuit (|S₂₁| and |S₁₃|) are both greater than 4.9 dB in the 5 GHz to 6 GHz frequency band, suggesting that the active quasi-circulator operates stably and is capable of amplifying the electromagnetic signal to a certain level. Figure 13c shows that the reverse isolation (|S₁₂| and |S₃₁|) is greater than 20 dB across the operating frequency band, indicating that the quasi-circulator can achieve unidirectional electromagnetic signal transmission. Figure 13d demonstrates that the isolation between the receiving amplifier circuit and the transmitting amplifier circuit (|S₃₂| and |S₂₃|) is greater than 20 dB in the 5–6 GHz frequency band, ensuring that electromagnetic signals do not interfere with each other during transmission and reception. By comparing the schematic and layout simulation results, it can be seen that the performance difference between the schematic and layout of the quasi-circulator circuit is minimal, fully meeting the design requirements and specifications.

3. Measurement and Discussion

The simulation-optimized AQC was fabricated and experimentally characterized. The circuit was implemented on an FR4 dielectric substrate with a thickness of 0.6 mm, a relative dielectric constant of 4.4, and a loss tangent of 0.02. S-parameter measurements were carried out using a DC power source and an Agilent N5244 vector network analyzer (Agilent Technologies, Santa Clara, CA, USA). A photograph of the fabricated circuit is provided in Figure 14.

The simulated and measured performance of the AQC is compared in Figure 15. Across the frequency band from 4.75 GHz to 6.11 GHz, the return loss at each port (|S₁₁|, |S₂₂|, and |S₃₃|) remains above 10 dB, indicating good port matching and efficient signal entry across all three channels. The transmission gains between the TX-to-antenna and antenna-to-RX paths (|S₂₁| and |S₁₃|) range from 3.1 to 8.7 dB and 2.7–4.0 dB, respectively, demonstrating stable amplification in both receive and transmit chains. Isolation between the TX and RX ports (|S₂₃| and |S₃₂|) exceeds 20 dB, ensuring minimal interference during operation. The active quasi-circulator achieves a relative bandwidth of 25%. Minor discrepancies between simulation and measurement are attributed to substrate permittivity variation, fabrication tolerances, and connector soldering, yet the overall performance shows good agreement.

The performance comparison between the proposed circuit and existing circulators is given in

Table 2. Comparison of performance between this study and previous works.

Ref.	Process	f (GHz)	FBW 1	RL (dB) 2	IL (dB) 3	Iso (dB) 4	Type
This work	PCB	4.75~6.11	25%	>10	−2.7~−8.7	>20	Quasi-
[13]	CMOS	9.75~10.25	5%	>10	0~2.5	>35	Quasi-
[24] Work#2	CMOS	8.4~11.1	27%	>10	6.1~8	>25	3-port
[25]	CMOS	1.5~2.7	57%	>10	−1.5~2.4	>26	Quasi-
[27]	PCB	0.8~2.2	93%	>10	−1.5~1.5	>15	Quasi-

¹ Fractional Bandwidth. ² Return loss. ³ Insertion loss. ⁴ Isolation.

. Compared with active quasi-circulators based on the phase-cancelation principle (references [24,25,27]), the proposed active quasi-circulator provides forward transmission gain across the entire operating frequency band, with transmission gains reaching up to 8.7 dB at certain frequency points, significantly outperforming other designs. Unlike the CMOS technology employed in references [13,24,25], the proposed design utilizes PCB technology, offering lower cost and more convenient processing advantages. Furthermore, the operating frequency band of the proposed active quasi-circulator is 4.75–6.11 GHz (C-band), which is suitable for modern wireless communication, particularly the 5G frequency band. Therefore, the core innovation of the proposed quasi-circulator lies in maximizing the gain of the active circulator, effectively addressing the high insertion loss problem associated with traditional circulators, while also balancing high-frequency performance, excellent isolation, and the cost advantages offered by PCB technology.

4. Conclusions

This work introduces an AQC featuring a compact, integration-friendly topology and strong RF performance. The design combines the WPD structure and the unidirectional transmission characteristics of transistors. Receive/transmit paths are isolated using a pair of resistors, while stepped-impedance networks provide impedance matching to maintain low-loss transmission at each port. A dual-amplifier arrangement enables in-line gain, removing the need for a separate power-amplifier stage, which both simplifies the overall system and reduces power draw. A fabricated prototype was measured and compared with simulation, showing closely aligned results and confirming reliable operation across 4.75–6.11 GHz.