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Computer Engineering Education Experiences with RISC-V Architectures—From Computer Architecture to Microcontrollers

1
Electrical and Computer Engineering, Miami University, Oxford, OH 45056, USA
2
Secure, Trusted, and Assured Microelectronics Center, Arizona State University, Tempe, AZ 85281, USA
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Author to whom correspondence should be addressed.
Author in Original Conference Paper, McGrew, T.; Schonauer, E. Framework and Tools for Undergraduates Designing RISC-V Processors on an FPGA in Computer Architecture Education. In Proceedings of the 2019 International Conference on Computational Science and Computational Intelligence (CSCI), Las Vegas, NV, USA, 5–7 December 2019; pp. 778–781.
Academic Editors: Teresa Cervero, Kevin Martin, Mario Kovač and Maurizio Martina
J. Low Power Electron. Appl. 2022, 12(3), 45; https://doi.org/10.3390/jlpea12030045
Received: 2 June 2022 / Revised: 21 July 2022 / Accepted: 23 July 2022 / Published: 9 August 2022
(This article belongs to the Special Issue RISC-V Architectures and Systems: Hardware and Software Perspectives)
With the growing popularity of RISC-V and various open-source released RISC-V processors, it is now possible for computer engineers students to explore this simple and relevant architecture, and also, these students can explore and design a microcontroller at a low-level using real tool-flows and implement and test their hardware. In this work, we describe our experiences with undergraduate engineers building RISC-V architectures on an FPGA and then extending their experiences to implement an Arduino-like RISC-V tool-flow and the respective hardware and software to handle input-output ports, interrupts, hardware timers, and communication protocols. The microcontroller is implemented on an FPGA as a Senior Design project to test the viability of such efforts. In this work, we will explain how undergraduates can achieve these experiences including preparation for these projects, the tool-flows they use, the challenges in understanding and extending a RISC-V processor with microcontroller functionality, and a suggestion of how to integrate this learning into an existing curriculum, including a discussion on if we should include these deeper experiences in the Computer Engineering undergraduate curriculum. View Full-Text
Keywords: RISC-V; FPGA; computer architecture; microcontroller; undergraduate curriculum RISC-V; FPGA; computer architecture; microcontroller; undergraduate curriculum
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MDPI and ACS Style

Jamieson, P.; Le, H.; Martin, N.; McGrew, T.; Qian, Y.; Schonauer, E.; Ehret, A.; Kinsy, M.A. Computer Engineering Education Experiences with RISC-V Architectures—From Computer Architecture to Microcontrollers. J. Low Power Electron. Appl. 2022, 12, 45. https://doi.org/10.3390/jlpea12030045

AMA Style

Jamieson P, Le H, Martin N, McGrew T, Qian Y, Schonauer E, Ehret A, Kinsy MA. Computer Engineering Education Experiences with RISC-V Architectures—From Computer Architecture to Microcontrollers. Journal of Low Power Electronics and Applications. 2022; 12(3):45. https://doi.org/10.3390/jlpea12030045

Chicago/Turabian Style

Jamieson, Peter, Huan Le, Nathan Martin, Tyler McGrew, Yicheng Qian, Eric Schonauer, Alan Ehret, and Michel A. Kinsy. 2022. "Computer Engineering Education Experiences with RISC-V Architectures—From Computer Architecture to Microcontrollers" Journal of Low Power Electronics and Applications 12, no. 3: 45. https://doi.org/10.3390/jlpea12030045

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