Implementation of Power-Efficient Class AB Miller Amplifiers Using Resistive Local Common-Mode Feedback

Abstract

An approach to implement single-ended power-efficient static class-AB Miller op-amps with symmetrical and significantly enhanced slew-rate and accurately controlled output quiescent current is introduced. The proposed op-amp can drive a wide range of resistive and capacitive loads. The output positive and negative currents can be much higher than the total op-amp quiescent current. The enhanced performance is achieved by utilizing a simple low-power auxiliary amplifier with resistive local common-mode feedback that increases the quiescent power dissipation by less than 10%. The proposed class AB op-amp is characterized by significantly enhanced large-signal dynamic, static current efficiency, and small-signal figures of merits. The dynamic current efficiency is 15.6 higher, the static current efficiency is 10.6 times higher, and the small-signal figure of merit is 2.3 times higher than the conventional class-A op-amp. A global figure of merit that determines an op-amp’s ultimate speed is 6.33 times higher than the conventional class A op-amp.

1. Introduction

The Miller op-amp is the essential building block of analog integrated circuits [1,2]. In the conventional class-A Miller op-amp with an NMOS input stage [2,3] shown in Figure 1a, the NMOS output transistor limits the peak negative output current to a value I_outQ corresponding to the output branch’s quiescent current. This imposes a severe limitation in the op-amp’s negative slew rate (SR⁻). This can be expressed as SR⁻ = (I_outQ − I_RL)/(C_C + C_L), where C_C and C_L are compensation and load capacitors and I_RL is the current of the resistive load. Many approaches have been proposed to implement Miller op-amps with static class-AB [4,5] output stages. This type of amplifier can drive a wide range of capacitive and resistive loads down to very low frequencies or DC. They are required to have approximately symmetrical slew rates and to be able to generate symmetrical peak load positive and negative output currents I_Outpk⁺ and I_Outpk⁻ much larger than the total op-amp quiescent current I_totQ. A common figure of merit to characterize the op-amp current efficiency CE = I_Outpk/I_totQ is defined as the ratio of the minimum of the positive and negative peak output currents I_Outpk = MIN{I_Outpk⁺, I_Outpk⁻} to I_totQ. The conventional class-A op-amp (Conv-A) is characterized typically by CE < 0.5. Many approaches to implementing class-AB op-amps are based on the floating battery [6] scheme shown in Figure 1b. The floating battery that exists between the gates of the PMOS and NMOS output transistors causes the voltage V_Y at the gate of the output NMOS transistor to follow the variations at node V_X, which is the high impedance output node of the differential input stage. The voltage V_X drives the output PMOS transistor M_OP. The small signal model of the class-AB op-amps based on the floating battery [6] scheme is shown in Figure 1c. In this, the ideal floating battery has been replaced by an AC short circuit. The output resistance R_Out is given by R_Out = R_oOP||r_oON||R_L. As the conventional Miller compensation is used in the op-amp, the transfer function of the circuit of Figure 1c can be written as Equation (1).

$$\mathrm{H}(\mathrm{s})=\frac{{\mathrm{A}}_{\mathrm{OLDC}}\left(1+\frac{\mathrm{s}}{{\mathsf{\omega }}_{\mathrm{z}}}\right)}{\left(1+\frac{\mathrm{s}}{{\mathsf{\omega }}_{\mathrm{pOut}}}\right)\left(1+\frac{\mathrm{s}}{{\mathsf{\omega }}_{\mathrm{pDOMX}}}\right)}$$

(1)

Here, ω_z, ω_pOut, and ω_pDOMX are given by the following expressions Equations (2)–(4).

$${\mathsf{\omega }}_{\mathrm{z}}=\frac{1}{\left[{\mathrm{R}}_{\mathrm{C}}-{\left({\mathrm{g}}_{\mathrm{mOP}}+{\mathrm{g}}_{\mathrm{mON}}\right)}^{-1}\right]{\mathrm{C}}_{\mathrm{C}}}$$

(2)

$${\mathsf{\omega }}_{\mathrm{pOut}}=\frac{({\mathrm{g}}_{\mathrm{mOP}}+{\mathrm{g}}_{\mathrm{mON}}+{\mathrm{R}}_{\mathrm{L}})}{{\mathrm{C}}_{\mathrm{L}}}$$

(3)

$${\mathsf{\omega }}_{\mathrm{pDOMX}}=1/{\mathrm{R}}_{\mathrm{X}}{\mathrm{C}}_{\mathrm{X}}$$

(4)

where C_X is given by C_X = (1 + |A_Out|) C_C, R_X = g_mr_o²/2, and |A_Out| is the gain of the output stage.

The operation of Class-AB op-amps based on the floating battery principle is discussed below:

(a)

Upon application of a positive step at V_in, the output of the op-amp provides a positive output current to the load. When the output slews in the positive direction, the voltage at node Vx is subject to a large negative variation, which is followed by the voltage at node V_Y until it reaches the bottom rail. This increases the current in M_OP and decreases the current in M_ON, bringing it to zero for large negative variations in V_Y that lead to V_GSON < V_TN, where V_TN is the threshold voltage of M_ON. Since V_X can have large negative variations, the peak positive output current I_Outpk⁺ provided by M_OP can be much larger than its quiescent current I_OutQ, and a large positive slew rate can be achieved. The situation is quite different for negative steps in V_in. In this case, V_X has a relatively limited excursion in the positive direction, which is transferred (in practice with some attenuation) to V_Y. This causes the current in M_OP to decrease (and eventually go to zero) and M_ON to increase. However, given that the variation in the positive direction of Vx and V_Y is much smaller than the variation in the negative direction, the op-amp’s peak negative output current I_Outpk⁻ generated by M_ON is in general much smaller than I_Outpk⁺. This leads to a negative slew rate, which can be much smaller than the positive slew rate. In practice, the smaller of the two slew rates determines the nominal op-amp’s slew rate SR ≡ MIN{SR⁺, SR⁻}.

(b)

The practical implementation of the floating battery scheme requires a control circuit to achieve the desired nominal output quiescent current I_OutQ, which adjusts the value of the floating battery V_BAT so that its value is well defined and remains constant, independent of temperature, process parameters, and supply voltage variations. It can be shown that, in saturation, I_OutQ is approximately given by, ${\mathrm{I}}_{\mathrm{outQ}}={\left[\left({\mathrm{V}}_{\mathrm{supply}}-{\mathrm{V}}_{\mathrm{BAT}}-\left|{\mathrm{V}}_{\mathrm{TP}}\right|-{\mathrm{V}}_{\mathrm{TN}}\right)/\left(\sqrt{1/{\mathsf{\beta }}_{\mathrm{N}}}+\sqrt{1/{\mathsf{\beta }}_{\mathrm{P}}}\right)\right]}^2$ where β_N, β_P, V_TN, and V_TP are the NMOS and PMOS output transistors’ gain factors and threshold voltages, respectively. A control circuit to adjust the value of V_BAT is required since a fixed V_BAT value would lead to large variations in I_OutQ with changes in V_supply, V_TN, V_TP, β_N, or β_P. An example of the class-AB output stage using a foating battery and a control circuit is shown in Figure 2. In this example, the floating battery is implemented using a voltage follower. The circuit implementation of both V_BAT and the control circuit [7,8] can be relatively complex (as shown in Figure 2b and in the circuit of [8]) and increases the total op-amp’s quiescent current. This can significantly lower the current efficiency of the class-AB op-amp. In some cases, it can also increase the supply requirements beyond the nominal supply voltage of the implementation technology, which has been reduced to sub-volt values (V_supply < 1 V) in modern CMOS technologies.

This paper introduces a simple scheme that overcomes the shortcomings discussed above, requiring minimal additional power dissipation and not increasing the supply requirements. This scheme is discussed in the next section. Traditionally, the performance of op-amps is compared using three well-known figures of merit: (a) the small-signal figure of merit FOM_SS = f_u·C_L/P_Q, where f_u is the unity-gain frequency and P_Q is the quiescent power of the op-amp; (b) the large-signal static current efficiency figure of merit FOM_CEStat = I_outpkRL/P_Q; and (c) the large-signal dynamic current efficiency figure of merit FOM_CEDyn = SR·C_L/P_Q, which is related to the maximum dynamic output current in load capacitance C_L. FOM_CEStat is determined by the maximum DC output current in the load resistor R_L (denoted I_outpkRL) relative to the total quiescent power P_Q of the op-amp. In addition, as both FOM_SS and FOM_CEDyn determine the ultimate speed of an op-amp, a new global figure of merit FOM_Global given by ${\mathrm{FOM}}_{\mathrm{Global}}=\sqrt{{\mathrm{FOM}}_{\mathrm{SS}}{\mathrm{FOM}}_{\mathrm{CEDyn}}}$ is also used here.

2. Circuit Description

The scheme of the proposed op-amp is shown in Figure 3a. A telescopic input stage is used in the first stage to achieve high gain even in the presence of a low-valued load resistor R_L (high loading conditions) that can degrade the second stage gain significantly. The proposed op-amp uses an auxiliary non-inverting amplifier with gain A_aux to generate a voltage variation V_Y, which is an amplified version of the variations in V_X, that is, V_Y = A_auxV_X. This auxiliary amplifier consumes less than 10% of the op-amp’s total bias current and does not increase supply requirements. The transistor-level implementation of the auxiliary amplifier is shown in Figure 3b. It uses a differential stage with resistive common-mode feedback (RCMFB) that has approximately a gain A_aux = (g_m4R_CMF)/2, as shown in the analysis below. The auxiliary amplifier increases the op-amp’s output negative current; the open-loop DC gain shifts the output poles to the higher frequency, allowing for a higher unity gain frequency. The quiescent voltage of V_Y has a value V_YQ = V_GSQM5P independent of R_CMF (and of A_Aux). This allows to accurately control the quiescent current I_OutQ in the op-amp’s output branch independent of the gain A_aux, supply voltage, technology parameters variations, and temperature changes. Given that the variations generated at V_Y are amplified with respect to those at Vx, M_ON can provide large negative output currents even though the amplitude of positive variations in V_X is smaller than that for negative variations. This overcomes one of the limitations of the conventional battery approach shown in Figure 1b.

In order to prevent degradation of the phase margin of the op-amp, the value of R_CMF (and A_aux) is chosen in such a way that the pole at node Y is higher than the unity gain frequency f_u of the op-amp by at least a factor of 3. Thus, the selection of the optimal value of R_CMF is the crucial factor for the design of the proposed auxiliary amplifier. Larger values of R_CMF lead to enhanced negative output currents and gains, resulting in lower values for the pole at node Y and lower phase margin.

In the presence of positive signals in V_X larger than V_SDsat4, all of the tail current of M_TAILAUX flows through M_4P and R_CMF. This causes a large positive voltage change at node V_Y that generates large negative op-amp output currents. In order to achieve similar peak positive and negative output currents with the selected value of R_CMF, the output transistors M_ON and M_OP are scaled by factor 5/1 and factor 8/0.7 with respect to the unit PMOS and NMOS transistors of size 10/0.27 used in the input stage. In addition, conventional Miller compensation is used to achieve stability.

2.1. Operation

The working principle of the proposed op-amp can be explained by considering its voltage follower operation. In the presence of the positive input signal V_in, the voltage at node V_X decreases and the voltage at node V_Y also decreases by a factor A_aux. As a result, M_OP provides a large positive current, and the drain current of M_ON decreases and eventually reaches zero. On the other hand, for negative input signals, the voltage at node V_Y corresponds to the amplified version of the positive signals of node V_X, which is V_Y = A_auxV_X. As a result, M_ON can also provide large negative output currents.

2.2. Frequency Response

Conventional Miller compensation is used in the proposed op-amp. The proposed op-amp has one dominant pole ω_pDOMX at node V_X and two high-frequency poles ω_pY and ω_pOut. The zero ω_z approximately nullifies the effect of ω_pOut.

Thus, the transfer function of the proposed op-amp is given by Equation (5).

$$\mathrm{H}(\mathrm{s})\approx \frac{{\mathrm{A}}_{\mathrm{OLDC}}\left(1+\mathrm{s}/{\mathsf{\omega }}_{\mathrm{z}}\right)}{\left(1+\mathrm{s}/{\mathsf{\omega }}_{\mathrm{pDOMX}}\right)\left(1+\mathrm{s}/{{\mathsf{\omega }}_{\mathrm{p}}}_{\mathrm{Out}}\right)\left(1+\mathrm{s}/{{\mathsf{\omega }}_{\mathrm{p}}}_{\mathrm{Y}}\right)}$$

(5)

The gain of the first stage A_I is given by Equation (6).

$${\mathrm{A}}_{\mathrm{I}}={\mathrm{g}}_{\mathrm{m}1}{\mathrm{R}}_{\mathrm{X}}={\mathrm{g}}_{\mathrm{m}1}\left({\mathrm{g}}_{\mathrm{m}}{{\mathrm{r}}_{\mathrm{o}}}^2/2\right)$$

(6)

Here, for simplicity, g_m is the transconductance gain of all unit size NMOS and PMOS transistors, r_o is their output resistance, and R_X is resistance at node V_X. The auxiliary amplifier’s gain is given by A_aux = (g_m4R_Y)/2, where ${\mathrm{R}}_{\mathrm{Y}}={\mathrm{r}}_{\mathrm{o}4\mathrm{P}}·{\mathrm{g}}_{\mathrm{mCP}2\mathrm{P}}{\mathrm{r}}_{\mathrm{oCP}2\mathrm{P}}\left|\right|{\mathrm{R}}_{\mathrm{CMF}}\left|\right|{\mathrm{r}}_{\mathrm{o}5\mathrm{P}}$. As R_CMF << r_o4P, r_oCP2P, r_o5P, R_Y ≈ R_CMF and A_aux ≈ (g_m4R_CMF)/2.

The gain of the output stage is given by Equation (7).

$${\mathrm{A}}_{\mathrm{Out}}=\left({\mathrm{g}}_{\mathrm{mOP}}+{\mathrm{A}}_{\mathrm{aux}}{\mathrm{g}}_{\mathrm{mON}}\right){\mathrm{R}}_{\mathrm{Out}}$$

(7)

where R_Out is ${\mathrm{R}}_{\mathrm{Out}}={\mathrm{r}}_{\mathrm{oOP}}\left|\right|{\mathrm{r}}_{\mathrm{oON}}\left|\right|{\mathrm{R}}_{\mathrm{L}}$.

Thus, the open-loop DC gain A_OLDC of the proposed op-amp is expressed by Equation (8).

$${\mathrm{A}}_{\mathrm{OLDC}}={\mathrm{A}}_{\mathrm{I}}{\mathrm{A}}_{\mathrm{Out}}=\left({\left({\mathrm{g}}_{\mathrm{m}}{\mathrm{r}}_{\mathrm{o}}\right)}^2/2\right)\left({\mathrm{g}}_{\mathrm{mouteff}}{\mathrm{R}}_{\mathrm{Out}}\right)$$

(8)

where g_mouteff = g_mOP + A_auxg_mON and R_Out = r_OP||r_ON||R_L.

The dominant pole is at node V_X and is given by Equation (9).

$${\mathrm{f}}_{\mathrm{pDOMX}}=1/\left(2\mathsf{\pi }{\mathrm{R}}_{\mathrm{X}}{\mathrm{C}}_{\mathrm{X}}\right)$$

(9)

where C_X is given by C_X = (1 + |A_out|) C_C.

Thus, the gain-bandwidth product (GBW) of the proposed op-amp is given by Equation (10).

$$\begin{array}{l}\mathrm{GBW}={\mathrm{A}}_{\mathrm{I}}{\mathrm{A}}_{\mathrm{Out}}\frac{1}{2\mathsf{\pi }{\mathrm{R}}_{\mathrm{X}}\left(1+\left|{\mathrm{A}}_{\mathrm{Out}}\right|\right){\mathrm{C}}_{\mathrm{C}}}\\ =\left({\mathrm{g}}_{\mathrm{m}1}{\mathrm{A}}_{\mathrm{Out}}\right)\frac{1}{2\mathsf{\pi }\left(1+\left|{\mathrm{A}}_{\mathrm{Out}}\right|\right){\mathrm{C}}_{\mathrm{C}}}\end{array}$$

(10)

Besides the dominant pole, the proposed op-amp has two high-frequency poles: one at V_Y and another at V_Out. The output high-frequency pole f_pOut is given in Equation (11).

$${\mathrm{f}}_{\mathrm{pOut}}=\left({\mathrm{g}}_{\mathrm{mOP}}+{\mathrm{A}}_{\mathrm{aux}}{\mathrm{g}}_{\mathrm{mON}}{\mathrm{G}}_{\mathrm{L}}\right)/\left(2\mathsf{\pi }{\mathrm{C}}_{\mathrm{L}}\right)$$

(11)

The pole at node V_Y is expressed by Equation (12).

$${\mathrm{f}}_{\mathrm{pY}}=1/\left(2\mathsf{\pi }{\mathrm{R}}_{\mathrm{Y}}{\mathrm{C}}_{\mathrm{Y}}\right)$$

(12)

where C_Y is given by ${\mathrm{C}}_{\mathrm{Y}}={\mathrm{C}}_{\mathrm{gsON}}+{\mathrm{C}}_{\mathrm{dBCP}2\mathrm{P}}+{\mathrm{C}}_{\mathrm{dB}5\mathrm{P}}+{\mathrm{C}}_{\mathrm{gdON}}\left(1+\left(\frac{{\mathrm{A}}_{\mathrm{Out}}}{{\mathrm{A}}_{\mathrm{VY}}}\right)\right)+{\mathrm{C}}_{\mathrm{gd}5\mathrm{P}}$ and ${\mathrm{R}}_{\mathrm{Y}}={\mathrm{r}}_{\mathrm{o}4\mathrm{p}}·{\mathrm{g}}_{\mathrm{mCP}2\mathrm{P}}·{\mathrm{r}}_{\mathrm{oCP}2\mathrm{P}}\left|\right|{\mathrm{R}}_{\mathrm{CMF}}\left|\right|{\mathrm{r}}_{\mathrm{o}5\mathrm{P}}$. The selection of R_CMF plays an important role in determining a compromise between the gain of the auxiliary amplifier and the phase margin of the op-amp. To achieve a sufficient phase margin, f_PY should be higher than the unity gain frequency of the op-amp. Thus, R_CMF has to be selected in such a way that the pole of the node Y, i.e., f_PY, is located at least a factor three higher than the op-amp’s unity gain frequency, and in that case, R_CMF << r_o5P,r_o4Pg_mCP2Pr_oCP2P and R_Y can be approximated as R_Y ≈ R_CMF. In this case, f_PY has a minor effect on the op-amp’s frequency response up to the unity gain frequncy f_u, and Equation (12) can be simplified as below.

$${\mathrm{f}}_{\mathrm{p}\mathrm{Y}}=1/\left(2\mathsf{\pi }{\mathrm{R}}_{\mathrm{CMF}}{\mathrm{C}}_{\mathrm{Y}}\right)$$

(13)

The zero is given by Equation (14).

$${\mathrm{f}}_{\mathrm{z}}=1/\left(2\mathsf{\pi }{\mathrm{C}}_{\mathrm{C}}\left[{\mathrm{R}}_{\mathrm{C}}-{\left({\mathrm{g}}_{\mathrm{m}\mathrm{O}\mathrm{P}}+{\mathrm{A}}_{\mathrm{Aux}}{\mathrm{g}}_{\mathrm{m}\mathrm{O}\mathrm{N}}\right)}^{-1}\right]\right)$$

(14)

The simplified transfer function of the proposed op-amp neglecting the pole at node Y can be approximated by Equation (15).

$$\mathrm{H}(\mathrm{s})\approx \frac{{\mathrm{A}}_{\mathrm{OLDC}}\left(1+\mathrm{s}/{\mathsf{\omega }}_{\mathrm{z}}\right)}{\left(1+\mathrm{s}/{\mathsf{\omega }}_{\mathrm{p}\mathrm{D}\mathrm{O}\mathrm{M}\mathrm{X}}\right)\left(1+\mathrm{s}/{\mathsf{\omega }}_{\mathrm{p}\mathrm{Out}}\right)}$$

(15)

The small-signal model of the proposed op-amp is given in Figure 4.

3. Results

The proposed and conventional class-A op-amps are designed in 130 nm CMOS technology. The unit size transistors used in both op-amps are (W/L)_N = (W/L)_P = 10/0.27 (µm/µm). The compensation capacitor has a value C_C = 4 pF for both op-amps. The compensation resistor R_C has a value 8 kΩ for the proposed op-amp and 19 kΩ for the Conv-A op-amp. For a fair comparison, the output transistors of the Conv-A op-amp M_OP are scaled by the same factor 8/0.7 and M_ON is by the same factor 5/1 as the proposed op-amp compared to the unit size transistors used in the circuit. They are simulated using the same bias current I_B = 15 µA, and dual supply voltages V_DD = +0.6 V and V_SS = −0.6 V. Figure 5 shows the open-loop frequency response of the proposed op-amp. The proposed op-amp has open-loop gains A_OLDC = 89.7 dB with R_L = 1 MΩ and 57 dB with R_L = 200 Ω, and C_L = 300 pF in both cases. On the other hand, the conventional class-A(Conv-A) op-amp can provide a maximum A_OLDC of 75.8 dB for R_L = 1 MΩ and only 43.4 dB with R_L = 200 Ω. Figure 6 shows the corresponding frequency response of the Conv-A op-amp with C_L = 300 pF.

The unity gain frequency f_u of the proposed op-amp for R_L = 1 MΩ is 16.9 MHz and for R_L = 200 Ω is 16.01 MHz. The small-signal figures of merit FOM_SS of the proposed op-amp are 28.8 and 27.2 for R_L = 1 MΩ and 200 Ω. The Conv-A op-amp’s FOM_SS for similar loading conditions are 12.4 and 10.8. Thus, the proposed op-amp can drive a low-value resistive load (high-loading condition) by maintaining a relatively high open-loop gain. It can be seen that, as expected, the introduction of the auxiliary amplifier in the proposed op-amp leads to lower gain degradation (and consequently, lower gain errors) for lower-valued load resistors.

Figure 7 shows the transient response of the proposed and Conv-A op-amp with R_L = 1 MΩ and C_L = 300 pF for a 500 kHz input pulse with 500 mVpp amplitude. It can be observed that the Conv-A op-amp cannot follow the input signal. From Figure 8, it can be asserted that this is because of the limitation of the peak negative output current, which corresponds to the quiescent current of the output branch in the Conv-A op-amp. From the pulse responses and load currents of the proposed and Conv-A op-amp for R_L = 1 MΩ, it can be asserted that the proposed op-amp increases the negative slew rate by a factor of 20 compared with the Conv-A op-amp. The SR enhances by a large factor close to 20 from 0.36 V/µs for the Conv-A to 7.4 V/µs for the proposed op-amp. Therefore, the CE of the proposed and Conv-A op-amps are 15.6 and 0.8, respectively.

From Figure 9, it can be asserted that the proposed op-amp can drive both large capacitive and low-valued resistive loads. Figure 10 shows the output current in the 200 Ω load resistor for the Conv-A and proposed op-amps for 500 mV_pp and 500 kHz input pulse. It can be seen that the proposed op-amp can provide 1.24 mA positive and negative peak output currents to a 200 Ω resistive load for a 500 mV_pp and 500 kHz input pulse. In contrast, the Conv-A op-amp with the same input signal can provide only a 105 $\mathsf{\mu }$A negative output current, which is limited by the quiescent current of the output branch.

Figure 11 and Figure 12 show the closed-loop frequency response of the proposed and Conv-A op-amps in the voltage follower configuration (VF). The proposed op-amp has 3 dB.

The bandwidth (BW) is 29 MHz for R_L = 1 MΩ and 26.4 MHz for R_L = 200 Ω. In comparison, the Conv-A op-amp has 8.37 MHz and 4.6 MHz 3 dB bandwidths for similar loading conditions. It can be seen that the proposed op-amp has a higher bandwidth than the Conv-A op-amp.

A corner analysis of the proposed op-amp was performed to verify its robustness against temperature, process variations, and mismatches in the values of the design components.

Table 1. Corner analysis of the op-amp at different temperatures.

At T = 27 °C							At T = 120 °C						At T = −20 °C
Corner	tt	ff	fs	sf	ss	SD	tt	ff	fs	sf	ss	SD	tt	ff	fs	sf	ss	SD
ITotalQ (µA)	147	148	146	146	146	0.8	163	167	163	164	160	2.2	135	135	133	134	134	0.75
THD (dB) at RL = 200 Ω	−66	−65	−66	−62	−60	2.4	−55	−50	−50	−49	−52	2.13	−65	−60	−61	−60	−62	1.9
fu (MHz) at RL = 200 Ω	16.9	17	16.7	16.7	16	0.3	11.62	11.12	11.36	11.59	11.83	0.24	19.14	19.4	19	18.9	18.4	0.33
PM (°) at RL = 1 MΩ	64.1	63	65	65	67	1.31	70	68	72	69	68	1.5	62	62	60	62	64	1.26
Gain	90	87.7	89.4	85.7	90	1.65	74	70	78	71	79	3.6	91.3	90.7	91.5	90.3	90	0.57
SR (V/µs)	7.4	7	7.1	7.7	7.1	0.25	7	7.09	7.6	7.3	7.9	0.3	7.3	7.7	7.4	7.2	6.9	0.26
Ioutpk−RL = 200 Ω (mA)	1.24	1.23	1.24	1.23	1.24	0.004	1.19	1.2	1.21	1.15	1.20	0.02	1.24	1.23	1.1	1.25	1.24	0.06

shows the corner analysis of the op-amp employing typical 2% mismatches in the differential pair and the resistors used in the auxiliary amplifier. It can be asserted that, from the corner analysis, the proposed op-amp is robust against the temperature and process variations.

Figures of merit FOM_CEDyn and FOM_CEStat of the proposed op-amp are 12.6 and 7. FOM_CEDyn and FOM_CEStat of the Conv-A op-amp are 0.8 and 0.66. Thus, the proposed op-amp achieved 16 times higher FOM_CEDyn and 10.6 times higher FOM_CEStat than the Conv-A op-amp.

Comprehensive comparisons of the proposed op-amp’s performance with state-of-the-art op-amps and Conv-A op-amp are shown in

Table 2. Summary of the results and performance comparison.

Parameter (Units)	Proposed	Conv-A	[8] 2020	[9] 2016	[10] 2016	[11] 2019	[12] 2017	[13] 2019	[14] 2020
Inversion level	SI	SI	SI	SI	SBT	SI	SBT	SI	SBT
CMOS process (µm)	0.13	0.13	0.5	0.18	0.18	0.18	0.35	0.18	0.18
Supply voltage (V)	±0.6	±0.6	1.2/2/2.5	1.8	0.7	1.8	0.9	1.8	±0.3
Capacitive load (pF)	300	300	16	200	20	100	10	5	10
Resistive Load (Ω)	1 M/200	1 M/200	-	-	-	-	-	1 k	-
SR (V/μs)	7.4	0.36	3.9/4.3/4.3	74.1	2.8	51	0.25	13.25	8.4
DC gain (dB)	89.7/57	75.8/43.44	69/70/70	72	57.5	98	65	105.5	42.2
PM (°)	64.1/76	75/97	58/58/58.5	50	60	71	60	53	54
fu (MHz)	16.9/16.0	6.6/5.72	8.3/8.4/8.5	86.5	3	21	1	231.7	16.1
CMRR at DC (dB)	71 at RL = 1 M	52 at RL = 1 M	69/70/64	NA	19	-	45	-	85.12
PSRR + at DC (dB)	109 at RL = 1 M	69 at RL = 1 M	73/73/73	NA	52.1	-	-	-	53.25
PSRR − at DC (dB)	99 at RL = 1 M	57 at RL = 1 M	73/73/72	NA	66.4	-	-	-	56.89
IOutpk+RL = 200 Ω (µA)	1241	1241	-	-	-	-	-	1200	-
IOutpk−RL = 200 Ω (µA)	1241	105	-	-	-	-	-	-	-
ItotQ (µA)	147	133	162/166/168	6611	36.3	1666.7	27	472	41.33
Power (μW)	176	159.6	244/332/420	11900	25.4	3000	24.3	850	24.8
FOMCEDyn (V.pF/µs.µW)	12.6	0.8	0.25/0.21/0.16	1.25	2.2	1.7	0.1	0.078	3.3
FOMSS (MHz.pF/µW)	28.8/27.2	12.4/10.8	0.54/0.4/0.3	1.45	2.36	0.7	0.4	1.4	6.49
FOMCEStat (µA/µW)	7	0.66	-	-	-	-	-	1.4	-
FOMGlobal	19	3	0.4/0.29/0.22	1.34	2.27	1.09	0.2	1.4	4.6

SI, strong inversion; SBT, sub-threshold.

. The proposed op-amp has the highest small-signal, dynamic, static current efficiency, and global figures of merits. It can be asserted that, from the comparison table, the proposed architecture can drive both resistive and capacitive load efficiently. The presence of the auxiliary amplifier in the prosed architecture makes this possible.

4. Conclusions

A simple class-AB Miller op-amp that can drive both resistive and capacitive loads is presented here. A compact auxiliary amplifier is used to provide the static class-AB operation and helps to achieve higher gain, bandwidth, and a well-defined output quiescent current. The proposed op-amp can provide a 13.9 dB higher open-loop gain, a factor 20 higher slew-rate, and a factor 3.3 to 5.7 higher bandwidth (in VF configuration) than the conventional op-amp at the expense of only 10% additional quiescent current compared to the Conv-A op-amp.