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An Approach for a Wide Dynamic Range Low-Noise Current Readout Circuit

Department of Electrical and Computer Engineering, Tufts University, 161 College Ave, Medford, MA 02155, USA
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J. Low Power Electron. Appl. 2020, 10(3), 23; https://doi.org/10.3390/jlpea10030023
Received: 14 May 2020 / Revised: 19 July 2020 / Accepted: 27 July 2020 / Published: 29 July 2020
Designing low-noise current readout circuits at high speed is challenging. There is a need for preamplification stages to amplify weak input currents before being processed by conventional integrator based readout. However, the high current gain preamplification stage usually limits the dynamic range. This article presents a 140 dB input dynamic range low-noise current readout circuit with a noise floor of 10 fArms/sq(Hz). The architecture uses a programmable bidirectional input current gain stage followed by an integrator-based analog-to-pulse conversion stage. The programmable current gains setting enables one to achieve higher overall input dynamic range. The readout circuit is designed and in 0.18 μm CMOS and consumes 10.3 mW power from a 1.8 V supply. The circuit has been verified using post-layout simulations. View Full-Text
Keywords: dynamic range; low-noise current amplification; programmable gain dynamic range; low-noise current amplification; programmable gain
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Wang, W.; Sonkusale, S. An Approach for a Wide Dynamic Range Low-Noise Current Readout Circuit. J. Low Power Electron. Appl. 2020, 10, 23.

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