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Open AccessArticle

Study of Silicon Nitride Inner Spacer Formation in Process of Gate-all-around Nano-Transistors

1
Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China
2
Microelectronics Institute, University of Chinese Academy of Sciences, Beijing 100049, China
3
State Key Laboratory of Advanced Materials for Smart Sensing, General Research Institute for Nonferrous Metals, Beijing 100088, China
4
College of Electronic and Information Engineering, North China University of Technology, Beijing 100144, China
5
Department of Electronics Design, Mid Sweden University, Holmgatan 10, 85170 Sundsvall, Sweden
*
Authors to whom correspondence should be addressed.
Nanomaterials 2020, 10(4), 793; https://doi.org/10.3390/nano10040793
Received: 11 March 2020 / Revised: 15 April 2020 / Accepted: 17 April 2020 / Published: 20 April 2020
(This article belongs to the Special Issue Plasma Based Nanomaterials and Their Applications)
Stacked SiGe/Si structures are widely used as the units for gate-all-around nanowire transistors (GAA NWTs) which are a promising candidate beyond fin field effective transistors (FinFETs) technologies in near future. These structures deal with a several challenges brought by the shrinking of device dimensions. The preparation of inner spacers is one of the most critical processes for GAA nano-scale transistors. This study focuses on two key processes: inner spacer film conformal deposition and accurate etching. The results show that low pressure chemical vapor deposition (LPCVD) silicon nitride has a good film filling effect; a precise and controllable silicon nitride inner spacer structure is prepared by using an inductively coupled plasma (ICP) tool and a new gas mixtures of CH2F2/CH4/O2/Ar. Silicon nitride inner spacer etch has a high etch selectivity ratio, exceeding 100:1 to Si and more than 30:1 to SiO2. High anisotropy with an excellent vertical/lateral etch ratio exceeding 80:1 is successfully demonstrated. It also provides a solution to the key process challenges of nano-transistors beyond 5 nm node. View Full-Text
Keywords: inner spacer; gate-all-around (GAA); nanowire; nanosheet; field effect transistor; nanostructure manufacture; high anisotropy; high etch selectivity inner spacer; gate-all-around (GAA); nanowire; nanosheet; field effect transistor; nanostructure manufacture; high anisotropy; high etch selectivity
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Li, J.; Li, Y.; Zhou, N.; Xiong, W.; Wang, G.; Zhang, Q.; Du, A.; Gao, J.; Kong, Z.; Lin, H.; Xiang, J.; Li, C.; Yin, X.; Wang, X.; Yang, H.; Ma, X.; Han, J.; Zhang, J.; Hu, T.; Cao, Z.; Yang, T.; Li, J.; Yin, H.; Zhu, H.; Luo, J.; Wang, W.; Radamson, H.H. Study of Silicon Nitride Inner Spacer Formation in Process of Gate-all-around Nano-Transistors. Nanomaterials 2020, 10, 793.

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