1. Introduction
Brushless DC (BLDC) machines have the starting characteristics of series-excited DC machines and the speed regulation features of shunt-excited DC machines [
1]. They are commonly used in aerospace, industrial control, robotics, electrical vehicles, office automation, and domestic appliances for their simple construction, high output torque, efficiency and reliability [
2]. Towards the end of the 1970s, the ideas of “all electric aircraft (AEA)” and “more electric aircraft (MEA)” were put forward, promising the advantages of reduction of mass, increased reliability and easy maintenance [
3]. Owing to the advances in high power-density machines and power devices, the electromechanical actuator (EMA) gradually became the key to MEA instead of the hydraulic-based actuator [
4,
5]. The induction machine (IM), BLDC machine, permanent magnet synchronous machine (PMSM), switched reluctance machine (SRM) and synchronous reluctance permanent magnet machine (Sync-RM) are the main candidates of the EMA to drive the hydraulic oil ram through the mechanical gearbox [
6,
7,
8]. In addition, the BLDC machine is a strong contender for conventional aerospace applications compared to the aforementioned machines [
9]. The performance of an EMA system is determined by the characteristics of electrical drive, which should be designed to meet the relevant requirements [
10]. Generally speaking, a BLDC machine system consists of three components: the power driving circuit, the position sensor and the machine. The power driving circuit, commonly called an inverter, has several types: half-bridge, full-bridge, C-dump, H-bridge and four-switch. The half-bridge and C-dump types are seldom used, especially in aerospace applications, due to their disadvantages of large torque ripples and the low utilization of the windings. The typical shortage of the H-bridge type is that each winding is controlled separately by an H-bridge inverter, and the control algorithm of the four-switch type is more complicated. Therefore, the full-bridge type is the most popular choice in common use due to its acceptable static performance. However, the system’s dynamic characteristics under the conventional full-bridge mode may no longer meet the rigorous demands of aerospace applications. For instance, the response time of speed and current may be too long, the overshoots may increase, and the speed range may not be wide enough to match requirements under abrupt load torque or under-voltage fault. Therefore, research on the response enhancement and fault protection improvement of BLDC machine drive systems for certain circumstances is of considerable value.
In recent years, several studies have focused on characteristics of the modified topology of BLDC machines [
11,
12,
13,
14,
15,
16,
17,
18,
19]. In [
11], an on-line fault diagnosis method for buck converter-BLDC motor combinations was proposed. The method can detect and identify open-circuit and short-circuit damage to single switches, but protective measures were not introduced. Research in [
12] mainly centered around the design of a bridgeless Zeta (BL-Zeta) converter-fed BLDC machine to achieve a wide range of speed control performances. However, more elements and complex control techniques were involved without any protection improvement, which may introduce reliability penalties. A bidirectional DC-DC converter (BDC) for electromechanical energy storage systems as an interconnection between power and inverter was reported in [
13]. However, the dynamic response and protections are out of consideration during the charge and discharge states. In [
14,
15], a Z-source inverter (ZSI) that could adjust the output voltage according to the shoot-through zero state of a switching cycle was developed. Nevertheless, a relatively complicated control strategy was required, and the system was less attractive in terms of the fault protection characteristics. A boost converter placed in front of the three-phase full bridge inverter was employed in order to realize the maximum power point tracking (MPPT) of the photovoltaic (PV) system in [
16,
17,
18]. However, the method could not be directly applied on BLDC machine drives and dynamic characteristics optimization was not in the study range. The research in [
19] concentrated on the design of a four-quadrant operation simulation model of a BLDC machine to reduce torque ripples, but the speed range expansion and fault protection were not examined.
This paper proposes a model-based optimized permanent magnet (PM) BLDC machine topology for dynamic response enhancement and fault protection improvement. The topology is composed of a boost converter, two power switches for protection, and a three-phase full bridge inverter. The static and dynamic characteristics of the closed-loop control system are obtained under normal and faulty operating conditions. The response time is shortened significantly during the start-up, speed adjustment and abrupt load change processes compared with conventional topology. The fault protection scheme involving control factors of S, K1, K2 and K3 is extracted for faulty situations to prevent secondary malfunction. The protection circuit mainly deals with over-voltage and over-current fault isolation, while the boost converter handles situations under over-load and temporary under-voltage conditions. Only two voltage output levels of the converter are allowed in order to avoid frequent switching operations. The voltage and current limits under different situations prove that the proposed strategy could increase operation reliability and that the mean time between failures (MTBF) of the whole system will be decreased. A simulation model and experimental prototype are constructed and manufactured to validate the proposed topology and control method for an aeronautical fuel pump system.
2. Boost Converter-Fed BLDC Machine Model
The boost converter-fed PM BLDC machine drive system is supplied by a voltage source
U, as shown in
Figure 1. A boost converter containing five elements, namely coil
L, two capacitors
Cd and
Cs, diode
D, and the metal-oxide semiconductor field-effect transistor (MOSFET)
T9, is used to feed the machine. A large capacity, small size aluminum electrolytic capacitor is a superior choice for
Cd to store the energy, while
Cs should be a small series inductance and resistance polypropylene capacitor that has the favorable characteristic of high frequency peak voltage absorption. A protective circuit with power resistance
R and MOSFET
T7 is introduced to discharge when the bus pumping voltage reaches a certain value. The MOSFET
T8 is used to cut off the bus power supply when a serious fault happens in the machine. The three-phase full bridge consists of six MOSFETs (
T1–
T6). Meanwhile,
D1–
D6 are six diodes used to provide a continuous flow circuit to the windings of the machine.
Figure 2 shows the operating principle of a Y-connected windings BLDC motor in a clockwise cycle, including the conduction sequence, current flow direction, waveforms of induced electromotive forces (EMFs) and currents, along with hall signals (
HA,
HB,
HC). An electrical cycle of a BLDC motor can be divided into six different switching states. In each state, a different pair of MOSFETs conducts and two phases energize while leaving the third floated.
In the presented work, the following assumptions are used for simplification: (1) the air gap magnetic field distribution is square wave, and magnetic hysteresis, saturation and eddy losses are ignored [
15]; (2) Y-connected stator windings are symmetrical, and their resistance and inductance are constant. A group of first-order differential equations with state variables is used to set up the simulation model of the machine. The state equations of a BLDC machine can be obtained by the algebraic transformation of the conventional differential equation model. The fourth-order state equation of the BLDC motor can be expressed as
where
iA,
iB and
iC are the phase-current,
uA,
uB and
uC are the phase voltages,
R is the phase resistance,
L is the self-inductance,
M is the mutual inductances between phases,
ψpm is the permanent magnet flux-linkage,
θ is the rotor position angle,
TL is the load torque, Ω is the angular velocity of rotation,
p is the number of pole-pairs,
J is the moment of inertia and
BV is the coefficient of viscosity. In Equation (4), the PM flux linkage
ψpm(
θ) is only a function of
θ, which can be regarded as a coefficient of the equation. The
ψpm(
θ) has the same shape with induced EMF, as shown in
Figure 2, and its magnitude can be obtained from induced EMF by utilizing a finite element field analysis or test. The waveform data of
ψpm(
θ) are stored in central processing unit (CPU) and the lookup table (LUT) method is adopted to obtain them according to the angle detected by a position sensor.
The boost converter is a kind of single pipe non-isolated DC conversion circuit, which is mainly composed of four parts: power device, diode, filter capacitance and energy storage inductance. Its operating modes can be divided into two categories: continuous current mode (CCM) and discontinuous current mode (DCM) [
20].
Under the CCM condition, the boost converter-fed BLDC motor operates in two states and the state–space equations can be expressed as [
21]
where
D is the duty cycle,
x is the state variable,
x = (
iL uC),
is the differential of the state variable,
iL is the inductance current,
uC is the capacity voltage,
ui is the input voltage, and
A1,
A2,
B1 and
B2 are the coefficients related to the circuit structure. The state–space equation can be obtained by
where
A =
DA1 + (1 −
D)
A2,
B =
DB1 + (1 −
D)
B2.
Figure 3 shows the equivalent circuits when the switch
T9 is on and off, respectively, regardless of the protection circuit. Using the state-space averaging method, the converter is transformed into an equivalent linear, time-varying, continuous circuit. When switch
T9 is ON, the state–space equations are shown, ignoring the resistance of diode
D and switch
T8 [
22,
23]:
In case the switch is OFF, the state–space equations are given by
Using the state–space averaging method these equations can be shown by
where
uin and
uout are the input and output voltages of the boost converter,
L is the energy storage inductance,
C is the filter capacitance,
D is the duty cycle of switch
T9,
iL is the inductance current,
R is the single-phase resistance, including stator resistance and transistor on-resistance. Ignoring the resistance of switch
T8, it can be rewritten as:
According to the design requirements of the system, the specifications of the front-end boost converter can be obtained by
where Δ
iL and Δ
u are the current and voltage ripples, respectively,
R’ is the load resistance, and
fs is the switch frequency of power device
T9. Here
L takes 3.5 mH and
C takes 200 μF according to the requirements of the system. These equations are utilized to set up the simulation model of the machine and the converter, offering the design parameter reference and supports for the prototype.
To gain an optimized dynamic response, the bus-voltage should be kept at a high level by utilizing the boost converter. As mentioned above, the output voltage of the converter adopted only two levels. The DC-link voltage states
u1 and
u2 can be obtained according to the logical synthesis operation of control factors including
S,
K1,
K2 and
K3, as shown in
Table 1. The operating logic results are stored in a digital signal processing (DSP) chip and the reference LUT method is adopted according to the requirements under different situations during operation. This method can reduce the cost of the chip compared with the on-line control method and improve the reliability of the program.
Here, “
u1 = 1” and “
u2 = 1” represent that the DC-link voltage equals to 270 and 300 V, respectively,
S is the current operation state of the BLDC machine,
K1 is the manual control signal state,
K2 is the overlarge load variation situation, and
K3 is the current DC-link voltage state. It can be found that
S has the highest control priority, which means that the boost circuit has the chance to work only under the condition of “
S = 1.” Therefore, there is no need for the supply voltage to be adjusted, and the protection circuit will take over the system under faulty situations. The DC-link voltage will be boosted to 300 V, an over-rated but relatively safe level, when the manual control signal is triggered or when load variation is too large. This results in an increase in machine speed for a short period. To gain a clear explanation, the results of LUT can be summarized using Equation (14):
Note that the accelerate state should not be too long, as it keeps the machine under the over-rated stage. Meanwhile, the voltage will maintain at the rated value of 270 V when the supply voltage falls, regardless of the manual control signal. When an abrupt load and a voltage drop occur simultaneously, the voltage will be regulated to 300 V. The over-voltage and under-voltage threshold value are set to 320 and 200 V, respectively, to ensure the safety of the system and a relatively wide adjustment range of the boost converter. The protection circuit will operate if the boost converter adjustment cannot make up the falling voltage; otherwise, the circuit will not be involved.
3. Control System Design
Figure 4 shows the block diagram of the proposed boost converter-fed BLDC machine control system, which is composed of a power circuit, a control circuit and a remote monitoring circuit. The power circuit mainly deals with the driving and commutating of the boost converter-fed BLDC machine according to the control signals. The control circuit, the key to the system, is mainly responsible for power management, conditioning and sampling, isolation and protection, and digital signal processing (DSP). The power management circuits convert 270 V DC bus-voltage to different required levels according to the distribution scheme of the system. The conditioning and sampling circuits realize the conversion from analog signals, such as current, voltage, and temperature, to digital signals through sensor detections, amplifiers, filters, and analog to digital converter (ADC) chips. The isolation and protection circuits are designed to realize electrical isolation between power and control parts. The hardware protection circuits consist of some comparators and a complex programmable logic device (CPLD). DSP is used to calculate the sampling output of ADC and realize the closed-loop control. The remote monitoring circuits realize the anti-interference data transmission between the personal computer (PC) and DSP by utilizing a series communication interface (SCI) and a shielded RS-485 transceiver.
To attain a small static tracing error, anti-disturbance ability, and rapid dynamic performance, the system adopts a control strategy that combines normal mode regulation with boost mode adjustment, as the block diagram shows in
Figure 5.
It can be seen from
Figure 5 that the boost mode adjustment process consists of signal detection, control synthesis of
S,
K1,
K2 and
K3, and a DC-link voltage closed-loop calculation. It ensures a reliable power supply under over-load or under-voltage fault situations according to the Equation (11). Normal mode regulation deals with rated states by adopting a conventional dual closed-loop proportional integral derivative (PID) control strategy, which is still the workhorse in industries despite the great evolution and rapid development of hardware [
24]. The outer loop is the speed loop, which adopts proportional integral (PI) action, aimed at stabilizing speed and resisting load-disturbance. In contrast, the inner current loop adopts P action to deal with current stabilization and voltage-fluctuation resistance. Voltage, current and load torque are detected by corresponding sensors and converted into digital signals using A/D sampling circuits. Angular speed is calculated by hall signals utilizing event capture (eCAP) module of the DSP chip. The manual control signal is the backup control signal of the boost converter for debugging. There is almost no need for the BLDC machine here to adopt the flux-weakening control method. On one hand, this system is for an aerospace oil pump and the flux-weakening region does not suit the requirements of such pumps. On the other hand, the drive system may suffer from a flux-weakening failure, which may decrease the reliability of the whole system.
When a PID controller is utilized, it provides a pole and two negative real zeros for the system. The pole helps to improve the system order-type, eliminate or reduce the steady-state error, and improve the steady-state performance. The negative real zeros can increase the phase margin, adjust the relative stability, and improve the dynamic performance. Therefore, the control stability performance of the system and the bandwidth can be assured as long as there is a reasonable choice of controller parameters (Kp, Ki, Kd). Here Kp = 10, Ki = 0.01, Kd = 0.
4. Fault Protection Strategy
The protective circuits are designed to improve the reliability of the system. The protection measures are implemented by CPLD and switches T7 and T8. The protection signals, i.e., bus over-voltage (OV), bus under-voltage (/UV), bus over-current (BOC), and phase over-current (POC), are generated by hardware circuits and act as the inputs of CPLD. Filter operation and logic synthesis measures were taken in the CPLD program to export the fault protection operation signals of T7 and T8. The hardware description language VHDL was utilized to realize programming. Therefore, this hardware protection scheme can improve the reliability of the system compared with the software type. Meanwhile, unlike the cycle-by-cycle method, which takes protection measures at each cycle of the pulse width modulation (PWM) signal, the proposed scheme greatly reduces the cost of the chip.
4.1. Voltage Protection
• Bus over-voltage protection
When the bus–voltage exceeds
Ur, an over-voltage signal is generated by a comparator. If the signal lasts longer than
tr, switch
T7 will be turned ON and the pumping voltage will discharge through the brake resistance
R, as shown in
Figure 6.
Switch T7 should keep the conducted state for tr after the over-voltage signal disappears. The purpose of the conducted delay tr is to prevent the power device from switching frequently, which helps to reduce losses. However, the delay should not be too long otherwise the brake resistance will be too hot, which may lead to a low efficiency. In this paper, tr is taken to be 5 ms, which is programable according to the clock period. In order to eliminate the effect of signal jamming on system stability, a signal is recognized as a spike signal when the over-voltage period is less than ts, and can be ignored. Here, ts is taken to be 1 ms.
• Bus under-voltage protection
Figure 7 shows bus under-voltage protection control logic, and /
UV is the protection signal. It is set to “1” when the system is under a normal state and “0” if the DC-link voltage is lower than a certain value. In order to eliminate the effect of a jamming signal, it is recognized as an interference signal when /
UV lasts less than
tr. Here,
tr is taken to be 1 ms. If the /
UV signal lasts longer than
ts, MOSFET
T8 will be switched OFF and the drive system will be disconnected from the boost converter to prevent a second over-current fault. When the /
UV signal disappears,
T8 keeps the cutoff state for
ts before it is back to power. It is noted that the boost converter will take over to regulate the voltage back to normal during
ts. In this paper,
ts is taken to be 50 ms.
4.2. Current Protection
• Bus over-current protection
In extreme cases, such as starting with a heavy load or stalling in a short time, the peak of bus-current may increase to a very large value. The system requires instantaneous protective action under these circumstances, which is called bus over-current transient protection. In contrast, the protective action dealing with a current increase caused by long-time overload is called bus over-current locked protection. In order to reduce switching noise and loss, the protection circuit should not be under frequent operation.
Figure 8a shows the bus over-current transient protection logic.
BOC1 stands for hardware input protection signal, which is “0” under a normal state and “1” when the DC-link current is over 100 A. The protection measure varies with
ts, which is the duration of
BOC1. It can be divided into three cases: (1) when
t >
ts >
tr, switch
T8 shuts off instantly and keeps this state until
t; (2) when
ts ≤
tr, the signal is considered as a spike and the protection action will not be triggered; (3) when
ts ≥
t, switch
T8 shuts off until
BOC1 is back to “0” level. In this work,
t and
tr are taken to be 5 and 1 ms, respectively.
Bus over-current locked protection logic is shown in
Figure 8b.
BOC2 represents the hardware input protection signal, which is “0” under a normal state and “1” when the DC-link current is over 80 A. The protection measure can be divided into five categories varying with
tp, the duration of
BOC2: (1) when
tp ≤
tr, it is considered to be an interference; (2) when 2
t ≥
tp ≥
t, the signal shows again after the interval time
ts (
ts >
tr), and if its duration
tp ≤
tr, the protection does not take effect; (3) when 2
t ≥
tp ≥
t, the protection does not carry on; (4) when
tp ≥
t, the signal shows again after the interval time
tn (
tn ≤
tr), but if its duration
tp ≥
t, switch
T8 shuts off until the signal returns to “0”; and (5) when
tp ≥ 2
t, switch
T8 shuts off until
BOC2 returns to “0.” Here,
t and
tr are taken to be 5 and 1 ms, respectively.
• Phase over-current protection
Short-circuit faults of machine windings may result in phase over-current faults. Their protection logic is shown in
Figure 9, including two cases: (1) if the peak of phase-current exceeds
ir,
T8 shuts off to cut off the drive system from the power source. When the signal is normal,
T8 turns on after a duration
tr. The purpose of the delay is to prevent excessive loss and influence on the rapidity of the system; (2) if the peak of phase-current continuously exceeds
is but is below
ir for at least
ts,
T8 will turn off and lock the state. However, if the over-current state lasts no longer than
ts, the signal is negligible. In this work,
ts,
tr,
is, and
ir are taken to be 5 ms, 10 ms, 150 A, and 190 A, respectively.