Latency in IOT-Enabled Digital Twin Systems for Smart Manufacturing: A Review of the Taxonomy and Measurement

The application of Internet of Things (IoT) technology to Digital Twin (DT) in smart manufacturing has opened significant opportunities for real-time monitoring, predictive maintenance, and closed-loop control; however, the inherent latency that exists in these architectures (the temporal gap between a physical event and its reflection in a digital model) remains one of the most significant and least systematically understood barriers to fulfill its full potential. This paper aims to propose a formal four-layer taxonomy of latency sources in IoT-based Digital Twin systems for smart manufacturing and to review the current approaches and tools that are available for their measurement. The PRISMA protocol has been used to perform a systematic literature review, where 58 primary survey studies published between 2020 and 2026 were extracted from IEEE Xplore, Elsevier Scopus, Google Scholar and arXiv, with all the studies being coded along six dimensions (architectural layer, application domain, latency metrics reported, evaluation methodology, quantitative impact, and enabling technologies). The proposed taxonomy presents 28 different types of latencies under four layers: (L1) network, (L2) compute, (L3) data, and (L4) end-to-end (E2E), whose magnitudes vary from 0.1 ms for local network propagation to tail latencies above 500 ms in production (P99). Three categories and three cross-layer interaction patterns are formalized here and are absent from prior partial taxonomies. Among the most promising results is the finding that several high-impact interventions require no infrastructure investment: a protocol migration from Modbus to WebSocket reduces telemetry latency by 32%, while Age of Information-aware synchronization and clock drift correction deliver substantial data layer gains through software updates alone, yet remain underutilized. The review identifies a systematic under-reporting of tail-latency percentiles across the corpus, the lack of a cross-protocol jitter benchmark, and a predominance of simulation-based evaluation over real-hardware measurement. The systematic review contributions of this paper (the formal four-layer taxonomy, the proportional metric audit across the 58 papers, and the formalization of three cross-layer interaction patterns) are derived from cross-corpus analysis. The investigation also identifies three open research directions (a standardized manufacturing IoT-DT benchmark, cross-layer joint optimization frameworks, and wireless TSN validation on real manufacturing testing grounds) that together form a well-organized and practical basis to advance both the science and the application of ultra-low-latency Digital Twin technology in the industrial field.