Performance Analysis of Scandium-Doped Aluminum Nitride-Based PMUTs Under High-Temperature Conditions

Abstract

PMUTs have been widely studied in recent years, particularly those based on the SOI (silicon-on-insulator) process, which have been partially commercialized and are extensively used in advanced applications such as ultrasonic ranging and spatial positioning. However, there has been little research on their high-temperature reliability, a critical area for their use in extreme environmental conditions. In this study, we investigate the high-temperature characteristics of air-coupled PMUTs based on SOI under various structural conditions, employing both finite element analysis (FEA) and experimental validation. We assess the performance of PMUTs at elevated temperatures by examining key parameters such as resonant frequency, the electromechanical coupling coefficient, mechanical amplitude, and warpage, all analyzed as functions of temperature. The experimental results show that temperature-induced drift becomes more significant as the back cavity size increases and the top silicon layer thickness decreases. These findings are consistent with the trends observed in the finite element analysis. Specifically, a PMUT with a back cavity diameter of 1000 $\mathsf{\mu }$m and a top silicon thickness of 4 $\mathsf{\mu }$m exhibits a temperature drift rate of up to 47.3% when the operating temperature rises from room temperature to 200 °C. Furthermore, at elevated temperatures, the maximum electromechanical coupling coefficient improves by 68.6%, and the mechanical amplitude increases by 66.1%. Heating experiments using a 3D profiler reveal that warpage increases from 0.3 $\mathsf{\mu }$m to 2.15 $\mathsf{\mu }$m as the temperature reaches 150 °C. These findings offer important theoretical insights into the temperature-induced drift behavior of PMUTs under high-temperature conditions. This study provides a comprehensive understanding of the performance variations of PMUTs, including changes in electromechanical coupling, mechanical amplitude, and structural warpage, which are critical for their reliable operation in extreme environments. The results presented here can serve as a foundation for the design and optimization of PMUTs in applications that require high-temperature stability, ensuring their enhanced reliability and performance in such demanding conditions.

1. Introduction

Sensors are at the heart of modern scientific and technological progress, driving advancements in information technology beyond computation and communication, and enabling “perception” and “intelligence”. The increasing demand for intelligent sensors is reflected in the proliferation of smart applications, including autonomous vehicles, smart homes, and smart cities [1,2].

Micro-Electromechanical System (MEMS) technology plays a key role in enabling intelligent sensors by integrating sensing and actuation at the microscale through semiconductor micro- and nanofabrication processes. MEMS sensors achieve conversion between various physical quantities, mechanical vibrations, and electrical signals through structural design. Their small size, low power consumption, high reliability, and ease of integration make MEMS sensors particularly advantageous for applications requiring miniaturization and intelligent functionality [3].

Among piezoelectric materials used for MEMS sensors, aluminum nitride (AlN) and scandium-doped AlN (AlScN) have attracted considerable attention due to their compatibility with CMOS processes. AlN-based sensors have found rapid industrial development in RF MEMS [4,5], optical MEMS [6,7], and acoustic MEMS applications [8,9]. Acoustic MEMSs, specifically micromachined ultrasonic transducers (MUTs), have become a major area of focus due to their potential for smart and portable applications [10,11].

Traditional bulk ceramic ultrasonic transducers, primarily made from sintered PZT-based piezoelectric ceramics, have significant drawbacks. Their relatively large size, high power consumption, and manufacturing inconsistencies make them unsuitable for modern smart applications [12,13,14]. Compared to these traditional transducers, MEMS-based ultrasonic sensors, such as AlN piezoelectric micromachined ultrasonic transducers (PMUTs), offer substantial advantages, including smaller size, lower power consumption, and improved integrability with CMOS technology. These benefits make PMUTs particularly suitable for portable devices, medical ultrasound imaging, and gesture recognition applications [15,16,17,18,19].

A major advantage of AlN-based MEMS sensors is their ability to operate under high-temperature conditions. Traditional PZT-based piezoelectric sensors exhibit reduced piezoelectric performance at elevated temperatures, due to thermal effects that affect electric dipole alignment [20]. In contrast, AlN, with its stable wurtzite crystal structure and lack of a Curie temperature, maintains good piezoelectric performance even at high temperatures, making it suitable for use in harsh environments [21].

Despite the advantages of AlN-based PMUTs, research on their performance under high-temperature environments remains limited [22]. Although AlN has demonstrated good high-temperature stability as a piezoelectric material, a systematic study on the performance of AlN PMUTs, particularly concerning resonant frequency, electromechanical coupling, and stress variations under high-temperature conditions, is lacking. This gap in the literature presents a significant opportunity for understanding the reliability and optimization of PMUTs in harsh environments.

In this work, we address this gap by investigating the high-temperature performance of AlN PMUTs fabricated using standard SOI processes. This study aims to evaluate the changes in performance parameters such as resonance frequency and electromechanical coupling under elevated temperatures, thereby contributing to the understanding of PMUT reliability and optimization for applications in harsh environments.

2. Device and Methodology

The devices used in this study are shown in Figure 1. Figure 1a illustrates the structure of the device. The piezoelectric layer is aluminum nitride (AlN) doped with 20% scandium, with a thickness of 1 $\mathsf{\mu }$m. Mo electrodes are placed on both sides of the piezoelectric layer, and the bottom structural layer is 4 $\mathsf{\mu }$m thick silicon. The diameters of the back cavity of the PMUTs used in this study are 600 $\mathsf{\mu }$m and 1000 $\mathsf{\mu }$m, respectively. Physical images of the front and back sides of these two sizes are shown in Figure 1b. The diameter of the piezoelectric layer is designed as 78% of the diameter of the back cavity, following previous work [23].

The PMUT fabrication process in this paper follows the standard SOI (silicon-on-insulator) manufacturing process, as shown in Figure 2. The PMUTs designed in this study were manufactured on an 8-inch silicon-on-insulator (SOI) wafer with a 400 nm buried oxide (BOX) layer in the clean room. The piezoelectric stack has a total thickness of 4 $\mathsf{\mu }$m, deposited on a low-resistance (100)-oriented Si substrate.

Before device fabrication, SOI wafers were sequentially cleaned to remove surface particles, native oxide layers, organic contaminants, and metallic impurities. This process minimizes the impact of particulate contamination on device performance and fabrication. After cleaning, laser marking was performed to label the wafers for subsequent processing steps.

In the first step, a 300 nm layer of silicon dioxide (SiO₂) was deposited using plasma-enhanced chemical vapor deposition (PECVD) at 400 °C. This layer serves as an insulating dielectric layer to prevent leakage and compensate for thermal stress from subsequent deposition steps.

Then, an optimized recipe was used to deposit the $\mathrm{Mo}/{\mathrm{Al}}_{0.8}{\mathrm{Sc}}_{0.2}\mathrm{N}/\mathrm{Mo}$ piezoelectric stack in a single process. Before deposition, the wafer was pretreated in a vacuum under a nitrogen atmosphere at 450 °C for 5 min, followed by a 7 s physical etch to remove surface impurities and residual moisture. The AlSc_0.096N layer was used as a seed layer to promote the (002)-oriented growth of the subsequent ${\mathrm{Al}}_{0.8}{\mathrm{Sc}}_{0.2}\mathrm{N}$ layer, reducing surface roughness and ensuring high-quality deposition.

The piezoelectric layer was patterned using a 400 nm SiO₂ hard mask deposited via PECVD. The high scandium content in ${\mathrm{Al}}_{0.8}{\mathrm{Sc}}_{0.2}\mathrm{N}$ results in by-products such as ScCl₃ with high sublimation temperatures (∼900 °C ), making dry etching relatively slow. To optimize the etching angle and improve etching selectivity, an inductively coupled plasma (ICP) system (Omega® etch system from SPTS, Newport, UK) was used. Pre-etching with boron trichloride (${\mathrm{BCl}}_3$) and argon (Ar) was performed to remove surface oxides, improving the main etch process. The process was carefully controlled to stop precisely at the bottom Mo layer, minimizing over-etching and improving yield.

PECVD was used to deposit a 200 nm SiO₂ layer, followed by etching to create vias connecting the top and bottom electrodes. Subsequently, a 1 µm AlCu layer was deposited using physical vapor deposition (PVD) and patterned. The AlCu film was etched in a Cl₂ environment, followed by the immediate removal of dry resist to prevent etching by-products from reacting with moisture to form HCl, which could corrode the interconnection lines. The wafer was thinned to 400 $\mathsf{\mu }$m and flipped for back-side processing. Deep reactive ion etching (DRIE) was employed using the Bosch process to fabricate the resonant cavity of the PMUT. To achieve high aspect ratios, the membrane was released in a stepwise etching process. Before the second backside etching, the wafer was treated with hexamethyl-disilazane (HDMS) to enhance the adhesion of the photoresist. A double-sided mask aligner (SUSS, MA/BA8 Gen3) was used for lithography, followed by the precise patterning and etching of the cavities.

The crystal structure of the ${\mathrm{Al}}_{0.8}$${\mathrm{Sc}}_{0.2}$N film was analyzed using the X-ray diffraction (XRD) technique. The rocking curve of the (002) peak for ${\mathrm{Al}}_{0.8}$${\mathrm{Sc}}_{0.2}$N is shown in Figure 3. The full width at half maximum (FWHM) of the peak was measured to be 1.738°, indicating that the ${\mathrm{Al}}_{0.8}$${\mathrm{Sc}}_{0.2}$N film deposited on the Mo substrate exhibits excellent piezoelectric properties.

Energy-dispersive X-ray spectroscopy (EDS) was used to characterize the composition of ${\mathrm{Al}}_{0.8}{\mathrm{Sc}}_{0.2}\mathrm{N}$ thin films deposited with 20% Sc-doped Al-Sc alloy targets. The EDS results are summarized in

Table 1. Elemental composition of ${\mathrm{Al}}_{0.8}{\mathrm{Sc}}_{0.2}\mathrm{N}$ thin film.

Element	wt%	wt% Sigma	Atomic Percentage (%)
N	33.35	0.38	52.02
O	0.32	0.20	0.43
Al	47.28	0.34	38.28
Sc	19.06	0.30	9.26
Total	100.00	–	100.00

. The atomic percentage of Sc is 9. 26%, which shows good deposition composition.

The device dimensions and core material parameters used in this study are given in

Table 2. Dimensions of the proposed PMUTs.

Parameter	Dimension
Top Mo electrode diameter ($\mathsf{\mu }$m)	468/780
Membrane diameter ($\mathsf{\mu }$m)	600/1000
Top Mo electrode thickness ($\mathsf{\mu }$m)	0.1
ScAlN piezoelectric layer thickness ($\mathsf{\mu }$m)	1
Bottom Mo electrode thickness ($\mathsf{\mu }$m)	0.2
Seed layer thickness ($\mathsf{\mu }$m)	0.05
Si structural layer thickness ($\mathsf{\mu }$m)	4

[24].

The impact of varying structural parameters on the temperature characteristics of SOI-based PMUTs was analyzed using finite element analysis (FEA). The FEA focused on three key parameters: the diameter of the back cavity and the thickness of the top silicon layer. These parameters are also critical for determining the final resonant frequency of the device. The material properties used in the FEA are listed in

Table 3. Properties of the materials for PMUT FEM.

Property	Mo	ScAlN	Si
Dielectric permittivity		13.7
Density (kg/m³)	10,200	3560	2320
Young’s Modulus (GPa)	312	230	130
${\mathrm{C}}_{11}={\mathrm{C}}_{12}$ (GPa)		325
${\mathrm{C}}_{33}$ (GPa)		279
${\mathrm{C}}_{13}$ (GPa)		131
${\mathrm{C}}_{44}={\mathrm{C}}_{55}$ (GPa)		99
${\mathrm{C}}_{66}$ (GPa)		94
${\mathrm{d}}_{31}$ (pm/V)		$-4$
${\mathrm{d}}_{33}$ (pm/V)		9.9

, including the mechanical and electrical properties of the Molybdenum electrodes, piezoelectric layer, and silicon, which are obtained from the Comsol 5.6 Multiphysics Materials database. The properties of ${\mathrm{Al}}_{0.8}{\mathrm{Sc}}_{0.2}\mathrm{N}$ were obtained from previous work [25].

The FEA results of the effect of temperature on the frequency of the device under varying diameters of the back cavity are presented in Figure 4. When the diameter of the back cavity diameter is 600 $\mathsf{\mu }$m, the resonant frequency of the device changes from 177.08 kHz at room temperature to 189.79 kHz, corresponding to a variation of 7.17%. As the diameter of the back cavity increases, the frequency shift rate increases, reaching 12.6% at 700 $\mathsf{\mu }$m, 20.4% at 800 $\mathsf{\mu }$m, 30.6% at 900 $\mathsf{\mu }$m, and ultimately 43.1% at 1000 $\mathsf{\mu }$m. The back cavity primarily affects the stiffness of the device, influencing its temperature stability. To mitigate frequency shifts as a result of temperature variation, the reduction in the back cavity size should be considered to enhance the device’s temperature stability.

The effect of varying the thickness of the top silicon layer on the temperature stability of the device is shown in Figure 5. As the thickness of the silicon layer increases, the temperature stability changes significantly. When the thickness of silicon above is 2 $\mathsf{\mu }$m, the frequency change rate due to temperature reaches 77.2%, while it is only 1.9% at 5 $\mathsf{\mu }$m. The results indicate that, at higher temperatures, the frequency shift exhibits a nearly linear trend, and as the device stiffness decreases (i.e., with decreasing silicon thickness), this linear slope increases. Future experiments will further validate this observed trend.

3. Experiment and Results

To verify the reliability of the simulation results aforementioned, we selected a device with a silicon top thickness of 4 $\mathsf{\mu }$m and a back cavity diameter of 1000 $\mathsf{\mu }$m, whose initial resonant frequency at room temperature closely matched the simulation results. The device was placed in a cascade probe station equipped with a heating function and the positive and negative electrodes of the device were directly connected to the E4990A impedance analyzer using probes. The probe stage was heated in increments of ten degrees and the changes in the resonant frequency were recorded. The variation in resonant frequency with temperature for this design was also calculated using FEM, and both results are compared in Figure 6. The comparison shows that the experimental results agree well with the simulation in both numerical values and trends, demonstrating the reliability of the simulation for the design of devices related to temperature drift.

Four devices with a diameter of the back cavity of 1000 $\mathsf{\mu }$m were selected from the fabricated 8-inch wafer for further investigation. The heating and testing method for the devices was as described above.

Figure 7 shows the change in resonant frequency with temperature for the four devices. The initial frequency differences among the four devices were mainly caused by processing errors and differences in residual stress. In the figure, all devices show a similar trend of resonant frequency change with temperature, and the results are summarized in

Table 4. Frequency characteristics of four devices as temperature changes.

Initial Frequency (kHz)	Frequency Drift 80 °C (kHz)	Frequency Drift Percentage 80 °C	Frequency Drift 200 °C (kHz)	Frequency Drift Percentage 200 °C	Linearity
62.73	69.6	11%	92.39	47.3%	0.19
62.46	69.17	10.7%	92.03	47.3%	0.19
61.07	65.68	7.5%	88	44.1%	0.186
59.55	64.25	7.9%	86.86	45.9%	0.188

. From room temperature to 80 °C, the frequency of the devices exhibited a slow upward trend, with a frequency drift ranging from 7.5% to 11% at 80 °C. As the temperature increased further to 200 °C, the slope of the frequency vs. temperature curve appeared to be nearly linear. A linear fit of the high-temperature range of the resonant frequency for the four devices revealed slopes between 0.186 and 0.19, and at 200 °C, the frequency drift exceeded 44% compared to the initial frequency.

The impedance phase angles of the four devices were analyzed, and the results are shown in Figure 8. The impedance phase angles of all four devices increased with increasing temperature, with the largest change observed in a device whose impedance phase increased from −18.56° at room temperature to +17.45° at 200 °C. The electromechanical coupling coefficient of the four devices was also analyzed using

$$k_t^2={\displaystyle \frac{C_m}{C_m+C_0}}={\displaystyle \frac{{\pi }^2}{4}}{\displaystyle \frac{f_s{f}_p-f_s}{f_p}}.$$

(1)

for the electromechanical coupling coefficient, and the results are shown in Figure 9. Figure 9 indicates that the electromechanical coupling coefficient of the four PMUTs initially increases with temperature and then decreases. Compared to room temperature, the electromechanical coupling coefficient increased by 21.4% to 68.6%, reaching its maximum around 100 °C to 140 °C.

To further explore the influence of temperature on PMUTs based on scandium-doped AlN SOI, the aforementioned tests were repeated with devices with a back cavity diameter of 600 $\mathsf{\mu }$m. The piezoelectric layer and the top silicon thickness were the same as those of the previous devices. The frequency and impedance phase changes with temperature are shown in Figure 10. The frequency change with temperature follows a similar trend, with a slow increase at lower temperatures followed by a roughly linear change at higher temperatures. At 200 °C, the frequency increased from 181 kHz to 190.86 kHz, resulting in a frequency drift of 5.45%. The impedance phase also increased with temperature, changing from 12.9 at room temperature to 39.9 at 200 °C. In addition, in comparing the experimental results of the devices with back cavity sizes of 600 $\mathsf{\mu }$m and 1000 $\mathsf{\mu }$m with the simulation results mentioned above, it can be observed that the trends are generally consistent, confirming that increasing back cavity size affects the sensitivity to the temperature drift of the device.

In addition, to validate the conclusion of the simulation on the effect of the top silicon thickness on the device, an experiment was carried out using devices with different top silicon thicknesses, while other structural parameters were kept the same, with a back cavity size of 600 $\mathsf{\mu }$m. The results are shown in Figure 11. The experimental results indicate that devices with a top silicon thickness of 3 to 5 $\mathsf{\mu }$m follow the trend of the simulation results, demonstrating that temperature drift is more pronounced when the top silicon is thinner. Similarly, when the top silicon thickness is smaller, the slope of the temperature drift change, appearing as a nearly linear interval at higher temperatures, is also significantly larger, which is consistent with the FEM analysis results.

To investigate the macroscopic morphological changes of the devices under temperature influence, heating was performed using a heating plate due to the limitations of the 3D profilometer. Two devices with a back cavity of 600 $\mathsf{\mu }$m and two devices with a back cavity of 1000 $\mathsf{\mu }$m were placed on a soft bottom heating plate, and the entire setup was placed under the 3D profilometer to characterize device warpage. The heating plate was heated to 50 °C, 100 °C and 150 °C, and the warpage results are shown in

Table 5. Warpage variation of the devices with temperature (room temperature, 50 °C, 100 °C, and 150 °C).

Device	Initial Warp ($\mathsf{\mu }$m)	Warp at 50 °C ($\mathsf{\mu }$m)	Warp at 100 °C ($\mathsf{\mu }$m)	Warp at 150 °C ($\mathsf{\mu }$m)
600 $\mathsf{\mu }$m No. 1	0.20	0.34	0.55	0.87
600 $\mathsf{\mu }$m No. 2	0.21	0.36	0.57	0.93
1000 $\mathsf{\mu }$m No. 1	0.19	0.58	1.12	1.83
1000 $\mathsf{\mu }$m No. 2	0.3	0.71	1.24	2.15

. The results indicate that with increasing temperature, thermal expansion caused an increase in residual stress, leading to increased warpage of the devices, which in turn contributed to frequency drift and affected other performance parameters.

To further explore the performance of the devices at high temperatures, a Micro System Analyzer MSA600 manufactured by Polytec GmbH (Baden-Württemberg, Germany). laser Doppler vibrometer (LDV) was used to characterize the mechanical vibration frequency and amplitude of the devices at different temperatures, with the results shown in Figure 12. The frequency change trend obtained from the LDV tests was consistent with that from electrical characterization, while the amplitude showed an initial increase followed by a decrease. The amplitude increased from 402.6 $\mathsf{\mu }$m at room temperature to 668.7 $\mathsf{\mu }$m at 160 °C, representing an increase of 66.1%. This trend was also consistent with the change in the electromechanical coupling coefficient obtained from electrical characterization, further demonstrating that the PMUT exhibits good electromechanical coupling performance at higher temperatures.

To investigate the repeatability of the devices after they were operated at high temperatures, a heating–cooling cycling experiment was conducted, and the change in the resonant frequency of the devices was characterized. Both types of devices were slowly heated to 350 °C and then slowly cooled to room temperature, with measurements taken every 10 °C. The results are shown in Figure 13. The experiment revealed that both types of devices exhibited changes in the initial resonant frequency after the experiment returned to room temperature. When the resonant frequency of both devices was measured again after 24, 48, and 72 h, it was found that the frequency had not returned to its original value, indicating that PMUTs based on scandium-doped aluminum nitride experience performance changes after operating at high temperatures, which are difficult to recover in the short term.

A 3D profilometer was used to characterize the devices in the different states. However, because of the very small frequency deviation, only slight changes were observed, making it impossible to determine whether the changes were due to the effect of the high temperature or the measurement error. Therefore, these results are not detailed in this paper.

4. Conclusions

This study demonstrates that both the back cavity size and the top silicon thickness significantly affect the temperature drift characteristics of SOI-based air-coupled PMUTs. The FEM simulations and experimental results consistently show that larger back cavity sizes and thinner top silicon layers lead to increased temperature drift. The PMUT with a diameter of the back cavity of 1000 $\mathsf{\mu }$m and a thickness of the top silicon of 4 $\mathsf{\mu }$m exhibited a high temperature drift rate of 47.3% as the temperature increased from room temperature to 200 °C. Furthermore, elevated temperatures enhanced the electromechanical coupling coefficient and mechanical amplitude, indicating improved performance metrics despite increased warpage. The findings contribute to a deeper understanding of the behavior of PMUT in high-temperature environments and provide essential theoretical insights for optimizing PMUT design for high-temperature applications.