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Article

Exploring the Effects of Barrier Thickness and Channel Length on Performance of AlGaN/GaN HEMT Sensors Using Off-the-Shelf AlGaN/GaN Wafers

by
Mohamed Taha Amen
,
Duy Phu Tran
,
Asad Feroze
,
Edward Cheah
and
Benjamin Thierry
*
Future Industries Institute, University of South Australia, Mawson Lakes Campus, Adelaide, SA 5095, Australia
*
Author to whom correspondence should be addressed.
Appl. Sci. 2025, 15(23), 12751; https://doi.org/10.3390/app152312751
Submission received: 30 October 2025 / Revised: 23 November 2025 / Accepted: 28 November 2025 / Published: 2 December 2025
(This article belongs to the Special Issue Advances in Electrochemical Sensors and Biosensors: Design, Development, and Applications)
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Abstract

AlGaN/GaN heterostructure high electron mobility transistors (HEMTs) have exceptional characteristics, but the structure-function relationship remains to be experimentally fully studied. This study presents a systematic experimental investigation of the synergistic effects of AlGaN barrier thickness and channel length on device performance, a critical gap in the literature, which is often dominated by simulation studies. We experimentally investigated how barrier thickness and channel length influence AlGaN/GaN FET performance. We observed that the transconductance increases with decreasing AlGaN barrier thickness for shorter channel lengths (15 and 50 µm) but showed the opposite trend for the longest channel length (100 µm). Meanwhile, the subthreshold swing was predominantly influenced by the barrier thickness, with thinner barriers generally yielding lower values. These results highlight the intricate interplay between barrier thickness and channel length, providing foundational insights into the design–performance relationship of AlGaN/GaN HEMTs and guiding the development of optimized sensors for different applications.

1. Introduction

Competing with existing Si-based power devices and emerging SiC-based solutions, AlGaN/GaN-based heterostructure high electron mobility field-effect transistors (HEMTs) have emerged as an attractive technology for high efficiency power applications that simultaneously exploit their wide bandgap, high electron mobility, and excellent thermal conductivity. These properties, that are key for power semiconductor applications, together with excellent chemical stability, ease of surface functionalization, high surface charge sensitivity, and effective operation at high temperatures, also make AlGaN/GaN HEMT an ideal technology platform to develop novel device architectures for biosensing applications [1]. The development and optimization of novel AlGaN/GaN FET biosensor architectures require detailed and quantitative insights into the fundamental physical mechanisms and topology-dependent operational modes that govern performance. Among the key performance indicators, transconductance and subthreshold swing are particularly critical for biosensing applications that rely on operation in the saturation current mode, as they directly correlate with sensitivity, resolution, and power consumption. The barrier thickness in AlGaN/GaN HEMTs significantly influences surface barrier height, strain relaxation, and 2-dimensional electron gas (2DEG) concentration, all of which collectively impact device performance. Variations in this thickness alter the drain and transfer characteristics, thereby affecting overall sensing capabilities. For instance, thinning the AlGaN barrier has been shown to enhance gas sensing, resulting in lower detection limits, higher sensitivity, and faster response times [2,3]. Conversely, a thicker AlGaN barrier improves electron confinement, reduces leakage current, and enhances transconductance, but may also limit carrier injection and shift the threshold voltage [4]. Therefore, careful evaluation of the trade-off between electron confinement and carrier transport in relation to AlGaN barrier thickness is essential to optimize the performance of AlGaN/GaN HEMT-based sensors.
Conversely, the channel length plays a critical role in determining the subthreshold swing of FET sensors. Shorter channel lengths typically result in steeper subthreshold swings and improved electron transport, leading to higher transconductance. Therefore, understanding the influence of channel length (within the micron-scale range in this study) is essential for optimizing the output characteristics and sensing performance of AlGaN/GaN FETs.
While previous studies have emphasized that AlGaN barrier thickness and channel length are key factors influencing the performance of FET sensors, their synergistic effects have not been experimentally investigated within the same device. Moreover, most existing research in this area has been based on theoretical modelling or simulation studies, despite the well-recognized discrepancies between simulation results and experimental data in the field of FET devices [5,6].
Advanced strategies for achieving superior performance, such as those leveraging avalanche multiplication and tunnelling effects to approach the Boltzmann thermodynamic limit, have been reported in the literature [7,8]. In this work, we experimentally investigate the intricate relationship between AlGaN barrier thickness and channel length in determining the performance of AlGaN/GaN FET sensors, particularly in terms of transconductance and subthreshold swing. Importantly, the study was conducted using commercially sourced AlGaN/GaN wafer grown on a silicon substrate, with reactive-ion etching employed to precisely define the barrier thickness without affecting the 2DEG channel, as confirmed by Hall effect measurements. The results offer valuable insights for the design of AlGaN/GaN HEMTs suitable for high-performance sensing applications and highlight challenges that must be addressed to further enhance device performance.
In this article, the Materials and Methods section details the materials, fabrication procedures, and characterization techniques employed. Section 3 presents the results and discussion, highlighting the optimization of the etching process and providing a comprehensive analysis of how variations in AlGaN barrier thickness and channel length affect key device performance parameters, including subthreshold swing and transconductance. The article then concludes by summarizing the main findings and discussing their implications for the design and optimization of future AlGaN/GaN FET sensors.

2. Materials and Methods

2.1. Materials

AlGaN/GaN 4-inch wafers were grown by Soitec (Hasselt, Belgium). Titanium, aluminum, gold, and chromium sputtering targets (purity: 99.99%, size: 3 inch diameter × 3 mm thickness) were purchased from Plasmaterials, Inc. (Livermore, CA, USA). Acetone and Isopropyl Alcohol (IPA) were supplied by ChemSupply (Gillman, Australia). For device pattern definition relied on photoresists LOR 3B, and Merck’s AZ nLOF 2020 and AZ1518 photoresists, and their respective developers, supplied by MMRC Pty. Ltd. (Mitcham, Australia).

2.2. AlGaN/GaN FETs Fabrication and Characterization

The schematic view of the AlGaN/GaN heteroepitaxial structure used in this study is shown in Figure 1. These AlGaN/GaN wafers are grown on a Si substrate using the metal–organic chemical vapour deposition method. The vertical structure of the 4-inch wafer consists of, from bottom to top, Fe-free GaN buffer layer, 150 nm of nominally undoped GaN as channel layer, followed by 21 nm thick AlGaN barrier layer with AlN mole fraction of 0.25, which was terminated with a 3 nm thick GaN cap layer. The AlGaN/GaN sheet electron mobility was up to 1800 cm2/V.s, the resistivity was around 314 Ω.sq, while the Si substrate resistivity was less than 5 kΩ.cm.
AlGaN/GaN FET sensors were fabricated with three different channel lengths (15, 50, and 100 µm) and four AlGaN barrier thicknesses (2, 5, 15, and 20 nm) to study the effects of barrier thickness and channel length on device performance.
The ultimate objective is to identify an optimized AlGaN/GaN FET sensor design suitable for wearable applications. For such technologies, FET sensors must exhibit high sensitivity, which is linked to higher transconductance and steeper subthreshold swing, along with low power consumption to ensure efficient and reliable operation in portable systems.
A schematic of the AlGaN/GaN FET sensors fabrication process is shown in Figure 2. Briefly, the fabrication process relies on thinning down the AlGaN barrier, which was carried out in an inductively coupled plasma (ICP) reactive ion etching system (Samco 400iP) using SiCl4 gas chemistry at a pressure of 0.25 bar. Initial optimization of the dry-etching conditions was focused on controllable and reproducible etching rates, which were necessary to achieve the target AlGaN barrier thickness.
The fabrication process of the FET sensors began with a cleaning step using Acetone, IPA, and DW, followed by dry-etch removal of the 3 nm GaN capping layer. Isolation mesas were formed by etching a total thickness of 450 nm. The ohmic contacts were formed by lift-off employing a Ti/Pt/Au (2/140/120 nm) multi-layer metallisation scheme that required rapid thermal annealing at 850 °C for 30 s under N2 gas ambient. The AlGaN barrier was selectively etched to four final barrier thickness values: 2, 5, 15 and 20 nm, using sequential photolithography followed by ICP dry etching. Following AlGaN barrier-thinning, a 10 nm Al2O3 was deposited as gate dielectric layer without employing an etching step, as previously reported [9]. Bi-layer Ni/Au (40/150 nm) metallisation was employed for the gate electrodes. A SiO2 layer (200 nm) was deposited using Plasma-Enhanced Chemical Vapour Deposition (PECVD) at 350 °C substrate temperature as an isolation/passivation layer to isolate metal electrodes during the FETs’ characterization process. Finally, the passivation layer was selectively etched to open the contact pads of the gate, source and drain electrodes. A wafer dicing saw (Disco DAD 321) was employed for die singulations. The electrical properties of the fabricated AlGaN/GaN FET sensors were characterized using a Keysight B2900A semiconductor parameter analyzer within a shielded Faraday box to minimize electrical noise (Figure S1). All measurements were conducted at room temperature in the dark. For the transfer characteristics, the source electrode was grounded, and the drain voltage (VDS) was held constant at 2 V. The gate voltage (VGS) was swept from 0 V to 2 V in discrete steps of 100 mV. The subthreshold swing was calculated from the inverse of the maximum slope of d(log10(I_DS))/dV_GS. The on/off ratio was determined as the ratio of the maximum drain current (Ion) to the minimum drain current (Ioff) within the measured VGS range. The high reproducibility of the fabrication process was confirmed by the consistent performance across multiple devices and the successful achievement of target barrier thicknesses. All figures and tables in this manuscript represent original work by the authors.

3. Results and Discussion

3.1. Etching Rate Optimization of AlGaN/GaN

The etching process is critical for preparing AlGaN/GaN FET devices with different AlGaN barrier thicknesses. Given that this study utilizes off-the-shelf wafers, the precise control and optimization of the dry-etching process is a critical to this study as it used to obtain the four distinct barrier thicknesses
The SiCl4 plasma chemistry employed in this work was selected on the basis of its ability to yield etched surfaces with low defect densities whilst being highly reactive and non-selective to GaN or AlGaN [10,11]. The SiCl4 etching rate is influenced by several parameters, including the ICP power, bias RF power, and gas flow rate. Since the density of reactive ion species during etching is primarily controlled by the ICP power bias, the etch-rate and surface morphology dependence on the applied ICP power bias was systematically investigated, seeking to achieve reproducible low-damage barrier-layer thinning or gate-recess etch process conditions.
At an ICP power of 10 W, with a SiCl4 flow rate of 1.5 sccm and at a process pressure of 0.25 bar, a low etch rate of 0.93 nm/min was achieved, along with a smooth surface morphology of an RMS roughness of 3.5 nm, as presented in Figure 3. These conditions were taken as optimal for sensor fabrication. For the mesa isolation, a faster etch-rate process was adopted using 30 W ICP power at a higher SiCl4 flow rate of 3 sccm, at the same process pressure of 0.25 bar, resulting in an etch rate of 10.6 nm/min.
Under all investigated conditions, the surface morphology of the etched AlGaN/GaN samples was evaluated using Atomic Force Microscopy (Bruker). Statistically, no significant variation in RMS roughness was observed after a 5 min etch, indicating that the plasma process did not notably increase the roughness. It is noted that the lowest RMS surface roughness value (1.57 nm) was obtained at 30 W of ICP power after a 5 min etch, which is well within the GaN buffer layer. This may be attributed to the inherently smoother surface of GaN layer, as it initially exhibit a lower RMS roughness compared to the AlGaN layer when etched with SiCl4 [12].
The optimized barrier-thinning or gate-recess etch process was evaluated using Hall effect measurements under dark conditions, which enabled the extraction of the 2DEG transport parameters from the channel region as a function of final barrier layer thickness. As shown in Figure 4, there was no significant change in the 2DEG electron mobilities in samples with different barrier layer thicknesses, ranging from 1.87 to 1.98 × 103 cm2/V.s, which confirmed that the etching did not damage the 2DEG channel. The slightly higher sheet electron mobilities observed for the thicker barriers (15 and 20 nm) compared to the thinner ones (2 and 5 nm) may be attributed to enhanced polarization effects and lower defect density in the thicker barriers.

3.2. AlGaN/GaN FETs: AlGaN Barrier Thickness and Channel Length Effects

AlGaN/GaN FET sensors were fabricated with four different AlGaN barrier layer thicknesses and three channel lengths (15, 50, and 100 µm), while maintaining a fixed channel width of 300 µm, to identify the optimal sensor configuration. A photographic picture of an AlGaN/GaN wafer containing 159 chips is shown in Figure 5. Each chip comprises 12 independent gated FETs. The gate has the same distance to drain and source electrodes, as shown in the SEM image in the inset of Figure 5.
Representative transfer characteristics of AlGaN/GaN FETs with varying barrier thicknesses and channel lengths are presented in Figure 6. A high on/off current ratio is essential for reliable and efficient operation of AlGaN/GaN FETs. An on/off ratio of 105 was achieved for devices with a 5 nm AlGaN barrier and a channel length of 100 µm, while the other configurations exhibited ratios in the range of 103–104, which remain within acceptable limits. The high on/off ratio reflects effective modulation of channel conductivity, which is essential for reducing power consumption, improving device reliability, and enhancing sensing performance.
Gate leakage current is a critical parameter for AlGaN/GaN FETs, affecting device performance, power efficiency, and reliability in sensing applications [13,14,15]. All fabricated devices exhibited low gate leakage currents (<4 × 10−8 A), as shown in Figure S2, confirming their suitability for high-performance sensing applications.
Hysteresis is a commonly observed phenomenon in the transfer characteristics of FETs. It can arise from various factors, including defects in the semiconductor material, charge trapping and de-trapping at local or remote defect centres, dislocations, and non-uniformities in the channel doping profile. While hysteresis is desirable for memory device applications, it becomes a drawback when considering electronic and optoelectronic applications as it introduces instability to the device states [16]. In AlGaN/GaN FET sensors, hysteresis can be a significant problem, leading to poor performance [17,18,19]. As shown in Figure S3, all fabricated AlGaN/GaN FETs with different AlGaN barrier thicknesses and channel lengths exhibited low hysteresis.
Next, we assessed the subthreshold swing values of the AlGaN/GaN FETs. As shown in Figure 7, AlGaN/GaN FETs with a 5 nm barrier thickness and 100 µm channel length, as well as those with a 2 nm barrier thickness and 15 µm channel length, exhibited the lowest subthreshold swings of 125 and 135 mV·dec−1, respectively (at VDS = 2 V). More generally, the 2 nm barrier thickness exhibited the steepest swings and the lowest subthreshold swing (135, 160, and 165 mV/dec) for all three tested channel lengths (15, 50, and 100 µm), compared to the other barrier thicknesses. This subthreshold swing data clearly indicates the successful fabrication of high-performance FETs with very thin AlGaN barrier layers. In contrast, subthreshold swing values increased with thicker AlGaN barriers at the same channel length, as shown in Figure 7 and Table S1. As summarized in Figure 7a, the subthreshold swing values generally exhibited a consistent upward trend with increasing AlGaN barrier thickness.
Reducing channel lengths generally enhances the gate’s electric field control, which can improve subthreshold swing, leading to better switching behaviour and more effective electrostatic control over the transistor. However, shorter channel lengths, in the micron scale range, also bring challenges, such as increased parasitic capacitances. Interestingly, unlike FETs with a 2 nm barrier thicknesses, subthreshold swings showed an opposite trend with channel length when the barrier thickness was 20 nm (Figure 7a). Furthermore, FETs with a 100 µm channel length showed lower subthreshold swings for various barrier thicknesses compared to those with a 15 µm channel length, except for the 2 nm barrier thickness, as illustrated in Figure 7b and Table S1.
The non-monotonic trend observed for the 20 nm barrier thickness in Figure 7b, particularly the peak at a 50 µm channel length, can be attributed to the complex interplay between reduced gate electrostatic control and parasitic series resistance. For the thickest barrier, the gate’s electrostatic control over the channel is inherently weaker. At the intermediate channel length (50 µm), the combination of a non-ideal electric field distribution (due to the large gate-length-to-barrier-thickness aspect ratio) and increasing series resistance lead to a local degradation in subthreshold swing [20]. This behaviour is characteristic of devices with relatively thick barriers and non-optimized aspect ratios, where diminished gate influence causes a higher effective subthreshold swing at intermediate lengths, before transitioning to the long-channel regime (100 µm), where series resistance becomes the dominant factor in determining overall device performance [21].
These data suggest that the barrier thickness has a more pronounced influence on subthreshold swing than channel length. Reducing the barrier thickness from 20 nm to 2 nm led to variations in subthreshold swing ranging from 75 to 160 mV/dec, whereas decreasing the channel length from 100 μm to 15 μm resulted in smaller changes of 25 to 55 mV/dec (Table S1). As shown in Figure 7b, the relationship between subthreshold swing and channel length is non-monotonic, with a peak at 50 µm channel length for the 20 nm barrier, reflecting the complex interplay between gate control and parasitic effects. Overall, reducing AlGaN barrier thickness improved the subthreshold swing of the AlGaN/GaN FETs, which can be correlated with enhanced sensor sensitivity [22]. However, this relationship is part of a complex interplay among various device parameters and optimizing the channel length requires considering trade-offs to achieve the best overall performance for a specific application.
When comparing subthreshold swing values recently reported in the literature for AlGaN/GaN FETs with different channel lengths, a wide range of values can be observed, as shown in Figure 8. This broad range reflects variations in device designs, fabrication techniques, material compositions, and experimental conditions. The subthreshold swing of AlGaN/GaN FETs typically falls within the range of 50–150 mV/dec. The lowest subthreshold swing values in the present study (125 and 135 mV/dec) are within this range, suggesting that the configuration of these AlGaN/GaN FETs demonstrates relatively efficient energy utilization in the subthreshold regime. However, significantly lower subthreshold swing values, as low as 33 mV/dec [23], have been reported, illustrating that further improvements are possible.
Transconductance is a critical parameter for assessing the performance of AlGaN/GaN FET sensors, as it directly reflects the device’s ability to amplify input signals. It is primarily influenced by electron mobility, carrier density, and channel dimensions [28]. High transconductance values are associated with enhanced sensitivity [29], faster response times [30], and improved overall efficiency, making it a key metric for optimizing both the design and operational performance of AlGaN/GaN-based sensors. The transconductance values for all devices are summarized in Table S2. Figure 9 presents the corresponding transconductance characteristics (gm = ∂IDS/∂VGS) f at VDS = 2 V. The dual peaks, or humps, observed in some transconductance curves (Figure 8) may be attributed to two distinct conduction mechanisms. The first peak, observed closer to the threshold voltage, is associated with transport in the two-dimensional electron gas at the AlGaN/GaN interface, while the second, broader peak at higher gate voltages likely arises from a parallel conduction path formed by an accumulation layer at the gate dielectric/AlGaN surface, i.e., a gate-induced modulation of the channel [31]. The highest maximum transconductance (gm,max) of 748 µS was achieved with a shorter channel length (15 µm) and a thinner thickness (2 nm). In contrast, FETs with a thicker barrier (20 nm) and channel length of 50 µm had the lowest gm,max with 28.8 µS.
Thinner AlGaN barriers generally lead to higher transconductance because of the closer gate proximity to the GaN channel, which result in larger numbers of electrons to be injected into the channel and reduced electron traps, increasing the drain current [2,32,33]. This is consistent with the drain current output depicted in Figure 6, where the thinner barriers resulted in higher drain current.
The transconductance was also observed to depends on the channel length: shorter channels (e.g., 15 µm) displayed higher transconductance than longer ones (e.g., 50 µm) for the same barrier thickness. This can be explained by the fact that the transconductance is generally inversely proportional to the effective channel length [34], though this relationship can be influenced by short-channel effects and parasitic resistances in nanoscale FET devices. Figure 10 confirms this trend, showing lower gm,max for the 50 µm channel compared to the 15 µm channel at the same barrier thickness. However, this trend changes for the longest channel length (100 µm). In this regime, the relationship between transconductance and barrier thickness is reversed and can no longer be explained solely by a simple gate-length effect, where shorter gate lengths typically increase transconductance [35]. Instead, device operation becomes increasingly dominated by the total series resistance, including the access resistance. Specifically, the gm,max for the 20 nm barrier is approximately 15% higher than that of the 2 nm barrier at Lch = 100 μm. For these long-channel devices, the slight improvement in 2DEG quality and the potentially lower access resistance associated with the thicker barrier (as suggested by the Hall measurements in Figure 4) can slightly outweigh the reduced gate electrostatic control, resulting in a higher overall transconductance compared to the thinnest barrier devices.
Overall, this work provides a systematic experimental investigation but has certain limitations. Only three channel lengths and four barrier thicknesses were explored which, while sufficient to identify key trends, constrains the depth of device variability. Moreover, the use of off-the-shelf wafers and microfabrication-friendly dimensions means that the results do not capture the high-performance limits achievable with advanced nanofabrication techniques or alternative material systems. Future studies should therefore investigate a broader range of geometries and focus on integrating these optimized devices into functional biosensing platforms. Altogether, these findings highlight the complex structure–performance relationships in AlGaN/GaN FET sensors and underscore the need for further systematic experimental studies to fully elucidate these effects.

4. Conclusions

We have presented a systematic experimental investigation into the synergistic effects of AlGaN barrier thickness and channel length on the performance of AlGaN/GaN FETs fabricated from commercially available wafers. We demonstrated that the subthreshold swing is primarily governed by the barrier thickness, with the 2 nm barrier yielding the lowest values (e.g., 135 mV·dec−1 for the 15 µm channel). In contrast, the transconductance exhibits a more complex dependence, increasing with thinner barriers for short channels (15 and 50 µm) but showing a reversed trend for the longest channel (100 µm) due to series resistance effects. These findings establish a critical design rule: for high-sensitivity biosensor applications requiring both steep subthreshold swing and high transconductance, a thin barrier (e.g., 2–5 nm) combined with a short channel (e.g., 15 µm) provides optimal performance. The prospects for capitalizing on this work lie in the direct application of these optimized device geometries to realize highly sensitive, low-power, and reproducible AlGaN/GaN biosensors for wearable and point-of-care diagnostic systems. Overall, this study underscores the importance of a holistic, geometry- and process-aware approach to the design of AlGaN/GaN FET sensors.

Supplementary Materials

The following supporting information can be downloaded at: https://www.mdpi.com/article/10.3390/app152312751/s1, Figure S1: Photograph of a mounted chip, highlighting the connected electrodes of one sensor in the measurement setup; Figure S2: Transfer (IDS–VGS) curves with IG for tested AlGaN/GaN FETs’ designs; Figure S3: Transfer (IDS–VGS) curves showing the hysteresis for tested AlGaN/GaN FETs’ designs; Table S1: Estimated subthreshold swings (mV.dec-1) for tested AlGaN/GaN FETs’ designs; Table S2: Estimated transconductance (μS) for tested AlGaN/GaN FETs’ designs.

Author Contributions

Conceptualization, M.T.A., D.P.T. and B.T.; methodology, M.T.A. and D.P.T.; validation, M.T.A., D.P.T. and B.T.; formal analysis, M.T.A. and A.F.; investigation, M.T.A. and D.P.T.; data curation, M.T.A., D.P.T. and B.T.; writing—original draft preparation, M.T.A.; writing—review and editing, M.T.A., D.P.T. and B.T.; visualization, M.T.A., D.P.T. and E.C.; supervision, D.P.T. and B.T.; funding acquisition, D.P.T. and B.T. All authors have read and agreed to the published version of the manuscript.

Funding

This work is supported by the Hospital Research Foundation grant 201/71-83100-01 and NHMRC Investigator Fellowship 1197173.

Data Availability Statement

Data will be made available on request.

Acknowledgments

This work was partly performed at the SA, ACT and WA nodes of the Australian National Fabrication Facility. The authors also would like to thank the ANFF-SA and ANFF-WA nodes for their support.

Conflicts of Interest

There are no conflicts to declare.

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Figure 1. Schematic of the AlGaN/GaN wafer structure.
Figure 1. Schematic of the AlGaN/GaN wafer structure.
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Figure 2. Schematic of the AlGaN/GaN FET sensors fabrication process; (i) Wafer cleaning, (ii) GaN Cap removal, (iii) Devices isolation, (iv) Metallization step, (v) AlGaN barrier recession into different thicknesses with mask-shifting, (vi) Dielectric layer deposition, (vii) Gating step, (viii) Passivation layer deposition, and (ix) Etching of the passivation layer to open the electrodes’ bonding pads.
Figure 2. Schematic of the AlGaN/GaN FET sensors fabrication process; (i) Wafer cleaning, (ii) GaN Cap removal, (iii) Devices isolation, (iv) Metallization step, (v) AlGaN barrier recession into different thicknesses with mask-shifting, (vi) Dielectric layer deposition, (vii) Gating step, (viii) Passivation layer deposition, and (ix) Etching of the passivation layer to open the electrodes’ bonding pads.
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Figure 3. Dependence of AlGaN/GaN etch rate and surface roughness on ICP power using the SiCl4-based gas chemistry applied in this work. The highlighted conditions correspond to those used in sensor fabrication: a SiCl4 flow rate of 1.5 sccm was applied for 10 W, while 3 sccm was used for 30 W.
Figure 3. Dependence of AlGaN/GaN etch rate and surface roughness on ICP power using the SiCl4-based gas chemistry applied in this work. The highlighted conditions correspond to those used in sensor fabrication: a SiCl4 flow rate of 1.5 sccm was applied for 10 W, while 3 sccm was used for 30 W.
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Figure 4. Sheet electron mobility and density for the different AlGaN barrier thicknesses, including a capped sample with 3 nm GaN for comparison.
Figure 4. Sheet electron mobility and density for the different AlGaN barrier thicknesses, including a capped sample with 3 nm GaN for comparison.
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Figure 5. Photograph of a 4-inch wafer with AlGaN/GaN FET sensors. The inset shows a coloured SEM image of an AlGaN/GaN FET sensor with a 100 µm channel length.
Figure 5. Photograph of a 4-inch wafer with AlGaN/GaN FET sensors. The inset shows a coloured SEM image of an AlGaN/GaN FET sensor with a 100 µm channel length.
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Figure 6. Transfer (IDS–VGS) curves of AlGaN/GaN FETs with channel lengths of 15, 50, and 100 µm for different AlGaN barrier thicknesses of (a) 2, (b) 5, (c) 15, (d) 20 nm.
Figure 6. Transfer (IDS–VGS) curves of AlGaN/GaN FETs with channel lengths of 15, 50, and 100 µm for different AlGaN barrier thicknesses of (a) 2, (b) 5, (c) 15, (d) 20 nm.
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Figure 7. Estimated subthreshold swings (mV.dec−1) as a function of (a) AlGaN barrier thickness and (b) Channel length for the different channel lengths of AlGaN/GaN FETs.
Figure 7. Estimated subthreshold swings (mV.dec−1) as a function of (a) AlGaN barrier thickness and (b) Channel length for the different channel lengths of AlGaN/GaN FETs.
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Figure 8. Subthreshold swing values vs. channel length comparison of this work and previous studies [24,25,26,27].
Figure 8. Subthreshold swing values vs. channel length comparison of this work and previous studies [24,25,26,27].
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Figure 9. Transconductance curves of AlGaN/GaN FETs with different barrier thicknesses for channel lengths of (a) 15, (b) 50, and (c) 100 µm.
Figure 9. Transconductance curves of AlGaN/GaN FETs with different barrier thicknesses for channel lengths of (a) 15, (b) 50, and (c) 100 µm.
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Figure 10. Transconductance values of AlGaN/GaN FETs vs. AlGaN barrier thickness for the 3 channel lengths configurations (15, 50, and 100 µm).
Figure 10. Transconductance values of AlGaN/GaN FETs vs. AlGaN barrier thickness for the 3 channel lengths configurations (15, 50, and 100 µm).
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Amen, M.T.; Tran, D.P.; Feroze, A.; Cheah, E.; Thierry, B. Exploring the Effects of Barrier Thickness and Channel Length on Performance of AlGaN/GaN HEMT Sensors Using Off-the-Shelf AlGaN/GaN Wafers. Appl. Sci. 2025, 15, 12751. https://doi.org/10.3390/app152312751

AMA Style

Amen MT, Tran DP, Feroze A, Cheah E, Thierry B. Exploring the Effects of Barrier Thickness and Channel Length on Performance of AlGaN/GaN HEMT Sensors Using Off-the-Shelf AlGaN/GaN Wafers. Applied Sciences. 2025; 15(23):12751. https://doi.org/10.3390/app152312751

Chicago/Turabian Style

Amen, Mohamed Taha, Duy Phu Tran, Asad Feroze, Edward Cheah, and Benjamin Thierry. 2025. "Exploring the Effects of Barrier Thickness and Channel Length on Performance of AlGaN/GaN HEMT Sensors Using Off-the-Shelf AlGaN/GaN Wafers" Applied Sciences 15, no. 23: 12751. https://doi.org/10.3390/app152312751

APA Style

Amen, M. T., Tran, D. P., Feroze, A., Cheah, E., & Thierry, B. (2025). Exploring the Effects of Barrier Thickness and Channel Length on Performance of AlGaN/GaN HEMT Sensors Using Off-the-Shelf AlGaN/GaN Wafers. Applied Sciences, 15(23), 12751. https://doi.org/10.3390/app152312751

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