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Article

True Random Number Generator Based on Fibonacci-Galois Ring Oscillators for FPGA

Department of Information Engineering, University of Pisa, 56122 Pisa, Italy
*
Author to whom correspondence should be addressed.
These authors contributed equally to this work.
Academic Editor: Anikó Costa
Appl. Sci. 2021, 11(8), 3330; https://doi.org/10.3390/app11083330
Received: 22 March 2021 / Revised: 1 April 2021 / Accepted: 3 April 2021 / Published: 7 April 2021
(This article belongs to the Special Issue AI and Security in Cyber Physical System Design)
Random numbers are widely employed in cryptography and security applications. If the generation process is weak, the whole chain of security can be compromised: these weaknesses could be exploited by an attacker to retrieve the information, breaking even the most robust implementation of a cipher. Due to their intrinsic close relationship with analogue parameters of the circuit, True Random Number Generators are usually tailored on specific silicon technology and are not easily scalable on programmable hardware, without affecting their entropy. On the other hand, programmable hardware and programmable System on Chip are gaining large adoption rate, also in security critical application, where high quality random number generation is mandatory. The work presented herein describes the design and the validation of a digital True Random Number Generator for cryptographically secure applications on Field Programmable Gate Array. After a preliminary study of literature and standards specifying requirements for random number generation, the design flow is illustrated, from specifications definition to the synthesis phase. Several solutions have been studied to assess their performances on a Field Programmable Gate Array device, with the aim to select the highest performance architecture. The proposed designs have been tested and validated, employing official test suites released by NIST standardization body, assessing the independence from the place and route and the randomness degree of the generated output. An architecture derived from the Fibonacci-Galois Ring Oscillator has been selected and synthesized on Intel Stratix IV, supporting throughput up to 400 Mbps. The achieved entropy in the best configuration is greater than 0.995. View Full-Text
Keywords: random; number; generator; TRNG; FPGA; entropy; NIST; Fibonacci; Galois; FiGaRO random; number; generator; TRNG; FPGA; entropy; NIST; Fibonacci; Galois; FiGaRO
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MDPI and ACS Style

Nannipieri, P.; Di Matteo, S.; Baldanzi, L.; Crocetti, L.; Belli, J.; Fanucci, L.; Saponara, S. True Random Number Generator Based on Fibonacci-Galois Ring Oscillators for FPGA. Appl. Sci. 2021, 11, 3330. https://doi.org/10.3390/app11083330

AMA Style

Nannipieri P, Di Matteo S, Baldanzi L, Crocetti L, Belli J, Fanucci L, Saponara S. True Random Number Generator Based on Fibonacci-Galois Ring Oscillators for FPGA. Applied Sciences. 2021; 11(8):3330. https://doi.org/10.3390/app11083330

Chicago/Turabian Style

Nannipieri, Pietro, Stefano Di Matteo, Luca Baldanzi, Luca Crocetti, Jacopo Belli, Luca Fanucci, and Sergio Saponara. 2021. "True Random Number Generator Based on Fibonacci-Galois Ring Oscillators for FPGA" Applied Sciences 11, no. 8: 3330. https://doi.org/10.3390/app11083330

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