Monolithic 3D Inverter with Interface Charge: Parameter Extraction and Circuit Simulation
Abstract
:1. Introduction
2. Interface Trap Charges in M3DINV
3. Parameter Extraction for Circuit Simulation
4. Conclusions
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Acknowledgments
Conflicts of Interest
References
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Parameter | Unit | Description | Value |
---|---|---|---|
DLQ | m | Effective channel length offset CV | 4 × 10−8 |
VFBO | V | Geometry-independent flat-band voltage | 0.3 |
CTO | - | Interface states factor | 0.4 |
CICO | - | Geometry-independent part of substrate bias dependence factor of interface coupling | 2.2 |
CFL | V−1 | Length dependence of DIBL | 1.3 |
UO | m2/V/s | Zero-field mobility | 1.9 × 10−3 |
MUEO | m/V | Mobility reduction coefficient | 4.3 |
THEMUO | - | Mobility reduction exponent | 1 |
FETAO | - | Effective field parameter | 3 |
PSCEL | - | Length dependence of short channel effect above threshold | 0.15 |
THESATO | V−1 | Geometry-independent velocity saturation parameter | 3 |
AXO | - | Geometry-independent of linear/saturation transition factor | 0 |
ALPL1 | - | Length dependence of CLM pre-factor ALP | 0.0005 |
VPO | V | CLM logarithm dependence factor | 0.04 |
CGBOVL | F | Oxide capacitance for gate-substrate overlap | 9 × 10−16 |
CFRW | F | Outer fringe capacitance | 2.8 × 10−16 |
Parameter | Unit | Description | Value (TILD) | |
---|---|---|---|---|
10 nm | 100 nm | |||
DLQ | m | Effective channel length offset CV | 4 × 10−8 | 4 × 10−8 |
VFBO | V | Geometry-independent flat-band voltage | −0.175 | −0.26 |
CTO | - | Interface states factor | 0.4 | 0.4 |
CICO | - | Geometry-independent part of substrate bias dependence factor of interface coupling | 0.2 | 0.2 |
CFL | V−1 | Length dependence of DIBL | 0.4 | 1 |
UO | m2/V/s | Zero-field mobility | 1.8 × 10−2 | 3.5 × 10−2 |
MUEO | m/V | Mobility reduction coefficient | 1.5 | 7 |
THEMUO | - | Mobility reduction exponent | 0.1 | 0.2 |
FETAO | - | Effective field parameter | 1 | 0 |
PSCEL | - | Length dependence of short channel effect above threshold | 0.14 | 0.06 |
THESATO | V−1 | Geometry-independent velocity saturation parameter | 7 | 1 |
AXO | - | Geometry-independent of linear/saturation transition factor | 6 | 0.5 |
ALPL1 | - | Length dependence of CLM pre-factor ALP | 0.0002 | 0.002 |
VPO | V | CLM logarithm dependence factor | 0.04 | 2 |
CGBOVL | F | Oxide capacitance for gate-substrate overlap | 0 | 14 × 10−16 |
CFRW | F | Outer fringe capacitance | 2.5 × 10−16 | 2.2 × 10−16 |
RSGO | - | Gate-bias dependence of RS | 0.2 | 0.5 |
Stages | Power [μW] | Frequency [GHz] | Delay per Stage [ps] | |||
---|---|---|---|---|---|---|
10 nm | 100 nm | 10 nm | 100 nm | 10 nm | 100 nm | |
3 | 281 | 274 | 18.7 | 22.1 | 9.04 | 7.59 |
19 | 279 | 272 | 2.88 | 3.37 | 9.16 | 7.81 |
101 | 281 | 276 | 0.52 | 0.62 | 9.28 | 7.93 |
Stages | Power [μW] | Frequency [GHz] | Delay per Stage [ps] | |||
---|---|---|---|---|---|---|
10 nm | 100 nm | 10 nm | 100 nm | 10 nm | 100 nm | |
3 | 283 | 283 | 14.2 | 15.8 | 11.71 | 10.33 |
19 | 282 | 278 | 2.38 | 2.73 | 11.93 | 10.67 |
101 | 284 | 283 | 0.408 | 0.45 | 12.13 | 10.98 |
2 × 1 MUX | D Flip-Flop | |||||||
---|---|---|---|---|---|---|---|---|
No-trap [10] | Trap | No-trap [10] | Trap | |||||
TILD [nm] | 10 | 100 | 10 | 100 | 10 | 100 | 10 | 100 |
Propagation delay [ps] | 2.3 | 1.95 | 4.1 | 3.75 | 10.2 | 8.35 | 16.2 | 13.7 |
Power Consumption [μW] | 22.6 | 18.4 | 29.7 | 27.8 | 41.9 | 39.3 | 47.4 | 45.1 |
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Ahn, T.J.; Lim, S.K.; Yu, Y.S. Monolithic 3D Inverter with Interface Charge: Parameter Extraction and Circuit Simulation. Appl. Sci. 2021, 11, 12151. https://doi.org/10.3390/app112412151
Ahn TJ, Lim SK, Yu YS. Monolithic 3D Inverter with Interface Charge: Parameter Extraction and Circuit Simulation. Applied Sciences. 2021; 11(24):12151. https://doi.org/10.3390/app112412151
Chicago/Turabian StyleAhn, Tae Jun, Sung Kyu Lim, and Yun Seop Yu. 2021. "Monolithic 3D Inverter with Interface Charge: Parameter Extraction and Circuit Simulation" Applied Sciences 11, no. 24: 12151. https://doi.org/10.3390/app112412151
APA StyleAhn, T. J., Lim, S. K., & Yu, Y. S. (2021). Monolithic 3D Inverter with Interface Charge: Parameter Extraction and Circuit Simulation. Applied Sciences, 11(24), 12151. https://doi.org/10.3390/app112412151