Bit Streaming Processing Algorithms for Intelligent Hardware Converters

Round 1

Reviewer 1 Report

Section 2, where the theoretical background is described is presented in a logical way. However, since I am not familiar with this kind of algorithm, it is almost impossible for me to check the correctness of  the presented approach. Is there any other  publications, where it is described and proved?

As far as the hardware implementation, the presented simulation results (waveforms), actually are not very useful to prove the correctness of the implementation. It would easier to understand the presented implementation if the block schematic of the implemented hardware is presented. It would be also interesting to see the testbench structure, which was used to validate the results.

According to the Authors the code was synthesized into CPLD. Description of the synthesis report would provide valuable insight of the achieved hardware realization. Always an important added value is the practical versification of a concept. Here we have nice photos, however there is no measurements results.

I noticed two typo: line 62 should be 2ⁱ  (not 2i); line 385 should be: “finite state machine” (not “final state machine”).

Author Response

Please see the attachment.

Author Response File: Author Response.docx

Reviewer 2 Report

The contents of this manuscript are technically very interesting and many readers would be interested. The manuscript would be further enhanced if the followings are added:

(i) Comparison with conventional approaches (such an bit-parallel method), in terms of hardware amount, calculation speed and accuracy.

(ii) Technological limitations of the proposed method.

Author Response

Please see the attachment.

Author Response File: Author Response.docx

Round 2

Reviewer 1 Report

 

Included additional diagrams clarify the presented work. I still have a doubt whether the correctness of results were checking automatically in the test -bench or not. Table 1 is also a good way to show the added value of the proposed method. 

Some typo, I have noticed:

line 177: and restores to its state after

line 180: The considered descriptions of stream processes